RF Semiconductor Devices, Biasing and ModelsIntroduction and ContextRF circuit performance depends not only on topology but also on the semiconductor technology used to implement it. At radio frequencies, a device is a distributed electromagnetic component as much as a controlled current source. Junction capacitances, package inductance, substrate loss, gate or base resistance, thermal feedback, noise, and breakdown limitations can determine performance as strongly as the ideal transistor equations. This chapter develops the device-level knowledge required to select, model, bias, and compare RF semiconductor devices. Diodes, BJTs, heterojunction bipolar transistors (HBTs), MOSFETs, CMOS, GaAs, GaN, and SiGe technologies are considered. Both large-signal and small-signal models are introduced, followed by parasitic, thermal, and noise models. The chapter concludes with practical bias-network design and an applied comparison of technologies for a wideband RF power amplifier. Learning ObjectivesAfter completing this chapter, the reader should be able to: 1. Explain the operation and RF limitations of major semiconductor devices. 2. Compare silicon, SiGe, GaAs, GaN, CMOS, and related technologies. 3. Derive and use small-signal parameters for BJTs and MOSFETs. 4. Identify the effect of parasitic elements on gain, bandwidth, stability, and noise. 5. Design bias networks that provide predictable operating points and tolerate temperature variation. 6. Apply thermal and noise models in RF design. 7. Select a technology using performance, integration, reliability, cost, and regulatory considerations. 1. Semiconductor Devices Used in RF Systems1.1 DiodesA pn-junction diode is described, under the ideal diffusion model, by I_D=I_S[exp(V_D/(nV_T))-1], where I_D is diode current, I_S is saturation current, V_D is junction voltage, n is the ideality factor, and V_T=kT/q is the thermal voltage. At 300 K, V_T is approximately 25.85 mV. The equation assumes a reasonably uniform junction and neglects series resistance, high-level injection, breakdown, and temperature-dependent effects. The incremental or small-signal resistance at a forward current I_D much greater than I_S is r_d = nV_T/I_D. A diode also has depletion capacitance and diffusion capacitance. The former is associated with stored charge in the depletion region; the latter becomes important under forward bias because of minority-carrier storage. RF detector, mixer, limiter, multiplier, varactor, and protection circuits exploit these nonlinear and voltage-dependent properties. A varactor is normally operated in reverse bias, where its junction capacitance changes with voltage. Its usefulness is limited by series resistance, quality factor, tuning range, breakdown voltage, and package parasitics. Schottky diodes use a metal-semiconductor junction and generally offer low forward voltage and very short carrier-storage time, making them useful for high-speed detection and mixing. 1.2 Bipolar Junction TransistorsIn forward-active operation, a BJT has a forward-biased base-emitter junction and a reverse-biased base-collector junction. A simplified collector-current relation is I_C \approx I_S exp(V_{BE}/V_T), and the transconductance is g_m = \partial I_C/\partial V_{BE} = I_C/V_T. The base-emitter diffusion capacitance is approximately C_{\pi} \approx g_m\tau_F, where \tau_F is the forward transit time. The base-collector capacitance C_\mu is depletion-related and contributes directly to reverse feedback through the Miller effect. The hybrid-pi model includes g_m, r_\pi, C_\pi, C_\mu, and output resistance r_o. For a BJT with current gain \beta, r_\pi = \beta/g_m. The Early effect causes collector current to vary with collector voltage. A commonly used model is I_C \approx I_{C0}(1+V_{CE}/V_A), where V_A is the Early voltage and I_{C0} is the extrapolated current. Consequently, r_o is approximately V_A/I_C when V_{CE} is sufficiently below V_A and other nonidealities are neglected. BJTs offer high transconductance per unit current, but base resistance, junction capacitance, low breakdown voltage, and temperature sensitivity must be considered in RF designs. 1.3 HBTs and SiGe HBTsAn HBT uses a heterojunction, usually with a wider-bandgap emitter than the base. The heterojunction permits a heavily doped emitter and a thin, highly doped base while maintaining high emitter injection efficiency. This produces high current gain and short transit time. SiGe HBTs integrate a graded germanium profile in a silicon process. Their high cutoff frequency, useful breakdown-voltage options, low phase noise in oscillators, and compatibility with silicon manufacturing make them important in RF transceivers, frequency synthesizers, automotive radar, and high-speed data links. Trade-offs include thermal coupling in dense circuits, limited power density compared with GaN, and process-dependent breakdown and linearity constraints. 1.4 MOSFETsFor a long-channel n-channel MOSFET in saturation, ignoring channel-length modulation, I_D = (1/2)\mu_n C_{ox}(W/L)(V_{GS}-V_{TH})^2, provided V_{GS}>V_{TH} and V_{DS}\ge V_{GS}-V_{TH}. Here \mu_n is carrier mobility, C_{ox} is oxide capacitance per unit area, W and L are channel width and length, and V_{TH} is threshold voltage. The overdrive voltage is V_{OV}=V_{GS}-V_{TH}. The small-signal transconductance is g_m = 2I_D/V_{OV} = \sqrt{2\mu_n C_{ox}(W/L)I_D}. The last two forms apply to the ideal square-law saturation model. With channel-length modulation, the current is often written as I_D \approx (1/2)\mu_n C_{ox}(W/L)V_{OV}^2(1+\lambda V_{DS}), where \lambda is the channel-length-modulation parameter. The corresponding output resistance is approximately r_o=1/(\lambda I_D). At RF, the gate is not perfectly insulated from dynamic current. Gate-source, gate-drain, and gate-body capacitances arise from oxide, overlap, and depletion effects. The gate resistance of a distributed transistor can be significant, especially in wide devices. Short-channel effects invalidate the basic square-law model and require compact models such as BSIM or foundry-qualified RF models. 1.5 CMOS RF TechnologyCMOS combines n-channel and p-channel MOSFETs and supports dense digital, analog, and RF integration. Its advantages include low cost, high integration, mature design automation, and the possibility of integrating processors, calibration, data conversion, and transceivers on one die. Its limitations include substrate coupling, relatively high flicker noise, finite passive quality factor, supply-voltage scaling, and device breakdown constraints. Modern RF CMOS may use thick-oxide devices, deep n-wells, patterned ground shields, metal-insulator-metal capacitors, and specialized RF inductors. Differential structures and careful substrate isolation are frequently required to suppress common-mode interference and digital noise. 1.6 GaAs and GaNGaAs devices provide high electron mobility and low parasitic capacitance. GaAs pHEMTs and HEMTs have historically been important in low-noise amplifiers, satellite receivers, and microwave front ends. Their weaknesses include higher substrate and manufacturing cost, limited digital integration, and lower power-handling capability than GaN in many applications. GaN, usually implemented using AlGaN/GaN HEMT structures, supports high electric field, high breakdown voltage, and high power density. The two-dimensional electron gas provides a high-density conduction channel. GaN is particularly attractive for radar, base-station transmitters, electronic warfare, and high-power millimetre-wave systems. Important concerns are trapping and current collapse, gate reliability, thermal resistance, dispersion, and package thermal management. 2. Large-Signal, Small-Signal, and RF Equivalent ModelsA large-signal model describes nonlinear operation over a substantial voltage or current range. It is required for power compression, harmonic generation, switching, mixer conversion, breakdown, and intermodulation analysis. Examples include nonlinear compact transistor models, Angelov GaN models, BSIM models, and VBIC or HICUM bipolar models. A small-signal model is a local linearization about a specified bias point. If a nonlinear current is I=f(v), then for a small perturbation v=v_Q+\hat v, I \approx f(v_Q)+[df/dv]_{v_Q}\hat v. The derivative is valid only for sufficiently small perturbations around the quiescent point Q. Small-signal S-parameters, gain, input and output impedance, stability, and noise parameters are all bias dependent. For a common-source MOSFET, a useful first-order model contains g_m\hat v_{gs}, output conductance g_o=1/r_o, C_{gs}, C_{gd}, and C_{ds}. For a common-emitter BJT, the corresponding hybrid-pi model contains g_m\hat v_{be}, r_\pi, r_o, C_\pi, and C_\mu. Extrinsic models add series resistances and inductances at terminals. At microwave frequencies, S-parameters are generally preferable to open- or short-circuit two-port parameters because they use traveling waves and are measurable with a vector network analyzer. A device model should distinguish intrinsic elements inside the semiconductor from extrinsic elements caused by contacts, interconnects, bond wires, pads, package leads, and the test fixture. 3. Parasitics and Frequency LimitsA transistor's RF limit is often governed by charge storage and parasitic feedback rather than by its dc gain. For a unilateral approximation, the transition frequency f_T is the frequency at which short-circuit current gain has magnitude one. A simple BJT approximation is f_T \approx g_m/[2\pi(C_\pi+C_\mu)], although the exact value depends on transit-time and extrinsic effects. For a MOSFET, f_T is often approximated by f_T \approx g_m/[2\pi(C_{gs}+C_{gd})], when output loading and distributed effects are neglected. The maximum oscillation frequency f_max is lower or comparable to the practical limit imposed by feedback capacitance, gate or base resistance, output conductance, and other losses. A high f_T does not automatically imply high gain or high power at the desired frequency. The Miller effect increases the effective input capacitance of an inverting stage. If a capacitance C_{gd} connects input and output and the voltage gain is A_v, its approximate input contribution is C_{gd}(1-A_v). This approximation assumes a lumped, linear, low-frequency-compatible model; it becomes unreliable for distributed microwave structures and should not replace S-parameter analysis. 4. Biasing for RF CircuitsBiasing establishes the quiescent point, or Q-point, around which the RF signal is applied. A satisfactory bias network must provide dc isolation, adequate RF grounding or choking, low noise, thermal stability, tolerance to process variation, and minimal degradation of matching and stability. 4.1 BJT and HBT BiasingA common emitter-degenerated bias circuit uses a collector resistor R_C, emitter resistor R_E, and a base voltage V_B. Neglecting base current initially, I_E \approx (V_B-V_{BE})/R_E, and I_C \approx \alpha I_E, where \alpha=\beta/(\beta+1). The collector voltage is V_C=V_{CC}-I_C R_C. The approximation is valid when the base bias is stiff enough and the transistor remains in forward-active operation. A Thevenin equivalent is often used to include base current. If the bias source has Thevenin voltage V_TH and resistance R_TH, I_B \approx (V_{TH}-V_{BE})/[R_{TH}+(\beta+1)R_E], assuming a fixed V_BE approximation and active operation. Then I_C=\beta I_B. Emitter degeneration improves bias stability and linearity because an increase in current raises emitter voltage, reducing V_BE. It also reduces gain and introduces local feedback. In RF circuits, the emitter resistor may be bypassed partially or fully, but bypass capacitors must be designed for the operating frequency and their equivalent series resistance and inductance must be included. 4.2 MOSFET BiasingFor a source-grounded MOSFET, a gate voltage approximately sets current through V_GS. In practice, threshold-voltage variation, mobility variation, temperature, body effect, channel-length modulation, and drain-induced barrier lowering make a fixed gate voltage poorly controlled. A source resistor provides feedback: V_{GS}=V_G-I_D R_S. An increase in I_D increases the source voltage and reduces V_GS, opposing the increase. Current mirrors and bias circuits with proportional-to-absolute-temperature or complementary-to-absolute-temperature behavior can improve tracking, but they require headroom and have their own mismatch and noise limitations. 4.3 RF Bias NetworksBias is commonly injected through a high-value resistor, an RF choke, a quarter-wave line, or a distributed bias network. The bias network should present a high impedance to the RF signal path while maintaining a low-impedance ac return where intended. Decoupling capacitors are placed in stages, with different values covering different frequency ranges because real capacitors have self-resonant frequencies. A bias network must be simulated with package models, transmission lines, supply impedance, and decoupling components. A theoretically ideal RF choke can become capacitive or resonant at the operating frequency. Stability analysis should include the bias network because supply feedback can create low-frequency or RF oscillations. 5. Thermal, Reliability, and Noise Models5.1 Thermal EffectsDevice power is approximately P_D=V_{DS}I_D for a MOSFET or P_D=V_{CE}I_C for a BJT, with additional terms when terminal voltages and currents have different polarities. A first-order junction-temperature estimate is T_J \approx T_A + P_D\theta_{JA}, where T_J is junction temperature, T_A is ambient temperature, and \theta_{JA} is junction-to-ambient thermal resistance in K/W. For a heat-sunk package, a chain such as \theta_{JC}+\theta_{CS}+\theta_{SA} is more informative. The expression assumes steady state and approximately constant thermal resistance. Temperature changes affect V_BE, threshold voltage, mobility, saturation current, gain, leakage, and breakdown. BJTs can exhibit thermal runaway because increasing temperature increases collector current, which increases power. Emitter degeneration, current limiting, thermal sensors, and negative-feedback bias circuits reduce this risk. GaN devices may show dynamic thermal and trapping behavior that cannot be represented by a single steady-state thermal resistance. 5.2 NoiseThermal noise of a resistor R has one-sided voltage-noise spectral density \overline{v_n^2}=4kTR\Delta f, over bandwidth \Delta f. Shot noise associated with average current I has \overline{i_n^2}=2qI\Delta f. These expressions assume white noise and a sufficiently broad observation interval. MOSFET channel thermal noise is often represented by \overline{i_{nd}^2}=4kT\gamma g_m\Delta f, where \gamma is a model-dependent coefficient; the long-channel saturation approximation commonly gives \gamma near 2/3, but short-channel values differ. Flicker noise is often modeled as proportional to 1/f and is important at low offset frequencies and in CMOS oscillators and direct-conversion receivers. The noise factor is F = SNR_{in}/SNR_{out}, and noise figure is NF=10 log_{10}F in decibels. For cascaded stages, Friis' formula is F_{total}=F_1+(F_2-1)/G_1+(F_3-1)/(G_1G_2)+\cdots, where gains are linear power gains and each F is a linear noise factor. The formula assumes matched cascade interfaces and consistent bandwidth and reference-temperature definitions. Noise matching and maximum power matching are not always identical. A low-noise amplifier may therefore require a compromise between noise figure, gain, input return loss, linearity, and stability. 6. Stability and Bias-Network InteractionAn RF transistor can be conditionally stable: stable for some source and load impedances but capable of oscillation for others. The Rollet factor is K=(1-|S_{11}|^2-|S_{22}|^2+|\Delta|^2)/(2|S_{12}S_{21}|), where \Delta=S_{11}S_{22}-S_{12}S_{21}. For unconditional stability under the usual two-port S-parameter criterion, K>1 and |\Delta|<1 are required at the frequency of interest. These conditions apply to a linear two-port with defined reference impedances and do not guarantee large-signal stability, stability under mismatch, or immunity to supply-network resonances. Stabilization may use series gate/base resistance, shunt loss, feedback, source/emitter degeneration, or resistive loading. Each method affects gain, noise, efficiency, and bandwidth. The best practice is to identify the physical feedback path first rather than adding arbitrary loss. 7. Comparative Technology EvaluationSilicon CMOS is preferred when integration, low cost, and digital functionality dominate. SiGe HBT is advantageous when high transconductance, low phase noise, and high-speed bipolar performance are required. GaAs is attractive for low-noise and microwave applications where integration density is less important. GaN is preferred for high voltage, high power density, and demanding thermal or mismatch conditions. Silicon BJTs and HBTs offer excellent transconductance efficiency but generally lower breakdown voltage than GaN. Technology selection should evaluate: - operating frequency and required bandwidth;
- gain, noise figure, linearity, and output power;
- supply voltage and breakdown margin;
- thermal resistance and cooling architecture;
- process maturity, yield, cost, and packaging;
- availability of accurate nonlinear and noise models;
- integration with control, calibration, and data-conversion circuits;
- reliability, qualification, export controls, and lifecycle support.
No technology is universally superior. A GaN transistor may provide outstanding power density but require a specialized thermal package, while CMOS may provide complete system integration with lower RF output power. The correct decision is therefore an architecture-and-system decision, not merely a comparison of transistor cutoff frequencies. 8. Worked Example: Degenerated BJT BiasAn illustrative NPN RF transistor is biased from V_CC=5 V. Let V_B=1.20 V, R_E=330 ohm, R_C=680 ohm, V_BE=0.75 V, and \beta=100. Using the Thevenin/base-current approximation, I_B=(V_B-V_BE)/[R_E(\beta+1)] =0.45/[330(101)] =13.5 microampere approximately. Thus, I_C=\beta I_B\approx1.35 mA, and I_E=(\beta+1)I_B\approx1.36 mA. The collector voltage is V_C=5-(1.35\text{ mA})(680\ \Omega)\approx4.08\text{ V}, while the emitter voltage is V_E=(1.36\text{ mA})(330\ \Omega)\approx0.449\text{ V}. Therefore V_CE is approximately 3.63 V, so the transistor is comfortably in forward-active operation under this simplified model. At room temperature, g_m=I_C/V_T\approx1.35\text{ mA}/25.85\text{ mV}\approx52.2\text{ mS}. The calculation neglects resistor tolerance, transistor Early effect, RF bypass behavior, temperature variation, and model-dependent parasitics. These must be checked in a design simulation and measurement. 9. Applied Case: Technology Choice for a 5 GHz Receiver Front EndBackgroundConsider an illustrative design team developing a 5 GHz receiver for a compact industrial wireless sensor. The receiver requires a low-noise amplifier, frequency conversion, digital calibration, and a low-power control processor on one module. ProblemThe design must achieve low noise and adequate gain while operating from a low supply. The team is considering RF CMOS, SiGe BiCMOS, and GaAs. A separate high-power transmitter is not part of this decision. AnalysisGaAs may provide excellent RF noise and gain performance, but integrating the processor and calibration circuitry would require additional components and interconnects. SiGe offers high transconductance efficiency and strong high-frequency analog performance, together with mature passive and mixed-signal integration. RF CMOS offers the highest integration and potentially the lowest system cost, but substrate coupling, flicker noise, device mismatch, and limited voltage headroom require careful design. The team compares not only nominal noise figure but also input matching, linearity under blocker signals, supply sensitivity, model accuracy, package parasitics, and production test cost. Bias simulations are run across process, voltage, and temperature corners. Stability is checked with the complete package and decoupling network rather than with the transistor alone. Approach and SolutionThe team selects SiGe BiCMOS for the first production version because the receiver's noise and gain targets are demanding, while integrated frequency generation, calibration, and control remain important. Emitter degeneration is used to improve linearity and bias robustness. A temperature-aware current reference and cascaded supply decoupling are added. The design includes RF probing structures so that pad and package models can be correlated with measurement. OutcomeThe selected technology meets the system targets with less external matching than the GaAs alternative and greater RF margin than the initial CMOS design. The cost is higher than a highly integrated CMOS solution, but the reduced risk and improved receiver performance justify the choice for the industrial product. Learning PointsThe case illustrates that technology selection must include system integration, manufacturability, thermal behavior, model confidence, and lifecycle considerations. Device parameters alone do not determine product success. 10. Challenges, Best Practices, and Contemporary DevelopmentsImportant challenges include model accuracy outside the measured bias range, device variation, self-heating, memory effects, trapping, package resonance, and the interaction of multiple bias loops. GaN and other wide-bandgap devices require particular attention to dynamic on-resistance, current collapse, gate protection, and thermal transients. At advanced CMOS nodes, interconnect and substrate effects may dominate intrinsic transistor behavior. Best practices are to use foundry-qualified compact models; extract or measure package and board parasitics; design bias circuits with process, voltage, and temperature margins; verify both small- and large-signal stability; separate RF, digital, and power return paths; and validate simulations with calibrated measurements. Bias networks should be treated as part of the RF circuit, not as ideal dc accessories. Contemporary development is moving toward heterogeneous integration, advanced packaging, backside power delivery, silicon-on-insulator RF processes, GaN-on-SiC and GaN-on-diamond thermal solutions, and machine-learning-assisted model extraction and circuit optimization. AI can accelerate surrogate-model generation or corner exploration, but its predictions require physically meaningful training data and independent verification. It should support, not replace, device physics, measurement, and engineering judgment. Chapter SummaryRF semiconductor devices must be evaluated as nonlinear, frequency-dependent, thermal, noisy, and package-connected components. Diodes provide nonlinear detection, switching, mixing, and voltage-variable capacitance. BJTs and HBTs offer high transconductance efficiency; SiGe HBTs extend these advantages into highly integrated high-frequency systems. MOSFETs and CMOS provide dense, low-cost integration but require careful treatment of threshold variation, substrate coupling, flicker noise, and parasitic capacitance. GaAs is valuable for high-frequency low-noise applications, while GaN provides high voltage and power density with significant thermal and trapping challenges. Large-signal models describe nonlinear power and switching behavior, whereas small-signal models describe local gain, impedance, stability, and noise about a bias point. Parasitics determine practical bandwidth and can introduce feedback through Miller capacitance. Reliable bias networks use feedback, adequate voltage margin, RF isolation, decoupling, and process-temperature analysis. Thermal and noise models connect device physics to reliability and receiver sensitivity. Technology selection is ultimately a system-level decision involving performance, integration, cost, manufacturability, reliability, and regulatory requirements. Key TermsDiode: Two-terminal semiconductor device based on a junction or metal-semiconductor barrier. Varactor: Reverse-biased diode used as a voltage-controlled capacitor. BJT: Bipolar transistor controlled by carrier injection through a base region. HBT: Bipolar transistor using a heterojunction to improve injection efficiency and speed. MOSFET: Field-effect transistor controlled by an insulated gate. CMOS: Complementary technology using both n-channel and p-channel MOSFETs. SiGe: Silicon-germanium technology commonly used to improve bipolar RF performance. GaAs: III-V semiconductor material offering high electron mobility and RF performance. GaN: Wide-bandgap semiconductor suited to high voltage and high power density. Q-point: Quiescent dc operating point about which an RF signal is applied. Transconductance: Change in output current per change in controlling voltage. Hybrid-pi model: Small-signal equivalent model commonly used for BJTs. Parasitic: Unintended resistance, capacitance, inductance, or coupling associated with a device or interconnect. Early effect: Dependence of BJT collector current on collector-emitter voltage. Miller effect: Apparent enlargement of a feedback capacitance due to voltage gain. Noise figure: Degradation of signal-to-noise ratio expressed in decibels. Thermal runaway: Positive electrothermal feedback causing uncontrolled current increase. S-parameter: Traveling-wave two-port parameter used for RF characterization. Unconditional stability: Stability for all passive source and load impedances under stated two-port criteria. Review QuestionsShort Answer Questions1. Why is a varactor normally operated in reverse bias? 2. Define the Q-point and explain its importance in RF design. 3. State two differences between a large-signal and a small-signal model. 4. What physical effects contribute to MOSFET gate capacitance? 5. Why does emitter degeneration improve BJT bias stability? Long Answer Questions1. Compare CMOS, SiGe HBT, GaAs, and GaN technologies for RF applications. 2. Explain the hybrid-pi model of a BJT and the role of each principal element. 3. Discuss the design requirements of an RF bias network, including decoupling and stability. 4. Explain thermal noise, shot noise, flicker noise, and noise figure in RF devices. 5. Describe how parasitics limit gain, bandwidth, and stability at microwave frequencies. Analytical / Application Questions1. A MOSFET operates at I_D=2 mA with V_OV=0.20 V. Using the ideal saturation relation, calculate g_m and discuss why the result may differ from a measured RF value. 2. Design a preliminary BJT bias network for a 3.3 V supply and 1 mA collector current. State assumptions and select resistor values that leave reasonable V_CE margin. 3. A receiver front end can use RF CMOS or SiGe BiCMOS. Develop a weighted decision matrix using noise, integration, linearity, cost, power, and model confidence, and justify the selected technology. Multiple Choice Questions with AnswersQuestion 1At 300 K, the thermal voltage kT/q is approximately: A. 2.585 mV B. 25.85 mV C. 258.5 mV D. 1 V Correct Answer: B. 25.85 mV Question 2For an ideal MOSFET in saturation, increasing drain current while holding overdrive voltage constant causes the transconductance to: A. Decrease to zero B. Remain exactly zero C. Increase according to gm=2ID/VOV D. Become independent of drain current Correct Answer: C. Increase according to gm=2ID/VOV Question 3Which technology is generally most associated with high RF power density and high breakdown voltage? A. GaN B. Standard CMOS C. Low-power silicon diode D. Germanium detector diode Correct Answer: A. GaN Question 4The BJT hybrid-pi parameter rπ is approximately: A. gm/β B. β/gm C. βgm D. 1/(βgm) Correct Answer: B. β/gm Question 5Which element most directly represents reverse feedback in the basic BJT hybrid-pi model? A. Cμ B. RE C. The substrate resistor only D. The ideal current source supply Correct Answer: A. Cμ Question 6For unconditional stability using the stated Rollet criterion, which condition is required? A. K<0 and |Δ|>1 B. K=0 only C. K>1 and |Δ|<1 D. S21=0 at every frequency Correct Answer: C. K>1 and |Δ|<1 Question 7The one-sided thermal-noise voltage spectral density of a resistor R over bandwidth Δf is: A. 2qRΔf B. 4kTRΔf C. kT/(RΔf) D. 4qTR Correct Answer: B. 4kTRΔf Question 8In the worked BJT example, the approximate collector current is: A. 13.5 μA B. 0.135 mA C. 1.35 mA D. 13.5 mA Correct Answer: C. 1.35 mA Question 9A source resistor in a MOSFET bias circuit primarily improves dc bias robustness by: A. Providing negative feedback through source-voltage rise B. Eliminating all parasitic capacitance C. Forcing the transistor into breakdown D. Making threshold voltage exactly zero Correct Answer: A. Providing negative feedback through source-voltage rise Question 10Friis' cascade noise formula requires stage gains to be used as: A. Linear power gains B. Decibel voltage gains only C. Angles in radians D. Noise temperatures in kelvin only Correct Answer: A. Linear power gains
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