RF Power Amplifiers and Efficiency EnhancementIntroduction and ContextAn RF power amplifier (PA) is the final active stage that delivers a radio-frequency signal to a load such as an antenna, transmission line, resonator, or test termination. Unlike a small-signal amplifier, whose principal objective is voltage or power gain with minimal distortion, a power amplifier must deliver substantial output power while meeting constraints on efficiency, linearity, bandwidth, reliability, thermal dissipation, and spectral containment. In a transmitter, the PA often dominates energy consumption. A base station, satellite terminal, radar, or wireless handset may therefore achieve a major improvement in operating cost, battery life, or thermal design through PA optimization. The central design conflict is that high efficiency usually requires nonlinear device operation, whereas modern communication systems frequently require highly linear amplification of signals with large peak-to-average power ratios (PAPR). This chapter develops the theory of RF PA operation, introduces the classical amplifier classes, derives important performance measures, examines efficiency-enhancement methods, and applies the concepts to a practical transmitter design problem. Learning ObjectivesAfter studying this chapter, the reader should be able to: - Define RF PA gain, power-added efficiency, drain efficiency, compression, linearity, and PAPR.
- Explain the operation and idealized efficiency of Classes A, B, AB, C, D, E, and F.
- Derive the fundamental relationships among output power, DC power, RF input power, gain, and efficiency.
- Distinguish conduction-angle, switching, load-modulation, and envelope-tracking approaches to efficiency enhancement.
- Evaluate the trade-offs among efficiency, linearity, bandwidth, ruggedness, and implementation complexity.
- Select and justify an appropriate PA architecture for a specified communication application.
- Interpret measurement results and identify practical sources of discrepancy from ideal theory.
1. Fundamental PA Performance Measures1.1 Power gain and transducer quantitiesFor a two-port RF power amplifier, the available RF input power is denoted by Pin,av, and the delivered RF output power by Pout. The power gain is GP = Pout / Pin,av where both powers are in watts. In decibels, GP,dB = 10 log₁₀(GP) The use of available input power is important because mismatch between the source and amplifier input can make the incident and accepted powers different. In a measurement system, delivered input power, reflected power, and calibration-plane losses must be distinguished carefully. The RF output power for a sinusoidal voltage across a resistive load is Pout = Vrms² / RL = Irms² RL where RL is the load resistance. If Vpk is the sinusoidal peak voltage, then Vrms = Vpk/√2, and therefore Pout = Vpk² / (2RL) These relations assume a purely resistive load and a sinusoidal waveform. For a non-sinusoidal waveform, average power must be calculated from the time average of instantaneous voltage and current. 1.2 DC power, drain efficiency, and power-added efficiencyThe DC power supplied to a transistor is PDC = VDD IDC for a supply voltage VDD and average supply current IDC. The drain or collector efficiency is ηD = Pout / PDC This metric excludes the RF input power from the numerator and denominator. It is particularly useful for comparing device operating modes. Power-added efficiency (PAE) includes the RF input power consumed by the amplifier: PAE = (Pout − Pin) / PDC where Pin is the RF power accepted at the amplifier input. In terms of power gain GP = Pout/Pin, PAE = ηD (1 − 1/GP) This identity follows directly by substituting Pin = Pout/GP. It assumes consistent reference planes for input, output, and DC powers. At high gain, PAE approaches drain efficiency, but at low gain the distinction can be significant. The total transmitter efficiency may also include driver, bias, matching-network, and power-supply losses. Consequently, a PA with excellent transistor efficiency does not necessarily produce an efficient transmitter. 1.3 Linearity and compressionA linear amplifier scales and delays every spectral component without creating new frequencies. Real PAs are nonlinear. As input amplitude increases, gain eventually decreases because the device reaches voltage, current, or charge limitations. The 1 dB compression point is the input or output power at which the measured gain is 1 dB below the low-power extrapolated gain. For a modulated signal, important measures include adjacent-channel leakage ratio (ACLR), adjacent-channel power ratio (ACPR), error-vector magnitude (EVM), and intermodulation distortion. A memoryless third-order approximation may be written as vout(t) = a₁vin(t) + a₃vin³(t) where a₁ and a₃ are model coefficients. This simplified expression helps explain third-order intermodulation but does not represent memory effects, bias networks, thermal dynamics, or frequency-dependent matching. 1.4 PAPR and back-offThe peak-to-average power ratio of a waveform is PAPR = Ppeak / Pavg or in decibels, PAPRdB = 10 log₁₀(Ppeak/Pavg) Orthogonal-frequency-division multiplexing and many multicarrier signals have high PAPR. If the PA must amplify peaks without severe clipping, its average operating power must be below its saturation power. Output back-off (OBO) is commonly defined as OBOdB = 10 log₁₀(Psat / Pavg) where Psat is a selected saturation or maximum linear output power. High back-off can greatly reduce the efficiency of conventional PAs, motivating efficiency-enhancement techniques. 2. Device Operating ClassesThe class of operation describes the relationship between the input drive, device conduction interval, output current waveform, and load network. Idealized efficiency values are useful benchmarks, not guarantees for practical circuits. 2.1 Class AA Class A transistor conducts for the complete 360° RF cycle. The quiescent current is sufficiently large that the device remains in its active region throughout the cycle. With a tuned load and an ideal voltage supply, the maximum theoretical sinusoidal drain efficiency is 50% for a resistively loaded voltage amplifier. A transformer- or choke-loaded ideal Class A stage can approach 50% under common assumptions. Class A offers excellent linearity and is often used in drivers, instrumentation, and applications requiring low distortion. Its disadvantage is substantial quiescent power even when no RF signal is applied. Heat dissipation is therefore high. 2.2 Class BIn ideal Class B, the transistor conducts for 180°. A complementary push-pull arrangement reproduces both half-cycles of the output current. The ideal maximum efficiency for a sinusoidal output is ηB,max = π/4 ≈ 78.5% The result assumes ideal switches or transistors, a sinusoidal output voltage, a lossless tuned load, and zero quiescent current. Crossover distortion appears near the current zero crossing if the two devices are not biased correctly. 2.3 Class ABClass AB uses a conduction angle greater than 180° but less than 360°. A small quiescent current reduces crossover distortion relative to Class B while retaining better efficiency than Class A. It is widely used when moderate-to-high linearity and practical efficiency are both required. There is no single efficiency value for Class AB because efficiency depends on the conduction angle, bias current, waveform amplitude, device characteristics, and load network. As bias approaches Class A operation, linearity generally improves and efficiency decreases. 2.4 Class CA Class C device conducts for less than 180°. The drain or collector current consists of narrow pulses, while a resonant output network reconstructs the desired fundamental voltage. For an ideal tuned Class C amplifier, efficiency can exceed Class B and approach 100% as the conduction angle becomes very small. However, the input-output relationship is strongly nonlinear, so ordinary Class C is unsuitable for direct amplification of a varying-envelope signal. Class C is useful for constant-envelope modulation, frequency multiplication, and as a constituent of switching or outphasing architectures. 2.5 Switching classes: D, E, and FSwitching PAs attempt to minimize the overlap of device voltage and current. If either voltage or current is approximately zero when the other is large, instantaneous transistor dissipation is reduced. A Class D amplifier uses switching devices in a complementary or bridge arrangement. Ideally, each switch has either zero voltage or zero current during conduction, but switching overlap, output capacitance, dead time, and gate-drive power limit practical efficiency at RF. Class E uses a single-ended switching transistor and a specially designed network that shapes voltage and current waveforms. The ideal zero-voltage-switching condition requires the transistor voltage to be zero, and ideally its derivative also zero, when the transistor turns on. Under ideal assumptions, Class E can have 100% theoretical efficiency. Practical efficiency is lower because of finite on-resistance, transistor output capacitance, parasitic inductance, driver loss, and waveform bandwidth limitations. Class F uses harmonic terminations to shape the drain voltage and current. Ideally, one waveform approximates a square wave and the other a half-sinusoid, reducing their overlap. In a conventional Class F formulation, open-circuit or high-impedance terminations are applied to selected odd harmonics, while even-harmonic terminations shape the voltage waveform. The exact termination pattern depends on whether voltage or current waveform shaping is being emphasized. Realistic finite-harmonic designs trade efficiency against bandwidth and matching-network complexity. 3. An Idealized Efficiency Derivation for Class BConsider an ideal push-pull Class B stage delivering a sinusoidal voltage vo(θ) = V̂o sin θ across a resistive load RL. The RMS output power is Pout = V̂o² / (2RL) Each transistor supplies a half-wave current. The average DC current drawn from the two supply rails is IDC = 2 Îo / π where Îo = V̂o/RL is the peak load current. If the supply voltage is VCC, the total DC power is PDC = 2VCC Îo / π At the largest symmetrical sinusoidal swing, V̂o ≈ VCC, giving ηB = [VCC²/(2RL)] / [2VCC²/(πRL)] = π/4 ≈ 0.785 Thus the ideal maximum is approximately 78.5%. The derivation assumes no saturation voltage, no transistor resistance, no switching delay, no bias power, and a lossless load network. In practice, voltage headroom, knee voltage, device breakdown limits, and losses reduce efficiency. 4. Efficiency at Back-OffFor a conventional voltage-mode Class B or AB amplifier, output power reduces approximately with the square of voltage amplitude, whereas the quiescent and waveform-dependent DC consumption does not fall proportionally. This causes poor efficiency at back-off. For ideal Class B with a fixed supply and sinusoidal output amplitude V̂o, define the normalized amplitude x = V̂o / VCC, 0 ≤ x ≤ 1 The ideal efficiency becomes approximately ηB(x) = (π/4)x under the same assumptions used in the maximum-efficiency derivation. Thus at half voltage amplitude, corresponding to one-quarter of maximum output power, ideal efficiency is approximately 39.3%. Practical Class AB efficiency can be lower because of quiescent current and device losses. This result explains why high-PAPR signals create an architectural challenge: the PA spends much of its time operating below peak power, where a fixed-supply linear stage is inefficient. 5. Efficiency-Enhancement Architectures5.1 Envelope trackingEnvelope tracking (ET) varies the PA supply voltage according to the signal envelope. The supply modulator attempts to maintain only the voltage headroom required for the instantaneous RF output. When the envelope is small, the supply voltage is reduced, lowering DC power. A simplified supply relation is VDD(t) ≈ k A(t) + Vmargin where A(t) is the RF envelope, k is a scaling factor determined by the PA and matching network, and Vmargin provides linearity and regulation margin. The supply modulator must have adequate bandwidth, low output impedance over the relevant spectrum, and low noise. Its efficiency, delay, and tracking error directly affect system performance. ET is attractive for wideband communication but requires coordination among the digital predistorter, RF path, and envelope supply. Supply noise can modulate the RF output and degrade EVM or ACLR. 5.2 Envelope elimination and restorationEnvelope elimination and restoration (EER), associated with polar architectures, separates a signal into phase and envelope components. A highly efficient constant-envelope RF PA amplifies the phase component, while a high-speed supply or modulator restores the envelope. If s(t) = A(t) cos[φ(t)] then the phase path processes φ(t) and the supply path processes A(t). Time alignment is critical. An error between the paths produces amplitude and phase distortion. Wideband signals make delay matching difficult, and the envelope path must handle rapid amplitude variations without excessive loss. 5.3 Doherty power amplifierThe Doherty PA uses a carrier amplifier and one or more peaking amplifiers with an impedance-inverting output combiner. At low power, the carrier amplifier operates alone into a relatively high effective load. As the signal envelope increases, the peaking amplifier turns on and modifies the load seen by the carrier, allowing the carrier to deliver more current without a proportional increase in supply voltage. For an ideal two-way Doherty PA, a common design target is an efficiency enhancement near 6 dB of output back-off. The exact result depends on the combiner, transistor capabilities, bias classes, and load modulation range. Practical designs may use asymmetric device sizes, multi-way arrangements, or digital predistortion to improve efficiency over a wider power range. Important implementation issues include the quarter-wave or equivalent impedance inverter, phase alignment, bandwidth limitation of distributed lines, peaking-device turn-on behavior, and load-pull interaction. Broadband Doherty designs often use lumped, transformer-based, or digitally assisted combining networks. 5.4 Outphasing and Chireix amplificationOutphasing represents a varying-envelope signal as the vector sum of two constant-envelope signals. If the branch phases are φ + θ and φ − θ, then s(t) = A₀ cos(θ) · 2 cos[φ(t)] in a simplified real-signal representation, where A₀ is the branch amplitude and θ controls the resultant amplitude. Each branch can use an efficient nonlinear PA, while a combiner reconstructs the desired output. The Chireix technique introduces reactive compensation to reduce combiner loss at selected power levels. Outphasing is potentially efficient over a broad range but suffers from branch mismatch, combiner loss, and sensitivity to phase and amplitude errors. The required phase separation can become large at low output amplitudes, increasing practical loss. 5.5 Harmonic waveform engineeringClass F, inverse Class F, Class E, and related modes use harmonic terminations to control voltage and current waveforms. The design objective is not merely to maximize fundamental power; it is to minimize the integral of instantaneous device power: Ploss,avg = (1/T) ∫₀ᵀ vD(t)iD(t) dt where T is the RF period. This equation is general for periodic waveforms. If voltage and current overlap minimally, average dissipation falls. Harmonic control can significantly improve efficiency but generally narrows bandwidth because matching networks are frequency selective. 5.6 Digital predistortionDigital predistortion (DPD) does not intrinsically increase transistor drain efficiency. Instead, it permits operation closer to compression while compensating nonlinear distortion. A predistorter implements an approximate inverse of the PA characteristic: y(t) = F⁻¹{x(t)} where F represents the PA, x(t) is the desired output, and y(t) is the predistorted input. The inverse is only approximate because the PA has memory, noise, thermal variation, and operating-point dependence. Memory-polynomial models are often used for wideband PAs: y[n] = ∑m=0M ∑p=0P ap,m x[n−m]|x[n−m]|p where ap,m are identified coefficients, M is memory depth, and P is nonlinear order. DPD requires observation receivers, coefficient adaptation, computational resources, and careful stability control. It is therefore a system-level linearization method rather than a substitute for good PA architecture. 6. Matching Networks, Stability, and Thermal Design6.1 Large-signal matchingSmall-signal conjugate matching is not automatically correct for a power amplifier. At large signal, transistor impedances vary with drive level, frequency, bias, and waveform. Load-pull measurements or nonlinear device models are commonly used to identify the load impedance that optimizes output power, efficiency, linearity, or a weighted objective. A practical matching network must withstand RF voltage and current stress, provide acceptable insertion loss, maintain stability, and meet harmonic termination requirements. Component quality factor, parasitic capacitance, transmission-line dispersion, and layout coupling often determine the difference between simulation and hardware. 6.2 StabilityA PA may oscillate because of feedback through package parasitics, bias networks, the output-to-input path, or the load. Stability must be evaluated over a frequency range much wider than the operating band, including low frequencies where bias networks can provide unintended feedback. Stabilization methods include resistive loading, feedback, ferrite components, lossy matching, source degeneration, and careful supply bypassing. Each method consumes gain or efficiency. A design that is stable only with a particular cable, fixture, or antenna is not robust. 6.3 Thermal constraintsThe average heat that must be removed is approximately Pheat ≈ PDC − Pout with additional contributions from driver and matching losses. If a device has junction-to-case thermal resistance θJC and case temperature TC, a first-order estimate is TJ ≈ TC + θJC Pheat where temperature is in degrees Celsius or kelvin for differences, and θJC is in °C/W. The complete thermal path may include junction-to-case, interface, heat spreader, package, and heatsink resistances. Temperature changes device gain, threshold voltage, transconductance, breakdown behavior, and reliability, so electrothermal analysis is essential in high-power designs. 7. Worked Example: Efficiency and Thermal DissipationAn RF PA delivers 40 W to its load. The accepted RF input power is 2 W, and the measured DC power is 80 W. The drain efficiency is ηD = 40/80 = 0.50 = 50% The power-added efficiency is PAE = (40 − 2)/80 = 0.475 = 47.5% The amplifier heat, ignoring minor measurement and control power, is Pheat ≈ 80 − 40 = 40 W If the case temperature is 60 °C and the effective junction-to-case-plus-interface thermal resistance is 0.8 °C/W, the estimated junction temperature is TJ ≈ 60 + (0.8)(40) = 92 °C This result is an estimate, not a reliability qualification. Maximum junction temperature, transient thermal impedance, airflow, mounting pressure, and temperature-dependent RF performance must also be considered. 8. Applied Case: Selecting a PA for a 5G Small-Cell TransmitterBackgroundConsider an illustrative design for a sub-6-GHz small-cell transmitter requiring 40 W peak RF output, 100 MHz instantaneous bandwidth, high-order QAM modulation, and an average PAPR of approximately 8 dB. The design must meet a specified ACLR while minimizing cabinet heat. ProblemA conventional Class AB PA can meet the linearity requirement, but its efficiency at 8 dB back-off is poor. A narrowband Class F stage provides high peak efficiency but cannot readily support the required bandwidth and varying envelope. The design team must select an architecture and a control strategy. AnalysisThe high PAPR means that peak output power occurs infrequently. A fixed-supply Class AB stage spends much of its operating time at reduced output amplitude, where its efficiency declines. A pure switching PA is unsuitable for direct linear amplification unless combined with a suitable signal decomposition technique. A Doherty architecture is attractive because load modulation improves efficiency around a selected back-off region while retaining a direct RF signal path. The 100 MHz bandwidth makes a traditional quarter-wave Doherty combiner challenging. Its phase relationship and impedance transformation vary with frequency. A broadband equivalent network, careful electromagnetic simulation, and measurement-based tuning are therefore required. Device memory and thermal effects also complicate linearization. Approach and solutionA practical architecture could use: - an asymmetric Doherty PA sized so that the peaking path activates near the statistical power region of the waveform;
- a broadband impedance inverter and low-loss output combiner;
- digital predistortion with memory to reduce AM–AM, AM–PM, and memory effects;
- adaptive bias and temperature monitoring;
- an observation receiver for coefficient extraction and ACLR monitoring;
- a power-management controller that limits operation under excessive junction temperature or load mismatch.
The design should be evaluated using probability-of-exceedance output-power data rather than only peak-power efficiency. A useful system metric is the time-weighted average DC consumption: P̄DC = ∫ PDC(Pout) f(Pout) dPout where f(Pout) is the probability density of output power. In a sampled implementation, the equivalent estimate is P̄DC ≈ (1/N) ∑n=1N PDC[n] where N is the number of measured samples. The same waveform and crest-factor statistics must be used when comparing architectures. OutcomeThe Doherty-plus-DPD solution is expected to provide better average efficiency than a conventional Class AB PA while preserving the required linearity. The exact improvement cannot be asserted without device data, matching losses, waveform statistics, and thermal conditions. The design may still require back-off beyond the nominal Doherty efficiency point, and DPD can increase bandwidth occupancy, latency, and computational load. Learning points- Peak efficiency is not the same as average efficiency.
- Architecture must be chosen from waveform statistics, bandwidth, and linearity requirements.
- DPD and efficiency enhancement are complementary rather than interchangeable.
- A broadband PA requires electromagnetic, nonlinear, thermal, and control co-design.
- Compliance measurements must include spectral regrowth, EVM, unwanted emissions, and behavior under mismatch.
9. Measurement and Design MethodologyA rigorous PA development sequence commonly includes: - Define frequency, peak and average power, PAPR, bandwidth, linearity, supply, thermal, and reliability requirements.
- Select transistor technology and estimate voltage, current, gain, breakdown, and thermal margins.
- Perform nonlinear load-pull or use a validated large-signal model.
- Design the input, output, bias, harmonic, and stabilization networks.
- Simulate electromagnetic parasitics and co-simulate the nonlinear circuit.
- Build a mechanically and thermally representative prototype.
- Measure gain, saturated power, compression, efficiency, PAE, ACLR, EVM, stability, and load-mismatch tolerance.
- Add DPD or adaptive control only after the underlying RF path is stable and sufficiently repeatable.
- Validate across frequency, temperature, supply variation, device spread, aging, and antenna mismatch.
Measurement uncertainty must be reported. Power-meter calibration, cable loss, mismatch uncertainty, harmonic content, pulse duty cycle, thermal equilibrium, and averaging method can all affect calculated efficiency. For modulated signals, the observation bandwidth and crest-factor statistics must be specified. 10. Design Trade-offs and LimitationsNo PA architecture simultaneously maximizes efficiency, linearity, bandwidth, gain, ruggedness, and simplicity. Important trade-offs include: | Design objective | Typical consequence |
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| Higher linearity | More bias, back-off, feedback, or DPD complexity | | Higher peak efficiency | Greater waveform shaping and matching sensitivity | | Wide bandwidth | More difficult harmonic control and impedance transformation | | High gain | Greater stability and thermal-feedback risk | | Low heat | Larger transistor area, better cooling, or advanced architecture | | Wide load-mismatch tolerance | Reduced optimum efficiency or added protection | | Fast envelope tracking | Higher supply-modulator bandwidth and switching loss |
Regulatory compliance is a design constraint, not merely a final test. Spectral masks, spurious-emission limits, electromagnetic compatibility, exposure requirements, and regional radio regulations influence allowable nonlinear operation. Protection circuits should avoid damaging the device while minimizing undesirable transients and modulation distortion. 11. Contemporary DevelopmentsGallium nitride devices provide high breakdown voltage, high power density, and useful high-frequency performance, making them important for infrastructure, radar, and aerospace PAs. Laterally diffused MOSFET technologies remain significant in cellular base stations, while CMOS and silicon-germanium technologies support highly integrated lower-power transmitters. Digital-intensive transmitters increasingly combine RF PAs with real-time sensing, adaptive bias, DPD, and machine-learning-assisted calibration. Machine learning can help model nonlinear behavior or predict control settings, but it does not remove the need for physically valid training data, stability guarantees, explainable limits, and protection against extrapolation outside the training domain. A black-box controller must never be permitted to violate device voltage, current, thermal, or spectral constraints. Advanced research includes broadband multi-way Doherty architectures, dynamic load modulation, reconfigurable matching networks, integrated antenna-PAs, ferroelectric or tunable devices, and co-design of power amplifiers with digital beamforming. The research challenge is increasingly system-level: energy efficiency must be assessed jointly with cooling, computation, embodied hardware cost, electromagnetic compatibility, and lifecycle reliability. Best-Practice Checklist- State clearly whether efficiency means drain efficiency, collector efficiency, PAE, or total transmitter efficiency.
- Use accepted rather than incident input power when calculating PAE.
- Specify waveform, bandwidth, crest factor, temperature, and measurement reference planes.
- Treat ideal Class E, F, and B results as limiting benchmarks.
- Design matching networks from large-signal impedances, not only small-signal S-parameters.
- Verify stability outside the operating band and under realistic source and load conditions.
- Include thermal and electrothermal behavior early in the design.
- Optimize average efficiency using the actual output-power probability distribution.
- Use DPD only after RF, clock, observation, and timing paths are properly characterized.
- Validate regulatory, reliability, and mismatch-protection requirements across production variation.
Chapter SummaryRF power amplifiers convert DC energy and RF drive power into useful RF output power. Their central design problem is the simultaneous achievement of efficiency, linearity, bandwidth, thermal reliability, and spectral compliance. Drain efficiency measures conversion of DC power into RF output power, whereas PAE also subtracts accepted RF input power. Class A provides strong linearity but low efficiency; Classes B and AB improve efficiency at the cost of bias and crossover considerations; Class C and switching classes achieve higher ideal efficiency through nonlinear or waveform-engineered operation. High-PAPR communication signals expose the poor back-off efficiency of fixed-supply linear PAs. Envelope tracking, envelope elimination and restoration, Doherty load modulation, outphasing, harmonic waveform engineering, and digital predistortion address different parts of this challenge. Each introduces trade-offs involving bandwidth, timing, matching, combiner loss, complexity, and robustness. Practical PA design requires nonlinear load-pull, electromagnetic and thermal co-design, stability analysis, calibrated measurement, and system-level consideration of waveform statistics. Contemporary solutions increasingly combine advanced semiconductor technologies with adaptive digital control, while maintaining strict physical and regulatory limits. Key TermsRF power amplifier: A circuit that delivers substantial radio-frequency power to a load. Power gain: Ratio of delivered RF output power to accepted RF input power. Drain efficiency: Ratio of RF output power to DC power supplied to the transistor. Power-added efficiency: Ratio of output RF power minus input RF power to DC power. PAPR: Ratio of a signal’s peak power to its average power. Back-off: Operation below a specified saturation or maximum linear output power. Compression: Reduction of gain caused by nonlinear amplitude limitation. Conduction angle: Portion of an RF cycle during which an active device conducts. Class A: Amplifier mode with approximately 360° conduction. Class B: Ideal push-pull mode with 180° conduction per device. Class AB: Mode with conduction between 180° and 360°. Class C: Mode with conduction below 180° and resonant waveform reconstruction. Class E: Switching mode using zero-voltage-switching waveform conditions. Class F: Harmonic-tuned mode that shapes voltage and current waveforms. Load modulation: Variation of an amplifier’s effective load as operating power changes. Doherty amplifier: A load-modulated PA using carrier and peaking paths. Outphasing: Representation of a varying-envelope signal by phase-shifted constant-envelope signals. Envelope tracking: Dynamic variation of PA supply voltage according to signal envelope. Digital predistortion: Digital inverse processing used to compensate PA nonlinearities. ACLR: Ratio describing power leaked into an adjacent channel relative to the wanted channel. Review QuestionsShort Answer Questions- Define drain efficiency and power-added efficiency, and distinguish their denominators.
- Why does a high-PAPR waveform reduce the average efficiency of a conventional fixed-supply PA?
- State the ideal maximum efficiency of a Class B amplifier and the assumptions behind it.
- What is the purpose of harmonic terminations in a Class F amplifier?
- Why is digital predistortion not, by itself, an efficiency-enhancement technique?
Long Answer Questions- Explain the operating principles, advantages, and limitations of Classes A, B, AB, C, E, and F.
- Derive the ideal maximum efficiency of a Class B push-pull amplifier.
- Describe the Doherty architecture and explain how load modulation improves back-off efficiency.
- Compare envelope tracking, envelope elimination and restoration, and outphasing.
- Discuss the role of nonlinear matching, stability analysis, thermal design, and measurement in PA development.
Analytical / Application Questions- A PA produces 25 W output power, consumes 60 W DC power, and accepts 1 W RF input power. Calculate drain efficiency and PAE. Explain why the two values differ.
- A transmitter must amplify an 8 dB-PAPR signal over 100 MHz bandwidth with stringent ACLR requirements. Compare a conventional Class AB, Doherty, and envelope-tracking solution and recommend one with justification.
- A measured PA is efficient at peak power but overheats during realistic traffic. Formulate a measurement and analysis plan using output-power statistics, thermal measurements, and efficiency-versus-back-off data to identify the cause.
Multiple Choice Questions with AnswersQuestion 1A PA delivers 40 W RF output, accepts 2 W RF input, and consumes 80 W DC power. What is its PAE? A. 25% B. 47.5% C. 50% D. 52.5% Correct Answer: B. 47.5% Question 2The ideal maximum efficiency of a sinusoidal Class B push-pull amplifier is approximately: A. 50.0% B. 63.7% C. 78.5% D. 100% Correct Answer: C. 78.5% Question 3Which PA metric subtracts accepted RF input power from RF output power before dividing by DC power? A. Power gain B. Drain efficiency C. Power-added efficiency D. Compression gain Correct Answer: C. Power-added efficiency Question 4The principal purpose of a Doherty peaking amplifier is to: A. Provide low-noise input matching B. Modulate the effective load seen by the carrier amplifier C. Eliminate all harmonic currents D. Maintain constant transistor quiescent current Correct Answer: B. Modulate the effective load seen by the carrier amplifier Question 5For a sinusoidal signal, PAPR is defined as: A. Average power divided by peak power B. Peak power divided by average power C. DC power divided by RF power D. Output power divided by input power Correct Answer: B. Peak power divided by average power Question 6Which operating class ideally uses approximately 180° conduction per transistor in a push-pull stage? A. Class A B. Class B C. Class C D. Class E Correct Answer: B. Class B Question 7Envelope tracking improves efficiency primarily by: A. Increasing the RF carrier frequency B. Varying the PA supply voltage with the signal envelope C. Removing the output matching network D. Forcing the transistor to conduct for 360° Correct Answer: B. Varying the PA supply voltage with the signal envelope Question 8In an ideal switching PA, efficiency is improved by reducing: A. The product of device voltage and current during switching B. The signal bandwidth to zero C. The output power at all times D. The transistor breakdown voltage Correct Answer: A. The product of device voltage and current during switching Question 9A 40 W-output PA consuming 80 W DC has heat dissipation, ignoring other losses, of approximately: A. 20 W B. 40 W C. 80 W D. 120 W Correct Answer: B. 40 W Question 10Digital predistortion is primarily used to: A. Compensate PA nonlinear distortion B. Replace the DC supply C. Increase transistor breakdown voltage D. Measure heatsink thermal resistance Correct Answer: A. Compensate PA nonlinear distortion
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