Oscillators and Frequency Synthesis

Introduction

Oscillators and frequency synthesizers are fundamental building blocks in radio-frequency (RF) systems. An oscillator converts direct-current power into a periodic electrical signal without requiring an externally applied periodic input. A frequency synthesizer generates one or more accurately controlled frequencies from a stable reference, usually by means of frequency division, multiplication, mixing, and phase locking.

In a receiver, the local oscillator determines channel translation and therefore directly affects tuning accuracy, image rejection, phase noise, and demodulation quality. In a transmitter, oscillator purity influences spectral-mask compliance, adjacent-channel interference, modulation accuracy, and electromagnetic compatibility. Modern wireless systems additionally require rapid frequency agility, fine frequency resolution, low phase noise, low spurious output, and low power consumption. These requirements create important trade-offs in RF design.

This chapter develops the operating principles, mathematical models, design equations, practical implementation issues, and performance evaluation methods for RF oscillators and frequency synthesizers.

Learning Objectives

After studying this chapter, the reader should be able to:

1. Explain the conditions required for sustained oscillation.
2. Distinguish feedback, negative-resistance, crystal, dielectric-resonator, and voltage-controlled oscillators.
3. Analyze oscillator startup, steady-state amplitude, frequency stability, and phase noise.
4. Design and evaluate a phase-locked-loop (PLL) frequency synthesizer.
5. Calculate division ratios, tuning resolution, loop bandwidth, and settling time under stated assumptions.
6. Select an appropriate oscillator or synthesizer architecture for a practical RF application.
7. Identify limitations involving noise, spurious signals, pulling, pushing, temperature, layout, and regulation.

1. Oscillation as an RF Circuit Function

An oscillator contains an energy-storage or resonant network, an active device that supplies energy, and a feedback or coupling mechanism. The resonator determines the preferred frequency, while the active device compensates the losses of the resonator. In the idealized steady state, energy supplied during each cycle equals energy dissipated during that cycle.

1.1 The Barkhausen conditions

For a linear feedback oscillator with forward gain A(jω) and feedback factor β(jω), the loop gain is

where ω is angular frequency in radians per second. The characteristic equation is

A necessary small-signal condition for oscillation at angular frequency ω₀ is

and

The phase condition means that the signal returning to the input is in phase with the original signal. The magnitude condition describes the steady-state boundary. In practice, startup requires loop magnitude slightly greater than unity, whereas nonlinear amplitude limiting reduces the effective gain until the average loop magnitude becomes unity. The Barkhausen conditions are therefore necessary but not, by themselves, sufficient to guarantee reliable startup or low-distortion operation.

1.2 Resonance and quality factor

A resonator stores electric and magnetic energy. Its quality factor is

For a narrowband resonator, the approximate fractional bandwidth is

where f₀ is resonant frequency in hertz and BW is the approximately 3-dB bandwidth in hertz. A high-Q resonator generally improves frequency selectivity and reduces sensitivity to some disturbances, but it may increase startup time and restrict tuning range.

For a parallel LC resonator,

where L is inductance in henries and C is capacitance in farads. This ideal relation neglects parasitic resistance, transistor capacitance, package capacitance, and coupling loading.

2. Major RF Oscillator Architectures

2.1 Feedback oscillators

In a feedback oscillator, an amplifier is connected to a frequency-selective feedback network. Common forms include Colpitts, Clapp, Hartley, and cross-coupled differential oscillators.

The Colpitts oscillator uses a capacitive divider. In its simplest approximation, the effective series capacitance of capacitors C₁ and C₂ is

and the resonant frequency is approximately

The Clapp oscillator adds a capacitor in series with the inductor. If this added capacitor is much smaller than the divider capacitors, it dominates the equivalent capacitance and improves frequency stability against transistor capacitance variation.

The Hartley oscillator uses an inductive divider. Its resonant inductance is approximately the sum of the two section inductances, including mutual-coupling terms when applicable.

At integrated-circuit RF frequencies, the cross-coupled LC oscillator is especially common. Two transistors provide negative differential resistance that compensates the loss of a differential LC tank. The tank establishes frequency, and the cross-coupled pair supplies energy with approximately differential switching action. This architecture provides good compatibility with differential mixers, dividers, and PLLs, but its tuning range and phase noise depend strongly on tank inductance, varactor design, bias current, and device noise.

2.2 Negative-resistance interpretation

A resonator can be represented by a positive loss resistance R_loss. An active circuit connected to it can present a negative resistance R_neg. Startup requires

with the sign convention that R_loss > 0 represents dissipation. At steady state, nonlinear device behavior reduces the magnitude of the negative resistance until the average net resistance is approximately zero:

This interpretation is particularly useful for oscillator design because it separates resonator loss from active-device capability. A practical design includes a startup margin: the small-signal negative resistance should exceed the loss by a sufficient factor to tolerate process, voltage, temperature, and loading variations.

2.3 Crystal and ceramic oscillators

Quartz crystals use mechanical resonance and can provide very high quality factor and excellent frequency stability. They are commonly used as reference oscillators in synthesizers. Their disadvantages include limited tuning range, sensitivity to drive level, aging, and package or load-capacitance effects.

A crystal oscillator should be designed for the specified load capacitance and drive level. Excessive drive can cause aging, nonlinear operation, or damage; insufficient drive can produce unreliable startup.

2.4 Dielectric-resonator and cavity oscillators

Dielectric resonators and cavities offer high Q at microwave frequencies. They can achieve low phase noise but are physically larger and less easily integrated than on-chip LC resonators. Mechanical vibration, temperature variation, coupling structures, and packaging must be considered.

2.5 Voltage-controlled oscillators

A voltage-controlled oscillator (VCO) changes its output frequency as a function of a control voltage. Around an operating point,

where f_c is the center frequency, v_c is control voltage, v_c0 is the nominal control voltage, and K_VCO is the tuning sensitivity in hertz per volt. In angular-frequency notation, the sensitivity is K_ω in radians per second per volt.

The linear approximation is local. Real VCO tuning curves are nonlinear, and K_VCO varies with frequency, voltage, temperature, and process. A large tuning sensitivity improves frequency range but generally increases the conversion of control-line noise into phase noise. Consequently, the control voltage must be filtered and routed carefully.

2.6 Digitally controlled oscillators

A digitally controlled oscillator (DCO) uses switched capacitor banks, digitally controlled varactors, or digitally adjustable delay elements. DCOs are attractive in digitally intensive transceivers because calibration, correction, and control can be performed in the digital domain. Quantization of the tuning word can create discrete frequency steps and spurious components, so element matching, scrambling, calibration, and noise-shaping techniques may be required.

3. Oscillator Startup, Amplitude, and Frequency Stability

3.1 Startup

Startup begins with thermal noise, device noise, switching transients, or an external disturbance. If the small-signal loop gain exceeds unity at a resonant frequency, the oscillation amplitude grows. A simplified exponential model is

where v₀ is initial amplitude, σ is the small-signal growth rate in inverse seconds, ω₀ is angular frequency, and φ₀ is initial phase. This model is valid only while the circuit remains approximately linear.

As amplitude increases, transistor compression, current limiting, bias modulation, or explicit amplitude-control circuitry reduces the effective loop gain. Poor amplitude control can increase distortion, phase noise, supply sensitivity, or device stress.

3.2 Frequency pulling and pushing

Frequency pulling is the change in oscillator frequency caused by load impedance variation. Frequency pushing is the change caused by supply-voltage or bias variation. Buffer amplifiers, isolation networks, regulated supplies, and careful impedance control reduce both effects.

The oscillator frequency also varies with temperature. A first-order temperature coefficient may be written as

where α_T is the fractional temperature coefficient in inverse kelvin and ΔT is temperature change in kelvin. Crystal oscillators, temperature-compensated crystal oscillators (TCXOs), oven-controlled crystal oscillators (OCXOs), and calibration loops are used when tighter stability is required.

3.3 Phase noise

An ideal oscillator has a spectral line at its nominal frequency. A real oscillator exhibits random phase fluctuations, producing spectral sidebands. Single-sideband phase noise is commonly specified as

where P₁SSB(Δf) is the single-sideband noise power measured in a 1-Hz bandwidth at offset Δf from the carrier, and P_carrier is carrier power. The unit dBc/Hz means decibels relative to the carrier per hertz.

Leeson’s model gives a useful, though approximate, framework for oscillator phase noise. One common form is

where F is a device noise factor, k is Boltzmann’s constant, T is absolute temperature in kelvin, P_s is signal power in watts, Q_L is loaded quality factor, and Δf is offset frequency in hertz. The formula assumes a simplified linear resonator model and does not fully describe flicker-noise upconversion, cyclostationary operation, or close-in measurement effects. It is therefore a design model rather than a universal law.

Phase noise in a receiver can convert to reciprocal mixing: a strong adjacent interferer mixes with oscillator noise and appears inside the desired channel. In a transmitter it broadens the transmitted spectrum and may degrade error-vector magnitude (EVM).

4. Frequency Synthesis

Frequency synthesis is the controlled generation of output frequencies from a reference frequency. A synthesizer may be direct, indirect, or hybrid.

4.1 Direct synthesis

Direct analog synthesis uses mixers, multipliers, filters, and dividers to generate frequencies from a reference. It can provide rapid switching and potentially low close-in phase noise, but it often requires many filters and has substantial hardware complexity.

Direct digital synthesis (DDS) uses a phase accumulator. If the accumulator has N bits, the reference clock is f_clk, and the frequency-control word is FTW, then

The frequency resolution is

The formula assumes an ideal accumulator and clock. Practical DDS output also contains clock feedthrough, quantization spurs, images, and digital-to-analog-converter limitations. An output reconstruction filter is normally required.

4.2 Integer-N PLL synthesis

A phase-locked loop compares a divided VCO output with a reference. In lock,

Therefore,

where N and R are positive integer division ratios. The output frequency resolution is normally f_ref ÷ R, although the usable step may be constrained by loop design and reference spurs.

A basic charge-pump PLL consists of a phase-frequency detector, charge pump, loop filter, VCO, and feedback divider. The phase-frequency detector produces pulses proportional to phase or frequency error. The charge pump converts these pulses into current, and the loop filter converts current into a control voltage.

4.3 Fractional-N PLL synthesis

A fractional-N PLL permits an average division ratio such as

so that

where α is the fractional part. In practical fractional-N PLLs, the divider alternates among integer values so that its time-average ratio equals N_eff. A sigma-delta modulator shapes quantization noise toward frequencies where it can be filtered or tolerated. Fractional spurs may still result from periodic patterns, mismatch, leakage, and nonideal charge-pump behavior.

4.4 PLL dynamics

For a charge-pump PLL, a simplified open-loop transfer function can be represented as

where I_CP is charge-pump current in amperes, K_VCO is VCO sensitivity in radians per second per volt, Z(s) is loop-filter impedance in ohms, N is feedback division ratio, and s is the complex-frequency variable in inverse seconds. The factor 2π converts phase-detector frequency units into angular-frequency units under the stated convention.

The closed-loop bandwidth determines the division of noise sources. Within the loop bandwidth, reference and phase-detector noise are transferred relatively strongly to the output; outside it, VCO noise is less attenuated by feedback and usually dominates. The optimum bandwidth is therefore a compromise among reference noise, VCO noise, settling time, reference spurs, and stability.

For a well-damped second-order approximation, the settling time to a small specified error is often estimated in proportion to

where ζ is damping ratio and ω_n is natural angular frequency. This is an engineering approximation, commonly associated with a settling criterion near 2 percent for a standard second-order response; actual PLL settling depends on loop order, frequency step, nonlinear tuning range, cycle slipping, and the measurement definition.

4.5 PLL noise transfer

If H(s) is the closed-loop transfer from reference phase to output phase, then the complementary VCO-noise transfer is approximately

for a normalized linear feedback model. This relation illustrates why increasing loop bandwidth suppresses more VCO noise but transfers more reference and detector noise. In a complete design, each noise source is passed through its own transfer function and the resulting powers, not amplitudes, are summed when sources are uncorrelated.

5. Worked Design Examples

Example 1: LC oscillator frequency

An ideal LC tank uses L = 8 nH and an effective capacitance C = 2.0 pF. Determine its resonant frequency.

Using

and converting units,

L = 8 × 10^−9 H and C = 2.0 × 10^−12 F. Thus,

LC = 16 × 10^−21 s² and √(LC) = 4.0 × 10^−10 s. Therefore,

f₀ = 1 ÷ (2π × 4.0 × 10^−10) ≈ 398 MHz.

This is an ideal value. Pad capacitance, transistor capacitance, inductor self-resonance, routing, and load coupling will shift the practical frequency.

Example 2: Integer-N synthesizer

A reference frequency of 20 MHz is divided by R = 2, and the feedback divider is N = 73. The output frequency is

If R is fixed at 2, changing N by one changes output frequency by 10 MHz. Fine resolution would require a lower comparison frequency, a fractional-N architecture, or an additional output divider/mixing stage.

Example 3: DDS resolution

A DDS has a 48-bit phase accumulator and a 100 MHz clock. Its ideal frequency resolution is

This extremely fine mathematical resolution does not imply equal practical accuracy. Actual accuracy is limited by clock accuracy, phase noise, spurs, DAC resolution, reconstruction filtering, and numerical implementation.

6. Practical Design Methodology

A reliable oscillator or synthesizer should be designed from system requirements rather than from nominal frequency alone. Important requirements include:

• frequency range and channel spacing;
• tuning speed and allowable settling error;
• phase-noise mask and integrated jitter;
• output power and waveform purity;
• supply voltage, power consumption, and temperature range;
• allowable reference and fractional spurs;
• load impedance and isolation requirements;
• calibration capability and production tolerance.

A practical workflow is as follows:

1. Select the reference source based on stability, aging, phase noise, and cost.
2. Select direct synthesis, DDS, integer-N PLL, fractional-N PLL, or a hybrid architecture.
3. Determine the VCO range, divider ratios, and required overlap between tuning bands.
4. Design the loop filter using a complete small-signal model, including parasitic poles and zeros.
5. Check lock range, capture behavior, cycle slipping, stability margin, and transient settling.
6. Simulate phase noise and spurs using measured or vendor-specified noise models.
7. Design grounding, supply filtering, shielding, and signal routing to prevent reference leakage and injection pulling.
8. Validate the prototype over process, voltage, temperature, load, and modulation conditions.

Layout and implementation

The resonator is sensitive to parasitic inductance and capacitance. Tank nodes should be short, symmetrical, and physically isolated from digital clocks. Differential routing reduces common-mode coupling but does not eliminate substrate or supply coupling. VCO supplies commonly require low-noise regulation and dedicated filtering. PLL charge-pump and control-voltage nodes should be shielded from high-slew digital signals.

Measurement equipment can introduce misleading results. Spectrum-analyzer phase-noise measurements require an appropriate noise floor, carrier power, offset range, resolution bandwidth, and averaging method. Reference spurs should be distinguished from broadband phase noise, and analyzer residual noise should be verified before accepting a result.

7. Applied Case: A Fractional-N Local Oscillator for a Wireless Receiver

The following is an illustrative engineering case rather than a report of a particular commercial product.

Background

A receiver must tune from 2.40 GHz to 2.48 GHz in 1-MHz channels. It uses a 40-MHz TCXO and requires low enough phase noise to preserve the specified modulation quality. The receiver also requires rapid retuning for frequency hopping.

Problem

An integer-N PLL using a 40-MHz comparison frequency cannot directly provide 1-MHz resolution without dividing the reference by 40. That would reduce the comparison frequency to 1 MHz, increase the required division ratio, and generally worsen in-band phase noise and settling behavior.

Analysis

A fractional-N PLL can maintain a high comparison frequency while creating 1-MHz average frequency steps. With a VCO operating near 2.4 GHz and a 40-MHz reference, the average division ratio is approximately 60. For a desired output frequency f_out, the required normalized ratio is

At 2.400 GHz, N_eff = 60. At 2.401 GHz, N_eff = 60.025. The fractional control therefore changes the average ratio by 0.025 while retaining the 40-MHz comparison frequency.

Approach and solution

The design uses a low-noise TCXO, a differential LC VCO, a charge-pump PLL, and a sigma-delta fractional divider. The loop bandwidth is selected after comparing measured VCO noise with reference and detector noise. A moderate bandwidth is used to balance VCO-noise suppression and reference-spur rejection. VCO tuning is divided into overlapping capacitor-bank bands so that the control voltage remains away from both tuning-rail extremes.

Calibration measures the VCO frequency at startup and selects the appropriate coarse band. The fractional word then establishes the channel frequency. Supply filtering is separated for the VCO, charge pump, and digital divider. The reference clock is routed away from the VCO tank and control line.

Outcome

The architecture achieves fine channel spacing without reducing the comparison frequency to 1 MHz. The main residual risks are fractional spurs, reference leakage, calibration errors, and retuning transients. These are evaluated through phase-noise plots, spur tables, frequency-step measurements, and temperature testing.

Learning points

The case illustrates that frequency resolution, phase noise, settling time, and spur performance are coupled design variables. Fractional-N synthesis solves a resolution problem but introduces quantization and fractional-spur mechanisms that must be managed rather than ignored.

8. Challenges, Limitations, and Contemporary Developments

No oscillator architecture is universally superior. High-Q resonators improve spectral purity but limit tuning range. Wide-range VCOs tune easily but may have higher phase noise and gain variation. Wider PLL bandwidth can improve settling and suppress VCO noise, but it can increase reference-noise transfer and spurs. DDS offers exceptional frequency resolution but requires careful image and spur management.

Contemporary RF integrated circuits increasingly combine analog oscillators, digital calibration, digitally controlled capacitor banks, background frequency tracking, and on-chip noise monitoring. Machine-learning methods may assist calibration, anomaly detection, and prediction of process or temperature drift, but they do not replace physical noise models, stability analysis, or measurement. Their use must be validated across corners and must not obscure safety, traceability, or regulatory compliance.

Frequency synthesizers must comply with applicable spectrum regulations, including limits on unwanted emissions, conducted spurious output, occupied bandwidth, and frequency accuracy. Design documentation should state reference accuracy, calibration assumptions, test conditions, and uncertainty. Security-sensitive systems may also require protection against injection locking, spoofed references, and intentional interference.

Best practice is to specify oscillator performance using complete conditions: carrier frequency, output power, temperature, supply voltage, offset frequency, measurement bandwidth, integration limits, and whether values are typical or guaranteed. A single phase-noise number is not an adequate description of a synthesizer.

Chapter Summary

An RF oscillator sustains periodic motion by compensating resonator losses with active-device energy. The Barkhausen conditions express the required phase and loop-gain relationships, while the negative-resistance model provides a practical circuit-design interpretation. LC, crystal, dielectric-resonator, cavity, VCO, and digitally controlled oscillators serve different requirements for tuning range, stability, integration, power, and spectral purity.

Oscillator performance is governed by startup margin, amplitude limiting, quality factor, pulling, pushing, temperature coefficient, and phase noise. Frequency synthesizers generate accurate frequencies using direct methods, DDS, integer-N PLLs, fractional-N PLLs, or hybrid architectures. PLL design requires simultaneous consideration of division ratios, loop bandwidth, damping, settling, reference noise, VCO noise, and spurious signals. Practical success depends heavily on calibration, layout, isolation, supply filtering, measurement discipline, and regulatory compliance.

Key Terms

Oscillator: Circuit that generates a periodic signal from a DC power source.

Resonator: Energy-storage network that selects a preferred frequency.

Barkhausen condition: Magnitude and phase conditions associated with sustained feedback oscillation.

Quality factor, Q: Measure of stored energy relative to dissipated energy in a resonator.

Negative resistance: Active-circuit resistance that supplies energy to compensate resonator loss.

VCO: Oscillator whose frequency is controlled by an analog voltage.

DCO: Oscillator whose frequency is controlled digitally.

Phase noise: Random phase fluctuation represented as spectral noise around a carrier.

Frequency pulling: Frequency change caused by variation in load impedance.

Frequency pushing: Frequency change caused by supply or bias variation.

PLL: Feedback system that locks an oscillator phase or frequency to a reference.

Reference oscillator: Stable source used as the timing basis for synthesis.

Integer-N synthesis: PLL synthesis using an integer feedback division ratio.

Fractional-N synthesis: PLL synthesis using a noninteger average division ratio.

DDS: Digital direct synthesis using a phase accumulator and frequency-control word.

Charge pump: Circuit that converts phase-detector pulses into loop-filter current.

Loop bandwidth: Frequency range over which PLL feedback substantially acts.

Reference spur: Discrete unwanted spectral component related to reference operation.

Reciprocal mixing: Conversion of interferer energy by oscillator phase noise.

Cycle slipping: Temporary loss of complete phase tracking during a PLL transient.

Review Questions

Short Answer Questions

1. State the magnitude and phase conditions for feedback oscillation.
2. Define oscillator quality factor and explain its significance.
3. Distinguish frequency pulling from frequency pushing.
4. What is the function of a charge pump in a PLL?
5. Define fractional-N frequency synthesis.

Long Answer Questions

1. Explain the operation of a cross-coupled LC oscillator using both feedback and negative-resistance interpretations.
2. Discuss the physical origins of oscillator phase noise and the assumptions behind Leeson’s model.
3. Compare crystal, LC, dielectric-resonator, VCO, and DDS-based frequency-generation approaches.
4. Derive the frequency relationship for an integer-N PLL and explain the roles of the reference and feedback dividers.
5. Discuss how loop bandwidth affects reference noise, VCO noise, settling time, and reference spurs.

Analytical / Application Questions

1. An LC oscillator uses L = 10 nH and C = 1.5 pF. Calculate the ideal resonant frequency and identify two parasitic effects that could shift it.
2. A PLL uses a 25-MHz reference, R = 5, and N = 384. Calculate the output frequency and the frequency step if N changes by one.
3. A receiver requires 500-kHz channel spacing but must retain a 20-MHz comparison frequency. Recommend an appropriate synthesis architecture and justify the choice in terms of resolution, phase noise, and spurious performance.

Multiple Choice Questions with Answers

Question 1

Which condition describes the phase requirement for sustained feedback oscillation?

A. The loop phase shift is 90° at all frequencies

B. The loop phase shift is an integer multiple of 2π at the oscillation frequency

C. The feedback signal is always opposite in phase

D. The amplifier phase must be zero at every frequency

Correct Answer: B. The loop phase shift is an integer multiple of 2π at the oscillation frequency

Question 2

For an ideal LC resonator, if inductance is increased while capacitance is constant, the resonant frequency will:

A. Increase

B. Remain unchanged

C. Decrease

D. Become independent of Q

Correct Answer: C. Decrease

Question 3

A practical oscillator requires startup when its small-signal loop-gain magnitude is:

A. Less than unity

B. Exactly zero

C. Slightly greater than unity

D. Always equal to the resonator Q

Correct Answer: C. Slightly greater than unity

Question 4

Which oscillator generally provides the highest frequency stability among the listed choices?

A. Free-running wideband LC VCO

B. Quartz-crystal oscillator

C. Relaxation oscillator

D. Unbuffered ring oscillator

Correct Answer: B. Quartz-crystal oscillator

Question 5

In an integer-N PLL, the locked output frequency is:

A. f_ref × R × N

B. f_ref ÷ (R + N)

C. (N ÷ R) × f_ref

D. N ÷ (R × f_ref)

Correct Answer: C. (N ÷ R) × f_ref

Question 6

A 100-MHz reference clock drives a 32-bit ideal DDS. What is its frequency resolution?

A. Approximately 23.3 mHz

B. Approximately 23.3 Hz

C. Approximately 2.33 kHz

D. Approximately 3.2 GHz

Correct Answer: A. Approximately 23.3 mHz

Question 7

The primary purpose of a PLL loop filter is to:

A. Convert RF power directly into DC power

B. Shape loop dynamics and smooth charge-pump output

C. Increase the crystal’s mechanical Q

D. Eliminate the need for a feedback divider

Correct Answer: B. Shape loop dynamics and smooth charge-pump output

Question 8

Increasing PLL loop bandwidth generally causes which result?

A. More VCO noise suppression but potentially greater reference-noise transfer

B. Elimination of all reference spurs

C. Zero settling time

D. Removal of the need for a stable reference

Correct Answer: A. More VCO noise suppression but potentially greater reference-noise transfer

Question 9

Phase noise is commonly specified in:

A. dBc/Hz at a stated offset

B. ohms per volt

C. watts per henry

D. degrees kelvin per hertz

Correct Answer: A. dBc/Hz at a stated offset

Question 10

In a fractional-N PLL, a sigma-delta modulator is primarily used to:

A. Increase resonator inductance

B. Shape divider quantization noise

C. Remove the reference oscillator

D. Convert voltage directly into temperature

Correct Answer: B. Shape divider quantization noise