Quantum Programming and Simulation

Chapter 4
Quantum Gates and Circuit Models

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Quantum Gates and Circuit Models

Introduction

Quantum algorithms are expressed as sequences of operations on quantum bits (qubits). These operations are called quantum gates, and the graphical arrangement of gates is a quantum circuit. Together, gates and circuits provide the main programming model used by platforms such as IBM Quantum, IonQ, Rigetti, and neutral-atom systems.

A classical logic gate generally maps bits to bits and may discard information. A quantum gate, by contrast, must be reversible: it maps a valid quantum state to another valid quantum state without losing information. This requirement has important consequences. Quantum gates are represented by unitary matrices, measurement is treated separately from reversible computation, and apparently complex operations can often be transformed into equivalent circuits.

This chapter develops the principal one- and multi-qubit gates, explains circuit notation, and examines universality, entanglement, circuit resources, hardware connectivity, decomposition, and circuit optimization.

Learning Objectives

By the end of this chapter, you should be able to:

  • represent common quantum gates using matrices and circuit symbols;
  • calculate the action of gates on basis states and general superpositions;
  • distinguish single-qubit, controlled, and multi-qubit operations;
  • explain reversibility, unitarity, universality, and entanglement;
  • construct and analyze circuits using Pauli, Hadamard, phase, rotation, controlled, and swap gates;
  • estimate gate count, circuit depth, and connectivity requirements;
  • decompose high-level gates into hardware-supported operations;
  • identify equivalent circuits using algebraic identities and commutation rules;
  • evaluate practical design trade-offs in a quantum programming workflow.

1. Qubits, States, and Circuit Notation

A classical bit is either 0 or 1. A qubit has computational-basis states |0⟩ and |1⟩ and may also occupy a superposition:

|ψ⟩ = α|0⟩ + β|1⟩

Here α and β are complex probability amplitudes. A physical state must be normalized:

|α|² + |β|² = 1

The quantities |α|² and |β|² are the probabilities of measuring 0 and 1, respectively, in the computational basis. Normalization is dimensionless and assumes an ideal projective measurement in that basis.

A general n-qubit state is a vector with 2ⁿ amplitudes:

|ψ⟩ = ∑x=02ⁿ−1 cx|x⟩, ∑x=02ⁿ−1|cx|² = 1

The symbol |x⟩ denotes a computational-basis bit string. For example, two qubits have basis states |00⟩, |01⟩, |10⟩, and |11⟩.

A circuit is normally drawn from left to right. Horizontal wires represent qubits, boxes represent gates, and a measurement symbol represents conversion of a quantum state into a classical result. Time, or gate sequence order, generally increases from left to right. A gate acting on several wires is a multi-qubit operation.

For independent qubits, the combined state is represented using the tensor product. If the first qubit is |a⟩ and the second is |b⟩, their joint state is |a⟩⊗|b⟩, often written |ab⟩. The dimension of the state vector multiplies: two qubits require four amplitudes, while n qubits require 2ⁿ amplitudes.

2. Unitary Gates and Reversibility

A quantum gate is represented by a unitary matrix U satisfying

U†U = UU† = I

where U† is the conjugate transpose of U and I is the identity matrix. The state transformation is

|ψ'⟩ = U|ψ⟩

Unitarity preserves inner products, norms, and therefore total probability. It also guarantees that the operation has an inverse:

U⁻¹ = U†

Thus, every ideal quantum gate is reversible. Measurement is not unitary and is not reversible in the ordinary sense because it produces a classical outcome and generally destroys phase information.

A global phase does not affect measurement probabilities. The states |ψ⟩ and e^{iγ}|ψ⟩, where γ is real, are physically equivalent when considered in isolation. A relative phase, however, affects interference and is operationally significant.

3. Fundamental Single-Qubit Gates

3.1 Identity and Pauli Gates

The identity gate leaves a state unchanged:

I = [1 0; 0 1]

The Pauli-X gate is the quantum analogue of a bit flip:

X = [0 1; 1 0]

It acts as X|0⟩ = |1⟩ and X|1⟩ = |0⟩. On a general state,

X(α|0⟩ + β|1⟩) = β|0⟩ + α|1⟩

The Pauli-Y and Pauli-Z gates are

Y = [0 −i; i 0], Z = [1 0; 0 −1]

Their actions on basis states are Y|0⟩ = i|1⟩, Y|1⟩ = −i|0⟩, Z|0⟩ = |0⟩, and Z|1⟩ = −|1⟩. The Z gate does not change computational-basis probabilities, but it changes the phase of |1⟩ and can therefore change later interference.

Each Pauli gate is Hermitian and self-inverse:

X² = Y² = Z² = I

The term “bit flip” refers primarily to X, while Z is commonly called a phase flip. Y combines bit and phase changes, up to phase conventions.

3.2 Hadamard Gate

The Hadamard gate creates and removes balanced superpositions:

H = 1/√2 [1 1; 1 −1]

Its basis-state actions are

H|0⟩ = (|0⟩ + |1⟩)/√2
H|1⟩ = (|0⟩ − |1⟩)/√2

Applying H twice gives the identity, H² = I. The minus sign in H|1⟩ is a relative phase and is essential for interference. Hadamard gates are widely used in phase estimation, search algorithms, state preparation, and the creation of entanglement when followed by a controlled operation.

3.3 Phase Gates

The phase gate S and the T gate are defined by

S = [1 0; 0 i], T = [1 0; 0 eiπ/4]

Their action is to multiply the |1⟩ component by a phase while leaving |0⟩ unchanged. Important relations include S² = Z and T² = S. The adjoints S† and T† apply the opposite phases.

More generally, the phase rotation gate is

P(λ) = [1 0; 0 eiλ]

where λ is a real angle measured in radians. The special cases P(π) = Z, P(π/2) = S, and P(π/4) = T follow directly. A phase gate has no observable effect on a computational-basis state’s immediate probabilities, but it affects subsequent gates that mix amplitudes.

3.4 Rotation Gates

The standard rotations about the x, y, and z axes are

Rx(θ) = cos(θ/2)I − i sin(θ/2)X
Ry(θ) = cos(θ/2)I − i sin(θ/2)Y
Rz(θ) = cos(θ/2)I − i sin(θ/2)Z

The parameter θ is a real rotation angle in radians. Explicitly,

Ry(θ) = [cos(θ/2) −sin(θ/2); sin(θ/2) cos(θ/2)]

and

Rz(θ) = [e−iθ/2 0; 0 eiθ/2]

These definitions describe rotations on the Bloch sphere. Different software systems may use conventions that differ by a global phase, especially for Rz. Such differences do not change isolated measurement probabilities but must be handled consistently when gates are composed.

Useful identities include R_x(0) = R_y(0) = R_z(0) = I and R_a(θ)† = R_a(−θ), where a denotes x, y, or z. Also, rotations about the same axis add:

Rz(α)Rz(β) = Rz(α + β)

The order of rotations about different axes generally matters.

4. Controlled and Multi-Qubit Gates

A controlled operation applies a target gate only when a control qubit has a specified value. The controlled-U operation has block form

CU = |0⟩⟨0| ⊗ I + |1⟩⟨1| ⊗ U

This expression assumes the first qubit is the control and the control condition is |1⟩. The projectors |0⟩⟨0| and |1⟩⟨1| ensure that exactly one branch receives U.

4.1 Controlled-NOT

The controlled-NOT, or CNOT, applies X to the target when the control is 1. In the ordered basis |00⟩, |01⟩, |10⟩, |11⟩, its matrix is

CNOT = [1 0 0 0; 0 1 0 0; 0 0 0 1; 0 0 1 0]

Its basis-state action is |a,b⟩ → |a, b ⊕ a⟩, where ⊕ denotes addition modulo 2. CNOT is self-inverse. It is also an entangling gate: together with arbitrary single-qubit gates, it can generate entangled states.

For example, starting with |00⟩,

|00⟩ → H⊗I → (|00⟩ + |10⟩)/√2 → CNOT → (|00⟩ + |11⟩)/√2

The final state is a Bell state. Measuring either qubit gives a random result, but the two results always agree. This correlation cannot be represented as a product of two independent single-qubit states.

4.2 Controlled-Z and Controlled Phase

The controlled-Z gate applies Z to the target when the control is 1. Its diagonal matrix is

CZ = diag(1, 1, 1, −1)

It is symmetric with respect to the two qubits, unlike the usual circuit drawing of CNOT, which distinguishes control and target. CNOT and CZ are related by Hadamard gates on the target:

CNOTc,t = (Ic ⊗ Ht) CZ (Ic ⊗ Ht)

A controlled phase gate applies a phase only to a selected computational-basis component. Controlled phases are important in quantum Fourier transforms and variational circuits.

4.3 SWAP and Other Multi-Qubit Gates

The SWAP gate exchanges two qubits:

SWAP|a,b⟩ = |b,a⟩

It can be decomposed into three CNOT gates:

SWAPa,b = CNOTa,b CNOTb,a CNOTa,b

The rightmost operation is applied first under conventional matrix composition. SWAP is useful when logical qubits must be moved to satisfy hardware connectivity, but its decomposition adds depth and error exposure.

A Toffoli gate, or controlled-controlled-NOT, flips a target only when two control qubits are both 1. It is important for reversible classical computation and arithmetic. Although it is a primitive on some platforms, it is commonly decomposed into one- and two-qubit gates.

5. Universality and Gate Decomposition

A gate set is universal if circuits formed from that set can approximate, to arbitrary accuracy, any unitary operation on a finite number of qubits. A standard practical universal family consists of arbitrary single-qubit gates together with an entangling two-qubit gate such as CNOT.

The set {H, T, CNOT} is also universal for approximate quantum computation. The H and T gates form a discrete single-qubit set, while CNOT supplies entanglement. Exact implementation of every unitary is generally impossible with a finite discrete gate set, so approximation accuracy becomes relevant.

A useful structural result is that arbitrary multi-qubit unitaries can be decomposed into one-qubit operations and entangling two-qubit operations. In practice, compilers use identities, Euler-angle decompositions, and hardware-specific synthesis routines. One common single-qubit form is

U = eiα Rz(β)Ry(γ)Rz(δ)

where α, β, γ, and δ are real angles. This representation is valid for any 2 × 2 unitary U, with a global phase e^{iα}; conventions may distribute the phase differently.

A high-level gate may therefore be translated through several layers:

  1. algorithmic gate, such as a controlled rotation;
  2. logical gate set, such as CNOT and parameterized rotations;
  3. native hardware gates, such as cross-resonance, echoed interactions, or calibrated ion-trap pulses;
  4. physical control pulses.

Decomposition is not merely a mathematical exercise. Each additional operation can increase execution time, calibration demand, crosstalk, and accumulated error.

6. Circuit Resources and Hardware Constraints

6.1 Gate Count

Gate count is the number of operations in a circuit. It may be reported as total gates or separated into one-qubit and two-qubit counts. Since two-qubit gates are frequently less reliable than single-qubit gates, a weighted cost can be more informative than a raw count.

6.2 Circuit Depth

Circuit depth is the number of sequential layers when gates acting on disjoint qubits are scheduled in parallel. For example, gates on qubits 1 and 3 may occupy the same layer, but two gates sharing qubit 1 cannot generally do so.

Depth affects latency and exposure to decoherence. If a circuit has layers with durations τ₁, τ₂, …, τ_d, its ideal execution time is approximately

Tcircuit ≈ ∑j=1d τj

The approximation assumes layers execute sequentially, parallel gates within a layer have been assigned compatible timing, and measurement/reset overhead is excluded unless explicitly included.

A circuit may have a low gate count but high depth, or a higher gate count but low depth through parallelization. Both measures should therefore be reported.

6.3 Connectivity and Routing

Hardware qubits are connected according to which pairs can directly interact. If a desired two-qubit gate connects nonadjacent logical qubits, a compiler may insert SWAP operations or remap logical qubits. Routing changes gate count, depth, and error probability.

A connectivity-aware circuit should:

  • place frequently interacting logical qubits on nearby physical qubits;
  • minimize long-range interactions;
  • exploit symmetric gates such as CZ when possible;
  • delay or avoid SWAP operations;
  • account for directionality in hardware-controlled gates.

6.4 Error and Noise Considerations

Real devices experience gate errors, readout errors, relaxation, dephasing, leakage, and crosstalk. A simple independent-error model illustrates why shorter circuits are generally preferable. If each of n operations succeeds with probability p and errors are independent, the probability that all operations succeed is

Psuccess = pⁿ

Here p is dimensionless and 0 ≤ p ≤ 1. This is an illustrative model, not a complete noise theory: real errors may be correlated, gate-dependent, time-dependent, and affected by measurement and compilation.

For p = 0.99 and n = 100, P_success = 0.99¹⁰⁰ ≈ 0.366. This calculation shows why reducing unnecessary operations matters, although actual algorithmic success may not equal the probability that every physical gate is error-free.

7. Equivalent Circuit Transformations

Circuit identities allow programmers and compilers to simplify circuits without changing their logical action.

Inverses and cancellation

For any unitary U,

UU† = U†U = I

Therefore adjacent pairs such as X X, H H, CNOT CNOT, or Rz(θ)Rz(−θ) cancel. Cancellation is possible only when intervening operations do not alter the relevant ordering or qubit dependence.

Commutation

Operations on disjoint qubits commute:

(A⊗I)(I⊗B) = (I⊗B)(A⊗I)

Some gates on the same qubit also commute, such as two z rotations. Gates from different axes generally do not commute. Incorrectly exchanging them changes the circuit.

Conjugation

Conjugation by H exchanges X and Z:

HXH = Z, HZH = X

It also gives HYH = −Y. These relations explain the equivalence between CNOT and CZ and support basis changes in circuit design.

Parameter combination

Rotations about a common axis combine by adding angles. For example, Rz(π/3)Rz(π/6) = Rz(π/2). Parameter combination can substantially reduce variational circuits.

Reversal and inverse circuits

If a circuit implements U, reversing the gate order and replacing each gate with its adjoint implements U†. This is used in uncomputation, overlap estimation, and verification. A self-inverse circuit is unchanged under this replacement except for order.

8. Worked Example: Constructing and Analyzing a Bell-State Circuit

Consider two qubits initially in |00⟩. Apply H to qubit 0 and then CNOT with qubit 0 as control and qubit 1 as target.

First,

(H⊗I)|00⟩ = (|00⟩ + |10⟩)/√2

The CNOT maps |00⟩ to |00⟩ and |10⟩ to |11⟩. Thus,

CNOT(H⊗I)|00⟩ = (|00⟩ + |11⟩)/√2

The measurement probabilities are P(00) = 1/2, P(11) = 1/2, and P(01) = P(10) = 0. The state is entangled because no pair of single-qubit states |a⟩ and |b⟩ satisfies |a⟩⊗|b⟩ = (|00⟩ + |11⟩)/√2.

The circuit has two logical gates and depth two. It requires one entangling interaction between the two qubits. If the physical hardware does not connect these qubits directly, routing may add three CNOTs through a SWAP, or another platform-specific equivalent.

9. Applied Case: Mapping a Two-Qubit Algorithm to Hardware

Background

Consider an illustrative educational quantum processor with four physical qubits arranged in a line: q₀—q₁—q₂—q₃. Only neighboring qubits can directly receive a two-qubit gate.

Problem

A logical circuit prepares a Bell state between logical qubits L₀ and L₃:

(H on L₀) followed by CNOT(L₀,L₃)

The logical qubits are initially mapped as L₀ → q₀ and L₃ → q₃. The desired CNOT is not directly available.

Analysis

A compiler can route one logical qubit toward the other. For example, SWAP L₃ from q₃ to q₂, then to q₁, after which the logical qubits are adjacent. Each SWAP requires three CNOT-equivalent interactions, so two SWAPs introduce six such interactions before the desired CNOT. An alternative initial mapping could place L₀ and L₃ on adjacent physical qubits, eliminating routing for this isolated circuit.

This example illustrates that logical qubit labels have no inherent physical location. Mapping is a compilation decision. For a larger algorithm, the best mapping depends on all interaction requirements, not merely on one gate.

Approach and solution

A connectivity-aware compiler should examine the interaction graph of the algorithm. If L₀ and L₃ interact frequently, it should map them to adjacent physical qubits. If other logical pairs dominate, it may choose a different placement and accept occasional routing. The compiler should compare alternatives using a cost model that includes two-qubit gate count, depth, calibrated error rates, and readout requirements.

Outcome

The abstract circuit is mathematically unchanged, but its physical implementation can differ greatly in reliability. The best implementation is not necessarily the one with the fewest symbolic gates; it is the one that minimizes relevant hardware costs while preserving the algorithm’s action.

Learning points

  • logical circuits and physical circuits are distinct representations;
  • connectivity can dominate practical performance;
  • SWAP decomposition has a real cost;
  • qubit mapping should consider the complete interaction pattern;
  • compiler optimization is part of quantum programming, not an afterthought.

10. Best Practices for Circuit Construction

Begin with a clear state-preparation and measurement specification. Label qubits consistently, because ordering conventions can reverse the interpretation of matrix expressions and measurement strings. Verify small circuits by applying matrices to basis states or by using a simulator.

Prefer the simplest universal gate set supported by the target platform, but do not assume that symbolic simplicity implies physical efficiency. Inspect the transpiled circuit, including inserted SWAPs, basis-gate conversions, depth, and direction reversals.

Keep parameterized rotations symbolic until late in compilation when possible. Combine adjacent rotations, cancel inverse pairs, and parallelize gates on independent qubits. Avoid unnecessary basis changes and uncomputation only when the uncomputed information is no longer needed.

Use simulation to check ideal behavior and noise-aware simulation to study degradation. Test probabilities, expectation values, and output distributions rather than relying only on a visual circuit. On hardware, repeat measurements over many shots and distinguish statistical sampling variation from systematic device error.

11. Limitations and Contemporary Developments

Circuit models provide a powerful abstraction, but they hide physical details such as pulse shaping, calibration drift, leakage, crosstalk, and measurement latency. A circuit that is optimal under a gate-count metric may be inferior under a duration or error metric.

Current quantum software stacks increasingly support automated synthesis, topology-aware routing, pulse-level control, error mitigation, and dynamic circuits involving measurement and classical feed-forward. Variational algorithms introduce parameterized gates whose angles are optimized by a classical computer. The quality of these algorithms depends strongly on circuit depth, trainability, noise, and the expressiveness of the chosen ansatz.

Fault-tolerant quantum computing introduces another distinction: physical gates operate on noisy hardware, while logical gates operate on encoded logical qubits. Error-correcting codes may make logical operations reliable, but they add encoding, syndrome extraction, and potentially substantial resource overhead. Gate decomposition must therefore be evaluated at both physical and logical levels.

Ethically and professionally, quantum programmers should report assumptions, simulator settings, noise models, hardware versions, transpiler settings, and random seeds where relevant. Reproducibility is especially important because results can vary with compilation and calibration. Claims about quantum advantage should distinguish ideal simulation, noisy simulation, and experimental hardware evidence.

Chapter Summary

Quantum circuits represent computation as ordered, reversible unitary operations followed, when required, by measurement. Pauli gates provide bit and phase flips; Hadamard gates create basis-changing superpositions; phase and rotation gates control relative phase and geometric rotations. Controlled gates condition operations on other qubits, while CNOT, CZ, SWAP, and Toffoli illustrate essential multi-qubit functionality.

Universal computation can be built from arbitrary single-qubit operations and an entangling two-qubit gate, although practical systems use finite native gate sets and approximation. Decomposition translates algorithmic gates into hardware-supported operations. Gate count, circuit depth, duration, error, and connectivity jointly determine implementation quality. Equivalent transformations—including cancellation, commutation, conjugation, parameter combination, and inverse construction—support optimization without changing logical behavior.

The central professional lesson is that a quantum program has both a mathematical circuit and a physical realization. Effective quantum programming requires understanding both representations.

Key Terms

Qubit: The basic unit of quantum information.

Superposition: A linear combination of basis states with complex amplitudes.

Amplitude: A complex coefficient whose squared magnitude contributes to measurement probability.

Unitary: A matrix U satisfying U†U = I.

Quantum gate: A reversible unitary operation on one or more qubits.

Global phase: A common phase factor with no isolated measurement consequence.

Relative phase: A phase difference between amplitudes that can affect interference.

Pauli-X: The bit-flip gate.

Pauli-Y: A combined bit-and-phase transformation with imaginary coefficients.

Pauli-Z: The phase-flip gate.

Hadamard gate: A gate that exchanges computational and balanced superposition bases.

Controlled gate: An operation applied conditionally according to a control qubit.

CNOT: A controlled-X gate.

Entanglement: A nonseparable joint quantum state.

Universality: The ability of a gate set to approximate arbitrary finite-dimensional unitaries.

Decomposition: Rewriting a high-level operation as a sequence of available gates.

Circuit depth: The number of sequential executable gate layers.

Connectivity: The set of hardware qubit pairs that can directly interact.

Routing: Moving or remapping logical qubits to satisfy hardware connectivity.

Transpilation: Compilation of a circuit into a target device’s gate set and topology.

Review Questions

Short Answer Questions

  1. Why must an ideal quantum gate be unitary?
  2. What is the difference between a global phase and a relative phase?
  3. State the action of the Pauli-X and Pauli-Z gates on |0⟩ and |1⟩.
  4. What is circuit depth, and why can it differ from gate count?
  5. Why does limited hardware connectivity lead to SWAP operations?

Long Answer Questions

  1. Explain how a Hadamard gate followed by a CNOT gate creates a Bell state. Include the intermediate and final states.
  2. Compare CNOT, CZ, and SWAP gates in terms of action, symmetry, and practical use.
  3. Explain universality and describe why single-qubit gates plus an entangling two-qubit gate are sufficient in principle.
  4. Discuss how circuit identities such as cancellation, commutation, and conjugation support optimization.
  5. Explain why a quantum compiler must consider gate count, depth, connectivity, duration, and error rates together.

Analytical / Application Questions

  1. A circuit applies H, then Z, then H to one qubit. Determine the equivalent single-qubit operation and justify your answer using a gate identity.
  2. Two logical qubits interact repeatedly but are mapped to nonadjacent physical qubits in a linear device. Propose a mapping or routing strategy and evaluate its likely effect on depth and error.
  3. Compare two implementations: one has 20 gates with depth 12, and another has 26 gates with depth 7. Explain what additional hardware information is needed before selecting the better implementation.

Multiple Choice Questions with Answers

Question 1

Which condition defines a unitary quantum gate?

A. U†U = I

B. U†U = 0

C. U + U† = I for every U

D. The matrix must contain only real numbers

Correct Answer: A. U†U = I

Question 2

What is the action of the Pauli-X gate on |0⟩?

A. It leaves |0⟩ unchanged

B. It maps |0⟩ to |1⟩

C. It maps |0⟩ to −|0⟩

D. It maps |0⟩ to (|0⟩ + |1⟩)/√2

Correct Answer: B. It maps |0⟩ to |1⟩

Question 3

Which gate creates the state (|0⟩ + |1⟩)/√2 when applied to |0⟩?

A. Z

B. S

C. H

D. CNOT

Correct Answer: C. H

Question 4

What does a CNOT do when its control qubit is |0⟩?

A. It flips the control qubit

B. It applies X to the target

C. It applies Z to both qubits

D. It leaves the target unchanged

Correct Answer: D. It leaves the target unchanged

Question 5

Which state results from applying H to the first qubit of |00⟩ and then CNOT with the first qubit as control?

A. (|00⟩ + |11⟩)/√2

B. (|01⟩ + |10⟩)/√2

C. |01⟩

D. |10⟩

Correct Answer: A. (|00⟩ + |11⟩)/√2

Question 6

How many CNOT gates are required by the standard SWAP decomposition?

A. One

B. Two

C. Three

D. Four

Correct Answer: C. Three

Question 7

Which statement about circuit depth is correct?

A. It always equals the total gate count

B. It counts sequential layers, allowing compatible gates to run in parallel

C. It counts only measurement operations

D. It is independent of qubit connectivity

Correct Answer: B. It counts sequential layers, allowing compatible gates to run in parallel

Question 8

For independent operation success probability p = 0.99 and n = 100 operations, which expression gives the all-operations success probability in the simple model?

A. 0.99 + 100

B. 0.99/100

C. 100^0.99

D. 0.99^100

Correct Answer: D. 0.99^100

Question 9

Which relation is correct for Hadamard conjugation?

A. HXH = Z

B. HXH = X

C. HZH = Z

D. H² = H

Correct Answer: A. HXH = Z

Question 10

Why may a compiler insert SWAP gates into a circuit?

A. To violate unitarity deliberately

B. To increase the number of measurement outcomes

C. To move logical qubits so required interactions fit hardware connectivity

D. To convert every quantum state into |0⟩

Correct Answer: C. To move logical qubits so required interactions fit hardware connectivity

Quantum Programming and Simulation
Chapter 4 of 15