Chapter 7
Resonant, Soft-Switching and Multilevel Conversion
Post Graduate Program in Electrical Engineering
Power Electronics
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Post Graduate
Resonant, Soft-Switching and Multilevel Conversion
Introduction
Conventional pulse-width-modulated converters switch semiconductor devices while substantial voltage and current coexist. The resulting switching loss, electromagnetic interference (EMI), device stress and cooling burden become increasingly important as switching frequency, voltage or power rises. Resonant and soft-switching converters address these limitations by shaping circuit trajectories so that switching occurs near zero voltage or zero current. Multilevel converters address high-voltage and power-quality requirements by synthesizing staircase waveforms from several lower-voltage switching states.
These approaches are complementary. Resonant tanks are widely used in isolated power supplies, induction heating and wireless power transfer; quasi-resonant operation is common in compact flyback converters; auxiliary soft-switching networks improve PWM inverters; and multilevel topologies dominate medium-voltage drives, renewable-energy interfaces, static compensators and high-voltage direct-current systems.
Learning Objectives
After completing this chapter, the reader should be able to:
derive and interpret series-, parallel- and LLC-resonant converter characteristics;
distinguish zero-voltage switching (ZVS), zero-current switching (ZCS) and quasi-resonant operation;
establish approximate energy and timing conditions for soft switching;
evaluate soft-switching benefits against conduction, circulating-current and control penalties;
explain neutral-point-clamped, flying-capacitor, cascaded H-bridge and modular multilevel converters;
select modulation and capacitor-balancing methods for multilevel systems; and
integrate device, magnetic, thermal, insulation, control and regulatory requirements into converter design.
1. Resonance in Power Conversion
An ideal series LC network has resonant angular frequency
where L is inductance in henries, C is capacitance in farads, ω0 is in rad·s⁻¹ and f0 is in hertz. At resonance, the inductive and capacitive reactances cancel. Real circuits contain resistance and semiconductor, winding and core losses; consequently, resonance does not imply unbounded current.
For a series RLC circuit driven sinusoidally,
Zs(jω) = R + j\left(ωL-\frac{1}{ωC}\right)
The characteristic impedance and loaded quality factor are
These definitions apply to a series-loaded tank with equivalent resistance R. Other resonant topologies use different quality-factor definitions, so a quoted value of Q is meaningful only when its convention is stated.
1.1 Series-resonant conversion
A series-resonant converter places the load in the tank-current path. Its normalized input impedance is
where fs is switching frequency and fn is normalized frequency. At resonance, tank impedance is minimum and current is mainly load-limited. Below resonance, the input impedance is capacitive; above resonance, it is inductive. Inductive operation is often preferred for MOSFET bridges because lagging current can discharge output capacitances before turn-on, enabling ZVS.
For a sinusoidal source, the magnitude of capacitor voltage relative to source voltage is
This expression is specifically the capacitor-voltage magnification of a series RLC circuit; it is not the general dc conversion ratio of a rectified resonant converter.
Worked Example 1: Series-resonant capacitor voltage
A series tank has Qs=5 and operates at fn=1.256. Determine the capacitor-voltage gain under sinusoidal steady-state conditions.
Thus, the capacitor rms voltage is approximately 1.59 times the applied sinusoidal voltage. Component voltage rating must therefore not be inferred from source voltage alone.
1.2 Parallel-resonant conversion
In a basic parallel-resonant tank,
Yp(jω)=\frac{1}{R}+j\left(ωC-\frac{1}{ωL}\right)
At resonance, reactive admittances cancel and input impedance is maximum. Parallel resonance can behave as a current-fed voltage source and may maintain circulating tank current even at light load. This assists commutation but increases conduction loss. Practical series-parallel tanks combine both behaviors to obtain useful gain, load regulation and soft-switching ranges.
2. LLC Resonant Converter
The LLC converter contains a series resonant inductance Lr, resonant capacitance Cr and transformer magnetizing inductance Lm. Its two characteristic frequencies are
Because Lr+Lm>Lr, fp<fr. Above fr, the tank is generally inductive and gain is below unity. Between fp and fr, gain can exceed unity while the input may remain suitable for primary-side ZVS. Operation too far below resonance produces high circulating current and may jeopardize secondary-diode ZCS or control stability.
2.1 Fundamental-harmonic approximation
The fundamental-harmonic approximation (FHA) replaces the switching bridge and rectifier waveforms by their fundamental components and reflects the load as an equivalent ac resistance. It is most accurate near resonance when higher tank harmonics are strongly attenuated.
The equation excludes transformer turns-ratio and rectifier scaling. Those factors must be applied separately when computing the dc-to-dc gain. At fn=1, it gives MFHA=1 for any positive m and Q.
The numerator is 7.2. The two denominator terms are
[6(1.44)-1]2=7.642=58.3696
and
25(1.44)(0.44)2(0.16)=1.1151
Therefore,
MFHA=\frac{7.2}{\sqrt{59.4847}}\approx 0.933
The converter is operating above series resonance and consequently exhibits gain below unity. A time-domain model should subsequently verify rms currents, rectifier commutation and dead-time effects.
2.2 LLC design considerations
A small ratio m=Lm/Lr gives a wider gain range but increases magnetizing current and conduction loss. A large ratio reduces circulating current but narrows regulation capability. Practical design therefore proceeds iteratively:
determine input, output and hold-up ranges;
select transformer turns ratio so nominal operation lies near fr;
choose m and Q to meet required gain without excessive frequency excursion;
calculate rms and peak semiconductor currents;
verify primary ZVS and secondary commutation over load range;
design integrated or discrete magnetics for flux density, copper loss and leakage inductance; and
validate with nonlinear device capacitances and time-domain simulation.
FHA alone is insufficient near burst mode, at extreme gain, or where junction capacitance, dead time and rectifier conduction materially alter the waveforms.
3. Soft-Switching Mechanisms
3.1 Hard switching, ZVS and ZCS
In hard switching, current and voltage overlap during transitions. The average switching loss is often estimated from measured or simulated transition energies:
Psw=fs(Eon+Eoff)
where Eon and Eoff are energies per event in joules. Datasheet values require correction for actual voltage, current, gate resistance and temperature.
Under ZVS, a device turns on after its terminal voltage has fallen close to zero. This is especially valuable for MOSFETs, whose output capacitance otherwise dissipates or redistributes stored energy. Under ZCS, current reaches approximately zero before switching, reducing turn-off overlap and reverse-recovery stress. ZCS is attractive for thyristors and diodes but can produce high resonant voltage.
For an approximate LC-assisted commutation, sufficient inductor energy is required to charge and discharge the effective switching-node capacitance:
\frac{1}{2}LeqIcomm2 \ge EC,required
If capacitance is treated as constant and must swing through Vdc, then
Icomm\ge Vdc\sqrt{\frac{Ceq}{Leq}}
For real MOSFETs, Coss is nonlinear; manufacturer-provided Eoss or charge data should replace the constant-capacitance approximation.
The approximate dead time needed for a nearly constant commutation current is
td \ge \frac{Qnode}{|Icomm|}
where Qnode is the net charge that must be transferred. Excessive dead time increases body-diode conduction, reverse recovery and waveform distortion.
Worked Example 3: Approximate ZVS requirement
A half-bridge commutates 400 V using Leq=20\ μH and an approximately constant total node capacitance of Ceq=400\ pF. The minimum idealized current is
Icomm\ge 400\sqrt{\frac{400×10-12}{20×10-6}}=1.79\ A
Both the inductor energy and required capacitor energy are approximately 32 μJ. At a 2 A commutation current, the constant-capacitance dead-time estimate is
Parasitic capacitance, nonlinear charge and gate-driver delays require design margin and experimental verification.
3.2 Resonant-transition PWM
Soft switching need not imply continuous resonant power transfer. Resonant-transition converters retain PWM control but use load current, leakage inductance or an auxiliary resonant branch only during commutation. Examples include phase-shifted full bridges, auxiliary resonant commutated pole inverters and active-clamp converters.
Their advantage is near-fixed-frequency control with lower switching loss. Their disadvantages include auxiliary-device loss, circulating current, added control states and possible loss of ZVS at light load.
4. Quasi-Resonant Conversion
Quasi-resonant (QR) converters alternate switched energy-transfer intervals with resonant transitions. Unlike a continuously resonant converter, resonance is used mainly to determine a favorable switching instant. QR flyback converters are especially common in low- and medium-power isolated supplies.
After the secondary current of a discontinuous-conduction flyback reaches zero, transformer leakage and magnetizing inductance interact with the MOSFET output capacitance and other node capacitances. The drain voltage rings. A valley-switching controller detects a minimum of this ringing and turns the MOSFET on near the valley, reducing capacitive turn-on loss.
These equations estimate ringing timing, not conversion gain. Nonlinear capacitance and reflected input/output voltages determine whether the valley actually reaches zero volts.
Critical-conduction-mode control starts the next primary pulse when secondary current reaches zero. Its advantages include reduced diode reverse recovery and smaller magnetic components. Its switching frequency varies with line and load, however, complicating EMI filtering and potentially entering the audible range. Modern controllers use valley skipping, frequency clamps and burst modes to balance efficiency, acoustic noise and standby consumption.
QR operation should not automatically be called true ZVS. If the drain-voltage valley remains appreciably above zero, turn-on is reduced-voltage switching rather than zero-voltage switching.
5. Multilevel Conversion Principles
A multilevel converter synthesizes output voltage from several discrete dc potentials. More levels reduce voltage steps, device dv/dt, output-filter demand and harmonic distortion. They also permit series use of devices whose blocking voltage is lower than the total dc-link voltage.
The benefits are obtained at the price of additional devices, gate drives, sensing, redundant states, capacitor-voltage balancing and fault-management complexity.
5.1 Three-level neutral-point-clamped converter
A three-level diode-clamped or neutral-point-clamped (NPC) phase leg uses four series active switches and two clamping diodes. Two dc-link capacitors, common to the converter rather than duplicated for each phase leg, establish the neutral point.
Valid three-level neutral-point-clamped phase leg with split dc link and clamping diodes
Figure: Valid three-level neutral-point-clamped phase leg with split dc link and clamping diodes
Figure: One phase leg of a three-level diode-clamped NPC converter. The split dc-link capacitors are common converter components; switches and clamping diodes are phase-leg components.
For the three admissible output levels:
Level
Conducting commanded switches
Ideal phase voltage relative to N
P
S1, S2
+Vdc/2
O
S2, S3
0
N
S3, S4
−Vdc/2
Dead time and current direction determine the actual diode paths during transitions. The zero state connects the phase to the neutral point, causing neutral current and possible capacitor-voltage imbalance.
For a conventional m-level diode-clamped converter, ideal component counts are:
Nsw,leg=2(m-1), \qquad Nclamp,leg=(m-1)(m-2)
The dc link uses m-1 series capacitors shared by the converter, not m-1 capacitors per phase leg. Diode count and voltage grading become unattractive at high level numbers, so practical NPC designs commonly use three or five levels or active-NPC variants.
5.2 Flying-capacitor converter
A flying-capacitor (FC) converter replaces clamping diodes with capacitors that establish intermediate voltage differences. A conventional m-level FC phase leg has 2(m-1) active switches and
NFC,leg=\frac{(m-1)(m-2)}{2}
flying capacitors, in addition to the common dc link. Redundant states permit active capacitor balancing and fault-tolerant operation. Major limitations are capacitor count, stored energy, precharge requirements and voltage-sensing complexity. FC converters are attractive where rapid state redundancy and modular low-inductance construction outweigh capacitor volume.
5.3 Cascaded H-bridge converter
A cascaded H-bridge (CHB) phase consists of series-connected H-bridge cells, each supplied by an isolated dc source or isolated dc–dc stage. With s equal-voltage cells, the phase produces
m=2s+1
levels and uses 4s active switches. A three-cell phase therefore produces seven levels: −3Vcell, −2Vcell, −Vcell, 0, Vcell, 2Vcell and 3Vcell.
CHB converters offer modularity, low harmonic distortion and no clamping diodes. Their central limitation is the need for isolated and adequately balanced dc sources. Applications include medium-voltage motor drives, photovoltaic interfaces, battery systems and static synchronous compensators.
5.4 Modular multilevel converter
The modular multilevel converter (MMC) uses many series half-bridge or full-bridge submodules in upper and lower arms. Arm inductors limit circulating and fault current. MMCs scale efficiently to hundreds of voltage levels and dominate high-voltage dc transmission.
Each submodule capacitor must be balanced. The controller regulates ac current, dc current, total arm energy, upper–lower energy difference and circulating current. Half-bridge submodules have low conduction loss but cannot inherently block a dc fault; full-bridge submodules can generate negative voltage and assist fault blocking at the cost of twice as many active devices in the current path.
6. Modulation and Voltage Balancing
6.1 Carrier-based modulation
Level-shifted carrier PWM is widely used for NPC and FC converters. Phase-disposition PWM places all carriers in phase and often gives favorable line-voltage harmonics. Phase-shifted carrier PWM is natural for CHB and modular structures because switching events are distributed among cells, increasing the effective ripple frequency.
6.2 Space-vector and nearest-level methods
Multilevel space-vector modulation selects vectors in a highly subdivided voltage plane. Redundant vectors can be chosen to control neutral-point or flying-capacitor voltages. Its computational complexity grows with level count.
Nearest-level modulation is preferable for MMCs with many submodules. The controller inserts the number of cells needed to approximate the reference, while sorting or predictive algorithms select individual cells to maintain capacitor balance.
6.3 Harmonic performance
Voltage total harmonic distortion is
THDv=\frac{\sqrt{\sumh=2∞Vh2}}{V1}
where V1 is the rms fundamental and Vh is the rms value of harmonic h. THD alone does not capture common-mode voltage, weighted motor stress, acoustic excitation or EMI. Converter evaluation must therefore include spectral location, dv/dt and load sensitivity.
7. Comparative Design Assessment
Approach
Principal benefit
Principal penalty
Representative use
Series resonant
High-frequency sinusoidal current
Limited light-load regulation
Induction heating
LLC
High efficiency and transformer isolation
Variable-frequency design complexity
EV chargers, data centres
Quasi-resonant flyback
Low turn-on loss with simple power stage
Variable frequency
Adapters and auxiliary supplies
NPC
Reduced device voltage and dv/dt
Neutral-point balance
Medium-voltage drives
Flying capacitor
Many redundant states
Capacitor count and precharge
High-performance inverters
CHB
Modularity and high-quality waveform
Isolated sources required
Drives, batteries, PV
MMC
Extreme voltage scalability
Complex energy control
HVDC and STATCOM systems
Selection should be based on total loss, semiconductor voltage margin, magnetic volume, control range, fault behavior, insulation coordination, maintainability and life-cycle cost—not peak efficiency alone.
An illustrative design team must develop a 150 kW charger connected to an 800 V dc bus. The isolation stage must regulate a 500–920 V battery while achieving high efficiency and manageable EMI.
Problem
A hard-switched two-level bridge would experience significant turn-on loss and transformer dv/dt. A single LLC stage designed for the entire battery range would require excessive frequency excursion and circulating current.
Analysis
A three-level active-NPC front-end reduces device blocking voltage and grid-current ripple. Interleaved isolated LLC modules divide current and thermal stress. Transformer ratios are selected so routine charging occurs close to series resonance, while front-end bus regulation limits the gain range demanded from each LLC module.
At light load, available magnetizing current may be insufficient to commutate the bridge-node capacitance. Burst control can improve efficiency but must be constrained to avoid audible magnetic noise and dc-bus oscillation. Silicon-carbide MOSFETs reduce switching energy, but fast edges increase common-mode current and insulation stress.
Approach
The team therefore:
regulates the common dc link with the active-NPC stage;
uses interleaved LLC modules with current-sharing control;
verifies ZVS using nonlinear output-charge data rather than nominal capacitance;
applies adaptive dead time across load and temperature;
coordinates common-mode chokes, transformer shielding and chassis capacitance;
provides precharge, capacitor-discharge monitoring and isolation supervision; and
derates magnetics and capacitors using mission-profile temperatures.
Outcome
The combined architecture avoids forcing one converter to satisfy incompatible requirements. Multilevel conversion handles grid-side voltage quality, while resonant conversion supplies efficient isolation. The principal lesson is that topology selection and system partitioning are inseparable.
Learning Points
Soft switching must be verified at worst-case line, load and temperature.
A narrower LLC gain range can materially reduce circulating current.
Multilevel benefits depend on successful neutral-point and fault control.
EMI, insulation and thermal design must begin with topology selection.
9. Practical Limitations and Best Practices
Resonant converters can suffer from high rms current, component-tolerance sensitivity, magnetic saturation and difficult light-load control. Multilevel converters can experience capacitor imbalance, unequal device loss, complex startup and destructive overvoltage after a gate or sensor failure.
Recommended practices include:
use measured parasitics and nonlinear device models;
verify analytical designs with switched time-domain simulation;
include startup, shutdown, burst mode, short circuit and open-load cases;
minimize commutation-loop inductance through laminated buses or compact PCB loops;
provide independent hardware overcurrent and overvoltage protection;
monitor capacitor voltage and temperature rather than relying solely on software estimates;
account for parameter ageing and manufacturing tolerance; and
validate efficiency calorimetrically or with bandwidth-appropriate power analysers.
10. Safety, Regulation and Contemporary Developments
Applicable requirements depend on product category and jurisdiction. IEC 62477-1 addresses safety of power-electronic converter systems; IEC 60664 supports insulation coordination; IEC 61800-3 addresses EMC for adjustable-speed drives; and grid-interactive equipment must satisfy applicable grid codes, such as IEEE 1547 in relevant installations. Compliance does not replace application-specific hazard analysis.
Wide-bandgap silicon-carbide and gallium-nitride devices enable higher switching frequency and temperature but introduce severe layout, gate-drive and common-mode challenges. Integrated magnetics, planar transformers, active-neutral-point-clamped legs and hybrid MMC submodules are active development areas.
Data-driven tools can estimate capacitor health, detect abnormal switching trajectories and optimize balancing decisions. Machine-learning control should nevertheless be bounded by deterministic protection, explainable limits and validated fallback modes. Ethical engineering also requires attention to repairability, mineral sourcing, recycling of power modules and capacitors, and transparent reporting of efficiency over realistic operating profiles.
Chapter Summary
Resonant converters shape voltage and current through energy exchange between inductors and capacitors. Series and parallel tanks exhibit distinct impedance characteristics, while the LLC converter exploits two resonant frequencies to obtain regulation, primary ZVS and favorable secondary commutation. FHA provides useful initial gain estimates but must be supplemented by nonlinear time-domain analysis.
Soft switching reduces transition loss through ZVS or ZCS, although circulating current and auxiliary hardware may offset the benefit. Quasi-resonant converters use resonant valleys or current-zero events to choose advantageous switching instants without continuously resonant power transfer.
Multilevel converters synthesize high-quality voltages using lower-voltage devices. NPC, flying-capacitor, CHB and MMC structures differ in their use of clamping diodes, capacitors, isolated sources and submodules. Their successful application depends on modulation, capacitor balancing, fault management, insulation coordination and system-level optimization.
Key Terms
Resonance: Periodic energy exchange between electric and magnetic storage elements.
Characteristic impedance: Tank parameter Z0=\sqrt{L/C}.
Quality factor: Measure of resonant energy storage relative to dissipation under a stated topology convention.
Fundamental-harmonic approximation: Analysis that retains the fundamental components of switched waveforms.
LLC converter: Resonant converter containing series inductance, magnetizing inductance and resonant capacitance.
Zero-voltage switching: Switching with device voltage approximately zero at turn-on.
Zero-current switching: Switching with device current approximately zero.
Quasi-resonant conversion: Conversion in which resonance establishes favorable switching instants.
Valley switching: Turn-on near a minimum of a ringing switch-node voltage.
Dead time: Interval during which complementary switches are commanded off.
Neutral point: Intermediate dc-link potential in a split-link converter.
NPC converter: Multilevel converter using clamping devices connected to dc-link intermediate points.
Flying capacitor: Floating capacitor used to establish an intermediate voltage level.
Cascaded H-bridge: Series connection of independently supplied bridge cells.
Modular multilevel converter: Converter formed from numerous inserted or bypassed arm submodules.
Redundant state: Switching state producing the same output voltage as another state but different internal current paths.
Nearest-level modulation: Selection of the available voltage level closest to the reference.
Circulating current: Internal converter current that does not directly contribute to useful ac output power.
Review Questions
Short Answer Questions
Why is operation above series resonance often favorable for MOSFET ZVS?
Distinguish true ZVS from reduced-voltage valley switching.
What physical roles are played by Lr and Lm in an LLC converter?
Why are redundant switching states useful in multilevel converters?
Why should nonlinear output-charge data be used in high-frequency ZVS design?
Long Answer Questions
Derive the normalized impedance of a series RLC tank and discuss operation above and below resonance.
Explain the FHA model of an LLC converter, including assumptions, gain behavior and limitations.
Compare ZVS, ZCS, resonant-transition PWM and quasi-resonant switching.
Compare NPC, flying-capacitor, CHB and MMC topologies in terms of components, balancing and applications.
Discuss modulation, protection, thermal design and insulation coordination in a medium-voltage multilevel drive.
Analytical / Application Questions
Design an initial series resonant tank for a specified resonant frequency and characteristic impedance, then evaluate component stresses at two load conditions.
Given nonlinear output-charge curves for a bridge, determine the current and dead-time range required for ZVS and identify conditions where ZVS is lost.
Propose and justify a converter architecture for a grid-connected battery system requiring bidirectional power flow, galvanic isolation and medium-voltage connection.
Multiple Choice Questions with Answers
Question 1
For an ideal series LC tank, which expression gives the resonant frequency?
A. f0=2π\sqrt{LC}
B. f0=1/(2π\sqrt{LC})
C. f0=\sqrt{L/C}/(2π)
D. f0=1/(2πLC)
Correct Answer: B. f0=1/(2π\sqrt{LC})
Question 2
A series resonant tank has Qs=5 and fn=1.256. Approximately what is its capacitor-voltage gain under sinusoidal steady-state conditions?
A. 0.63
B. 1.00
C. 1.59
D. 2.51
Correct Answer: C. 1.59
Question 3
Using the chapter's LLC definitions, what is the FHA gain at fn=1?
A. 0
B. 1/Q
C. m/(m+1)
D. 1
Correct Answer: D. 1
Question 4
Which statement correctly characterizes true zero-voltage switching?
A. The device turns on after its terminal voltage has fallen approximately to zero.
B. The device turns off only when load current reaches its peak.
C. The gate voltage is held at zero throughout conduction.
D. The switching frequency equals the line frequency.
Correct Answer: A. The device turns on after its terminal voltage has fallen approximately to zero.
Question 5
In a quasi-resonant flyback converter, valley switching primarily reduces which loss mechanism?
A. Transformer dc copper loss
B. MOSFET capacitive turn-on loss
C. Output-capacitor ESR loss
D. Gate-driver static loss
Correct Answer: B. MOSFET capacitive turn-on loss
Question 6
For a conventional three-level NPC phase leg, how many active switches and clamping diodes are required?
A. Two switches and two clamping diodes
B. Four switches and one clamping diode
C. Four switches and two clamping diodes
D. Six switches and four clamping diodes
Correct Answer: C. Four switches and two clamping diodes
Question 7
In a three-phase NPC converter, the split dc-link capacitors are normally best described as:
A. common converter components shared by the phase legs
B. two capacitors required separately in every phase leg
C. optional components used only during startup
D. capacitors connected in series with every switch
Correct Answer: A. common converter components shared by the phase legs
Question 8
How many voltage levels can a cascaded H-bridge phase generate using three equal-voltage cells?
A. 3
B. 5
C. 6
D. 7
Correct Answer: D. 7
Question 9
Which multilevel topology conventionally requires isolated dc sources or isolated dc–dc supplies for its cells?
A. Diode-clamped NPC
B. Cascaded H-bridge
C. Flying-capacitor converter
D. Two-level voltage-source inverter
Correct Answer: B. Cascaded H-bridge
Question 10
For Vdc=400\ V, Ceq=400\ pF and Leq=20\ μH, the idealized minimum commutation current for ZVS is approximately: