Embedded Systems and Smart Device Engineering

Introduction

An IoT node is a physical computing system that senses, processes, communicates, and sometimes controls. In electrical engineering, the node may be a small battery-powered sensor, an industrial programmable logic controller (PLC), a remote terminal unit (RTU), a smart meter, or an edge-computing gateway. Its design is not merely a matter of selecting a microcontroller. It requires coordinated decisions about electrical interfaces, timing, firmware, communication, energy, safety, reliability, cybersecurity, and maintainability.

Embedded-system engineering therefore combines hardware and software. Hardware determines what signals can be measured and controlled; firmware determines how those signals are interpreted and how the system responds. The most effective designs use hardware–software co-design: requirements are allocated deliberately between circuits, peripherals, firmware, operating systems, and cloud or supervisory systems.

Learning Objectives

By the end of this chapter, students should be able to:

1. Distinguish microcontrollers, systems-on-chip, PLCs, and RTUs.
2. Design basic sensing and actuation paths using ADCs, timers, interrupts, and communication interfaces.
3. Explain firmware structure, scheduling, and real-time operating-system concepts.
4. Estimate sampling, memory, execution-time, and energy requirements.
5. Apply low-power, diagnostics, reliability, and prototyping principles.
6. Analyse an IoT-node design and justify hardware–software partitioning.

1. Embedded Systems in Smart Electrical Systems

An embedded system is a computer dedicated to a particular function within a larger product or process. Unlike a general-purpose computer, it is usually constrained by cost, size, energy, response time, environmental conditions, and certification requirements.

A typical smart electrical node contains:

• sensors and signal-conditioning circuits;
• an analog-to-digital converter (ADC);
• a processor, memory, and peripheral modules;
• timers, watchdogs, and interrupt logic;
• wired or wireless communication;
• power conversion and energy storage;
• firmware and, where necessary, a real-time operating system (RTOS);
• diagnostic, security, and update mechanisms.

The design objective is not maximum computational power. It is predictable and safe performance at an acceptable total cost. A node controlling a motor contactor has different requirements from a soil-moisture sensor: the former needs deterministic response and electrical isolation, while the latter may prioritize battery life.

Essential terminology

A sensor converts a physical quantity into an electrical signal. An actuator converts an electrical command into physical action. A peripheral is an on-chip or external hardware module supporting functions such as ADC, serial communication, pulse-width modulation (PWM), or timers. Firmware is software stored in non-volatile memory that directly controls the embedded hardware. Latency is the time from an event to the beginning of the response; jitter is variation in that latency. Determinism means that timing and behaviour can be bounded or predicted.

2. Processing Platforms

2.1 Microcontrollers

A microcontroller unit (MCU) integrates a processor core, memory, timers, GPIO, communication peripherals, and often ADCs on one integrated circuit. MCUs are suitable for sensing, control, metering, and low-power applications. Their advantages include low cost, short startup time, integrated peripherals, and efficient sleep modes.

Selection criteria include processor architecture, clock frequency, flash and RAM capacity, ADC resolution, number of timers, communication interfaces, operating voltage, temperature range, package, security features, and development-tool support. Clock frequency alone is not a sufficient performance measure: memory access, instruction-set efficiency, interrupt latency, and peripheral hardware also matter.

2.2 Systems-on-chip

A system-on-chip (SoC) integrates a processor with extensive digital functions, memory controllers, communication radios, graphics or signal-processing units, and security hardware. Wireless SoCs are common in Wi-Fi, Bluetooth Low Energy, and mesh-network products. Compared with a simple MCU, an SoC may offer greater processing capability but can require more complex software, power management, and certification.

A useful distinction is that an MCU generally emphasizes deterministic control with integrated peripherals, whereas an SoC often integrates a broader computing and connectivity platform. The boundary is not absolute.

2.3 PLCs and RTUs

A PLC is an industrial controller designed for reliable operation and convenient implementation of logic, sequencing, motion, and process control. PLC programs commonly use ladder logic, function-block diagrams, structured text, or sequential function charts. PLCs provide rugged input/output modules, industrial communication, diagnostics, and maintainability by technicians.

An RTU is designed primarily for remote monitoring and control. It typically combines local I/O, communication, data logging, time synchronization, and supervisory-control functions. RTUs are widely used in substations, water systems, and geographically distributed infrastructure.

3. Hardware Signal Chain

A measurement path generally follows:

Physical quantity → sensor → protection and conditioning → ADC → firmware → communication or control action

Signal conditioning may include amplification, attenuation, filtering, isolation, linearization, and level shifting. The input range must be compatible with the ADC and must not exceed absolute maximum ratings. Industrial electrical systems require special attention to transients, common-mode voltage, electromagnetic interference, and galvanic isolation.

3.1 ADC operation

An ideal N-bit ADC divides its input range into 2^N codes. The approximate voltage represented by one least-significant bit is

where q is the ideal code width in volts, V_R is the ADC full-scale input range in volts, and N is resolution in bits. Some devices define the conversion denominator as 2^N − 1 for endpoint representation; the data sheet convention must be followed.

For an ideal unipolar ADC, an input voltage V_IN maps approximately to code C according to

where floor denotes truncation and 0 ≤ V_IN ≤ V_R. This expression assumes an ideal ADC, a stable reference, no gain or offset error, and a correctly scaled input.

The theoretical quantization-noise-limited signal-to-noise ratio for a full-scale sinusoid is approximately

This relation assumes an ideal ADC and a sinusoidal input using the converter’s full-scale range. Real performance is lower because of reference noise, nonlinearity, clock jitter, interference, and analog noise.

Worked example. A 12-bit ADC has a 3.3 V range. Its ideal code width is

q = 3.3 V ÷ 4096 ≈ 0.806 mV.

For a 1.65 V input, the ideal code is approximately (1.65 ÷ 3.3) × 4095 ≈ 2047.5, so the digital result is near code 2047 or 2048 depending on rounding and converter convention. The theoretical quantization SNR is 6.02 × 12 + 1.76 ≈ 73.99 dB.

3.2 Sampling and anti-aliasing

If a sampled signal contains frequency components above half the sampling frequency, they can appear as lower-frequency components after sampling. The Nyquist condition for a band-limited signal is

where f_s is sampling frequency and f_max is the highest signal frequency of interest. In practice, an analog anti-aliasing filter is used, and the sampling rate is selected with transition-band margin. Sampling faster does not remove the need for filtering.

3.3 Timers and PWM

Timers count clock events and can generate periodic interrupts, measure pulse widths, capture event times, or produce PWM. For an ideal edge-aligned PWM signal, duty cycle is

where t_ON is the high-time and T is the period. If a timer clock frequency is f_CLK and the timer divides it by a prescaler P, a period of K timer counts is

These equations assume a simple timer configuration; clock tolerances, interrupt-free hardware operation, and timer counting mode must be checked in the device reference manual.

PWM can control motor speed, LED brightness, heater power, or a switched converter. It must not be connected directly to a high-energy load without suitable drivers, protection, isolation, and consideration of switching losses and electromagnetic compatibility.

4. Firmware Architecture and Real-Time Behaviour

A robust firmware design separates hardware abstraction, device drivers, services, application logic, diagnostics, and communication. This separation supports testing and replacement of hardware components.

A common bare-metal structure is:

1. initialize clocks, pins, peripherals, and safety defaults;
2. execute a fast interrupt service routine (ISR) for urgent events;
3. set flags or place data in queues;
4. perform longer computations in the main loop;
5. service communication, diagnostics, and watchdog functions.

An ISR should be short and deterministic. It should capture essential information, clear the interrupt source, and defer lengthy work. Blocking calls, dynamic memory allocation, and complex protocol processing inside an ISR can create unacceptable latency and priority problems.

4.1 Interrupts

Interrupts allow hardware events to request processor attention without continuous polling. They are appropriate for timer ticks, ADC completion, communication reception, encoder transitions, and fault inputs. Interrupt priority must reflect safety and timing requirements. Shared data between an ISR and foreground code requires atomic access, synchronization, or carefully designed lock-free methods.

Polling is simpler and can be suitable for slow, predictable events. Interrupts are not automatically superior: excessive interrupt rates, priority inversion, and unbounded service times can make a system less reliable.

4.2 RTOS concepts

An RTOS provides tasks or threads, scheduling, queues, semaphores, mutexes, software timers, and memory services. A pre-emptive scheduler can interrupt a lower-priority task to run a higher-priority task. A typical architecture may include:

• a high-priority protection task;
• a periodic sampling task;
• a communication task;
• a control task;
• a low-priority logging and diagnostics task.

A mutex protects a shared resource; a semaphore signals an event or represents a count; a queue transfers data between tasks. Priority inversion occurs when a high-priority task waits for a resource held by a lower-priority task. Priority inheritance or priority-ceiling protocols can reduce this risk.

Real-time correctness has two dimensions: logical correctness and temporal correctness. A result that arrives after a protection deadline may be incorrect even if its numerical value is right. For a periodic task, a basic utilization estimate is

where C_i is the worst-case execution time of task i and T_i is its period. U is dimensionless. For simple fixed-priority scheduling, utilization below a sufficient bound can support schedulability, but it is not a universal proof. Blocking, interrupt time, deadlines, release jitter, and scheduling policy must also be analysed. Worst-case execution-time measurement and formal timing analysis are preferable for safety-critical designs.

5. Hardware–Software Co-Design

Co-design begins with system requirements rather than component preference. Requirements should specify measured variables, accuracy, response time, availability, communications, energy budget, environmental conditions, security, safety, and update strategy.

A function is a candidate for hardware implementation when it requires very low latency, high-rate parallel operation, deterministic timing, or protection independent of firmware. A function is a candidate for software when it changes frequently, requires complex algorithms, or benefits from remote update. Partitioning may also use dedicated peripherals such as ADC sequencers, DMA, PWM units, cryptographic accelerators, or programmable logic.

A practical design flow is:

1. define operating scenarios and hazards;
2. convert them into measurable requirements;
3. allocate functions to sensing, processor, firmware, network, and cloud layers;
4. select interfaces and electrical protections;
5. prototype the highest-risk assumptions;
6. verify timing, accuracy, energy, communications, and fault behaviour;
7. validate the complete system under realistic environmental conditions.

Traceability matrices link each requirement to a design element and a verification test. This is especially important in industrial and regulated products.

6. Low-Power Engineering

Battery life depends on average power, not only the processor’s active current. If a device operates from a battery of nominal energy E_B and consumes average power P_AVG, an ideal operating time estimate is

where t is in hours if E_B is in watt-hours and P_AVG is in watts. Real battery life is shorter because of converter losses, temperature, self-discharge, aging, peak-current limitations, and the usable discharge range.

For repeating operating modes,

where P_i is the power in mode i, t_i is time spent in that mode, and T = ∑t_i is the cycle duration. If current is specified instead, average current can be calculated similarly and multiplied by supply voltage when voltage is approximately constant.

Worked example. A sensor operates for 0.5 s at 60 mA and sleeps for 59.5 s at 0.05 mA from a 3.3 V supply. Its average current is

I_AVG = [60(0.5) + 0.05(59.5)] ÷ 60 ≈ 0.5496 mA.

Average power is approximately 3.3 × 0.0005496 ≈ 1.81 mW. A 3.7 V, 2.5 Ah battery has nominal energy 9.25 Wh. Ignoring losses and battery limitations, operating time is about 9.25 ÷ 0.00181 ≈ 5110 h, or approximately 213 days. A practical design must apply a derating factor and verify radio peak currents.

Low-power methods include deep sleep, event-driven wake-up, duty-cycled sensing, local data reduction, efficient radio protocols, DMA, clock scaling, power gating, leakage reduction, and elimination of unnecessary indicator LEDs. The energy cost of transmission should be evaluated together with the computational cost of local processing.

7. Diagnostics, Reliability, and Security

Diagnostics should detect both random faults and systematic failures. Useful mechanisms include:

• watchdog timers for recovery from software lock-up;
• brownout detection and power-on self-test;
• CRCs for memory and communication integrity;
• range, rate-of-change, and plausibility checks on sensor data;
• redundant or cross-checked measurements;
• actuator feedback and end-stop detection;
• event logs with timestamps and fault codes;
• safe-state transitions and controlled restart;
• bootloader image authentication and rollback protection.

A watchdog is not a substitute for fault analysis. Firmware should periodically demonstrate that critical tasks are operating correctly before the watchdog is refreshed. Otherwise, a failed supervisor task may remain hidden.

Reliability engineering considers electrical stress, thermal cycling, vibration, humidity, corrosion, connector failure, component aging, software defects, and electromagnetic interference. Derating voltage, current, temperature, and switching stress generally improves life. Field replaceability, test points, status indicators, and diagnostic interfaces reduce maintenance cost.

Security must be designed from the start. Fundamental controls include unique device identity, secure boot, authenticated firmware updates, protected credentials, least-privilege interfaces, encrypted communication where confidentiality is required, replay protection, logging, vulnerability management, and secure decommissioning. Safety and cybersecurity interact: an unauthorized command can create an electrical hazard, while an overly aggressive security response can interrupt a safety function. Applicable electrical, radio, industrial-control, functional-safety, and data-protection requirements must be identified for the deployment jurisdiction.

8. Prototyping and Verification

A prototype should answer engineering questions, not merely demonstrate that a circuit can turn on. Early tests should measure ADC error, noise, timing, startup behaviour, current in every mode, radio performance, thermal rise, and response to faults.

A staged approach is effective:

• simulation or calculation for first-order feasibility;
• breadboard or evaluation-board tests for interfaces;
• engineering prototype for electrical and firmware integration;
• design-verification prototype for environmental and fault tests;
• production validation for manufacturing repeatability.

Oscilloscopes, logic analysers, current probes, programmable supplies, protocol analysers, thermal cameras, and software tracing tools are valuable. Measurements must include uncertainty and test conditions. A communication test that works in a laboratory may fail near motors, variable-frequency drives, long cables, or metal enclosures.

9. Illustrative Case: Smart Feeder-Temperature Monitor

Background

Consider an illustrative industrial node monitoring the temperature of a low-voltage distribution feeder. The node must measure a thermistor, report data wirelessly every five minutes, detect an over-temperature condition within two seconds, and operate for at least six months from a battery-backed supply.

Problem analysis

The normal reporting interval permits deep sleep, but the over-temperature requirement demands a faster path. A slow cloud-only design is unsafe because network delay is unpredictable. The design therefore needs local threshold detection, timestamped measurements, a communication link, and a safe alarm output.

Approach and solution

An MCU with an ADC, low-power timer, watchdog, secure boot support, and wireless interface is selected. The thermistor is connected through a divider and filtered input. The ADC is calibrated at two reference points. A periodic timer wakes the MCU every five minutes for measurement and transmission. A comparator or high-priority ADC-monitoring path detects rapid over-temperature conditions; the firmware immediately activates a local alarm and stores the event.

The firmware is divided into sensing, alarm, communication, power-management, and diagnostics functions. Normal measurements are range-checked and stored with a sequence number. If communication fails, the node buffers data and retries with bounded backoff. A watchdog is refreshed only after the sensing and alarm tasks report healthy operation.

Assume active current is 45 mA for 0.8 s per 300 s cycle and sleep current is 0.08 mA for the remaining time. The average current is

I_AVG = [45(0.8) + 0.08(299.2)] ÷ 300 ≈ 0.1999 mA.

At a 3.3 V supply, average power is approximately 0.660 mW. A nominal 3.7 V, 4 Ah battery contains 14.8 Wh. The ideal energy estimate is 14.8 ÷ 0.000660 ≈ 22,424 h, or about 2.56 years. Applying a conservative usable-energy factor of 0.5 gives about 1.28 years, still exceeding six months, subject to temperature, radio retries, battery aging, and peak-current verification.

Outcome and learning points

The design meets the reporting requirement while handling urgent alarms locally. The case demonstrates that low power results from duty-cycle design, not simply selecting a low-power MCU. It also shows why safety-related response should not depend exclusively on a remote service, why diagnostics must be planned with the normal function, and why battery estimates require practical derating.

10. Contemporary Developments and Design Limits

TinyML and edge analytics can classify vibration, detect anomalies, or compress data locally, reducing bandwidth and latency. However, model size, RAM, energy, explainability, training-data quality, and update security must be assessed. AI output should not be treated as infallible in protection systems; deterministic limits and independent safety mechanisms remain important.

Modern devices increasingly include hardware cryptography, trusted execution, secure elements, time-sensitive networking, energy harvesting, and heterogeneous processors. These technologies expand capability but also increase integration complexity. A technically sophisticated design is not automatically better if it is difficult to test, update, repair, or operate securely.

Chapter Summary

Embedded smart devices combine sensors, signal conditioning, processors, peripherals, firmware, communications, power systems, and diagnostics. MCUs provide economical deterministic control, while SoCs integrate greater computing and connectivity; PLCs and RTUs are optimized for industrial reliability and remote operation. ADC resolution, sampling theory, timer configuration, PWM, interrupts, and real-time scheduling determine whether measured data and control actions are trustworthy. Hardware–software co-design allocates functions according to timing, flexibility, energy, safety, and maintainability. Low-power operation depends on average energy across active and sleep modes. Watchdogs, CRCs, plausibility checks, secure boot, authenticated updates, and fault testing improve reliability and security. Professional engineering requires requirements traceability, staged prototyping, environmental testing, and explicit treatment of limitations.

Key Terms

Embedded system: A computer integrated into a larger product for a dedicated function.

Microcontroller: An integrated processor, memory, and peripheral controller.

System-on-chip: An integrated computing device containing processor and extensive system functions.

PLC: An industrial controller designed for reliable process and machine control.

RTU: A remote monitoring and control unit with local I/O and communications.

Firmware: Software stored in non-volatile memory that operates hardware.

ADC: A converter that represents an analog quantity as a digital code.

Quantization: Discretization of a continuous input into finite digital levels.

Aliasing: Misrepresentation of high-frequency content caused by inadequate sampling.

Timer: Hardware counter used for timing, measurement, interrupts, or PWM.

PWM: Pulse-width modulation used to control average power or encode timing.

Interrupt: A hardware or software event requesting processor service.

RTOS: An operating system providing scheduling and real-time services.

Latency: Time between an event and the start of its response.

Jitter: Variation in response timing.

Watchdog: A supervisory timer that initiates recovery if software fails to respond.

Duty cycle: Fraction of a cycle for which a system remains active or a PWM signal is high.

Hardware–software co-design: Joint allocation and development of hardware and software functions.

Secure boot: Startup verification that permits only authenticated firmware to execute.

Derating: Operating components below maximum ratings to improve reliability.

Review Questions

Short Answer Questions

1. What distinguishes an MCU from an RTU?
2. Why is an anti-aliasing filter used before an ADC?
3. What is the purpose of a watchdog timer?
4. Define latency and jitter in a real-time system.
5. State two methods for reducing IoT-node power consumption.

Long Answer Questions

1. Explain the signal path from a physical sensor to a cloud application, including the roles of conditioning, ADC conversion, firmware, and communication.
2. Compare bare-metal firmware and an RTOS for an industrial monitoring node.
3. Explain how timers, interrupts, and PWM support embedded electrical control.
4. Discuss the major factors that must be considered when selecting between an MCU, wireless SoC, PLC, and RTU.
5. Describe a complete verification strategy for a battery-powered industrial IoT node.

Analytical / Application Questions

1. Design a measurement and alarm architecture for a motor that must detect overheating within one second but report routine data every ten minutes. Justify the local and remote functions.
2. An IoT node is active at 30 mA for 2 s every 120 s and sleeps at 0.1 mA otherwise. Calculate its average current and explain at least three factors that could make the practical battery life lower than the ideal estimate.
3. A four-task RTOS system has execution times and periods of (2 ms, 20 ms), (4 ms, 50 ms), (8 ms, 100 ms), and (20 ms, 1 s). Calculate utilization and explain why the result alone is insufficient to prove schedulability.

Multiple Choice Questions with Answers

Question 1

Which platform is primarily designed for rugged industrial logic and process control?

A. PLC

B. Desktop computer

C. Passive sensor

D. Battery charger

Correct Answer: A. PLC

Question 2

A 12-bit ideal ADC with a 3.3 V range has an approximate code width of:

A. 0.806 mV

B. 3.3 mV

C. 12 mV

D. 806 mV

Correct Answer: A. 0.806 mV

Question 3

What is the principal purpose of an anti-aliasing filter?

A. To increase battery voltage

B. To reduce frequency components that could alias during sampling

C. To encrypt ADC data

D. To generate a watchdog reset

Correct Answer: B. To reduce frequency components that could alias during sampling

Question 4

Which operation should generally be avoided inside a time-critical interrupt service routine?

A. Capturing a timestamp

B. Clearing the interrupt source

C. Performing lengthy blocking communication

D. Storing a measured value

Correct Answer: C. Performing lengthy blocking communication

Question 5

A PWM signal is high for 2 ms in a 10 ms period. Its duty cycle is:

A. 5%

B. 20%

C. 50%

D. 80%

Correct Answer: B. 20%

Question 6

If a node consumes 40 mA for 1 s and 0.1 mA for 9 s in a repeating 10 s cycle, its average current is:

A. 0.49 mA

B. 4.09 mA

C. 4.99 mA

D. 40.1 mA

Correct Answer: C. 4.99 mA

Question 7

Which mechanism is most directly intended to recover a processor from software lock-up?

A. Watchdog timer

B. PWM generator

C. ADC reference

D. Thermistor

Correct Answer: A. Watchdog timer

Question 8

Priority inversion occurs when:

A. An ADC reads a negative voltage

B. A high-priority task is delayed by a lower-priority task holding a needed resource

C. A timer counts upward

D. A battery is fully charged

Correct Answer: B. A high-priority task is delayed by a lower-priority task holding a needed resource

Question 9

Secure boot primarily verifies that:

A. The enclosure is waterproof

B. Only authenticated firmware is executed at startup

C. The ADC has maximum resolution

D. The radio has the highest transmission power

Correct Answer: B. Only authenticated firmware is executed at startup

Question 10

Which design principle best supports reliable low-power operation?

A. Keep all peripherals active continuously

B. Use duty cycling and place the processor in sleep modes when inactive

C. Transmit every raw sample immediately

D. Disable all fault diagnostics

Correct Answer: B. Use duty cycling and place the processor in sleep modes when inactive