Smart Devices, Sensors and Embedded Systems

Introduction and Context

The Internet of Things (IoT) is implemented not by cloud software alone, but by a distributed population of physical devices that sense, compute, communicate, and act. A smart device combines transducers, signal-conditioning circuits, a processing unit, firmware, communication interfaces, power-management functions, and a physical enclosure. Its engineering quality determines the accuracy, latency, safety, energy consumption, security, and maintainability of the complete IoT system.

At postgraduate level, device design must be treated as a cross-layer problem. A sensor cannot be selected solely from its nominal range; its noise, drift, bandwidth, output interface, calibration requirements, power demand, and environmental sensitivity must also be considered. Similarly, a microcontroller is not selected merely by clock frequency. Interrupt latency, memory architecture, analogue peripherals, security features, real-time performance, development tools, and lifecycle support may be more important.

This chapter develops a systematic approach to selecting and integrating sensors, actuators, microcontrollers, embedded operating systems, and interfaces. Particular attention is given to signal conditioning, sampling, ADC performance, actuator control, power management, firmware architecture, real-time schedulability, and interface reliability.

Learning Objectives

After studying this chapter, the reader should be able to:

1. Classify IoT sensors and actuators and select them against quantitative system requirements.

2. Design appropriate signal-conditioning and sampling chains.

3. Evaluate ADC performance using resolution, quantisation, SNR, ENOB, offset, gain, and reference specifications.

4. Compare microcontrollers, bare-metal firmware, RTOSs, and embedded Linux for IoT applications.

5. Analyse real-time task schedulability and hardware–software timing interactions.

6. Design reliable wired and wireless interfaces, including error detection and recovery.

7. Select actuator drivers and control strategies while accounting for safety and energy.

8. Apply power-management, security, calibration, and lifecycle principles to an integrated IoT node.

1. Smart-Device Architecture

A representative IoT node contains the following chain:

Physical variable → sensor/transducer → analogue front end → ADC or digital interface → processing and storage → communication stack → actuator driver or control output.

A transducer converts a physical quantity into an electrical quantity. A sensor is the measurement subsystem, often including the transducer, conditioning, calibration, and interface. An actuator converts an electrical command into physical action, such as motion, heat, illumination, fluid flow, or switching.

The design begins with a requirements specification. Important parameters include measurement range, required accuracy, resolution, bandwidth, allowable latency, operating temperature, lifetime, supply voltage, energy budget, communication distance, security level, and failure consequence. These parameters are coupled. Increasing bandwidth can increase noise and sampling power; increasing accuracy may require calibration and a stable reference; reducing latency can conflict with deep-sleep operation.

A useful measurement model is

x_m(t) = x(t) + b(t) + n(t) + e(t),

where x(t) is the true quantity, b(t) is bias or drift, n(t) is random noise, and e(t) represents conversion and quantisation error. This is a model, not an identity: its usefulness depends on whether the disturbance sources can reasonably be represented as additive terms.

Sensor classifications

Sensors may be classified by measured domain (temperature, pressure, inertial, optical, acoustic, chemical, or electrical), output form (analogue, digital, frequency, pulse, or event-based), power mode (continuous, duty-cycled, or passive), and measurement principle (resistive, capacitive, inductive, piezoelectric, thermoelectric, optical, or semiconductor).

Selection should consider:

• sensitivity: output change per unit input;
• range and overload capability;
• resolution and repeatability;
• accuracy, linearity, hysteresis, and cross-sensitivity;
• bandwidth and settling time;
• noise density and long-term drift;
• calibration interval and traceability;
• interface, supply, package, environmental rating, and cost.

Accuracy and resolution are not interchangeable. A high-resolution converter cannot correct a poorly calibrated or unstable sensor. Repeatability describes dispersion under repeated conditions; accuracy describes closeness to a reference value.

Actuator classifications

Actuators include DC motors, stepper motors, servo motors, solenoid valves, relays, heaters, piezoelectric devices, LEDs, pumps, and proportional valves. Selection requires force or torque, speed, stroke, duty cycle, response time, holding requirement, thermal limits, acoustic constraints, and failure mode.

The processor normally cannot drive an actuator directly. A driver provides current gain, voltage translation, isolation, flyback protection, current limiting, or bridge switching. Inductive loads require a controlled path for stored energy. A freewheel diode is suitable in some low-side DC switching circuits, whereas an H-bridge, snubber, avalanche-rated switch, or active clamp may be needed in other applications.

2. Signal Conditioning and Data Conversion

Signal conditioning adapts a sensor output to the input range and bandwidth of the data converter. It may include amplification, attenuation, buffering, filtering, level shifting, linearisation, isolation, excitation, bridge completion, and protection.

Loading and impedance

If a sensor has Thevenin resistance R_s and is connected to a load R_L, the ideal voltage transfer is

V_L = V_s R_L/(R_s + R_L).

This expression assumes a linear Thevenin source and resistive load. If R_L is not much larger than R_s, loading creates gain error. A buffer with sufficiently high input impedance can reduce this error, but its input bias current, offset voltage, noise, input protection, and common-mode range must be checked.

Filtering

An RC low-pass filter has cutoff frequency

f_c = 1/(2πRC),

under the ideal first-order approximation. Its magnitude is

|H(f)| = 1/[1 + (f/f_c)^2]^{1/2}.

The cutoff is the frequency at which magnitude is 1/√2 of the low-frequency value, corresponding to approximately −3.01 dB. A first-order filter attenuates frequencies gradually; it is not an ideal anti-aliasing filter. Higher-order active filters may be required when a narrow transition band separates the signal from unwanted frequencies.

Anti-aliasing filtering must be designed together with the sampling frequency. Signals above half the sampling frequency can fold into the sampled band. For a highest signal frequency f_max, the minimum theoretical condition is f_s > 2f_max, and practical designs use additional margin because real filters have finite roll-off and because the signal may contain out-of-band energy.

Worked sampling example

An accelerometer signal contains useful vibration components up to 1.2 kHz. The theoretical Nyquist limit requires f_s > 2(1.2 kHz) = 2.4 kS/s. Therefore, 2.0 kS/s is insufficient, not sufficient. A design using 4.0 kS/s provides a Nyquist frequency of 2.0 kHz, but whether it is adequate depends on the anti-aliasing filter transition band between 1.2 and 2.0 kHz. If the sensor output may contain strong components above 2.0 kHz, a steeper filter or a higher sampling rate is required. A practical engineering choice might be 5 kS/s or higher after evaluating filter attenuation, data rate, processor load, and energy consumption.

ADC performance

For an ideal N-bit ADC with input span V_FS, the nominal least significant bit is

q = V_FS/2^N.

Quantisation error is commonly modelled as uniformly distributed between −q/2 and +q/2 when the signal exercises many codes and is not correlated with the sampling process. Under these assumptions, its RMS value is q/√12. The ideal quantisation-limited signal-to-noise ratio for a full-scale sinusoid is approximately

SNR_ideal = 6.02N + 1.76 dB.

The result assumes an ideal converter, a full-scale sine wave, and quantisation noise as the only noise source. Real performance is reduced by thermal noise, reference noise, nonlinearity, clock jitter, distortion, supply coupling, and missing codes.

Effective number of bits is often estimated from measured SINAD by

ENOB = (SINAD − 1.76)/6.02,

where SINAD is in decibels and the same sinusoidal test assumptions apply. ADC data sheets should also be examined for integral nonlinearity (INL), differential nonlinearity (DNL), offset error, gain error, aperture uncertainty, sampling rate, input impedance, reference stability, and channel-to-channel crosstalk.

For a sinusoidal input of RMS amplitude V_rms and RMS noise V_n,rms,

SNR = 20 log10(V_rms/V_n,rms).

The 20 factor applies to voltage or amplitude ratios; a power ratio uses 10 log10. Confusing these conventions leads to a 3 dB error when comparing equal power and amplitude descriptions.

Oversampling can reduce in-band quantisation noise when digital filtering and decimation are used and when noise is sufficiently uncorrelated. It does not automatically improve sensor accuracy, eliminate analogue noise, or correct offset and gain errors.

3. Microcontrollers and Embedded Operating Systems

A microcontroller (MCU) integrates a processor core, memory, timers, GPIO, ADCs, serial interfaces, interrupt controller, and often cryptographic and power-management peripherals. Selection criteria include computational workload, deterministic timing, RAM and non-volatile memory, DMA capability, analogue quality, timer resolution, package, voltage, security, toolchain, supply continuity, and total energy per operation.

A system-on-chip may integrate radio functions, while an application processor generally provides more memory and operating-system support at higher energy and complexity. An external sensor hub or coprocessor can separate low-power acquisition from high-level communication.

Firmware execution models

Bare-metal super-loop firmware is simple and can be highly predictable, but complexity grows rapidly when multiple timing requirements, communication protocols, and fault-handling paths are introduced. Interrupt-driven firmware improves response but must keep interrupt service routines short and avoid unbounded work.

An RTOS provides tasks, scheduling, inter-task communication, timers, synchronisation, and often memory protection or tracing. It does not inherently make a system real-time. The relevant property is bounded response under stated assumptions.

Embedded Linux offers processes, drivers, networking, filesystems, and development convenience, but ordinary Linux scheduling does not guarantee hard deadlines. Real-time Linux configurations can reduce latency, though hardware, drivers, interrupt handling, and system load must still be measured.

RTOS scheduling and schedulability

For independent periodic tasks under fixed-priority rate-monotonic scheduling, task i is described by execution time C_i, period T_i, and relative deadline D_i. A necessary basic utilisation condition is

U = Σ(C_i/T_i) ≤ 1,

but U ≤ 1 alone is not a sufficient schedulability test for fixed-priority scheduling. For the classic case of independent periodic tasks with deadlines equal to periods and suitable preemption assumptions, a sufficient Liu–Layland bound is

U ≤ n(2^{1/n} − 1),

where n is the number of tasks. The bound approaches ln 2, approximately 0.693, as n increases. A task set above the bound may still be schedulable; response-time analysis is more precise.

For task i, a common fixed-priority response-time recurrence is

R_i^{(k+1)} = C_i + B_i + Σ_{j∈hp(i)} ceil(R_i^{(k)}/T_j) C_j,

where B_i is blocking from lower-priority critical sections and hp(i) is the set of higher-priority tasks. The recurrence is iterated from R_i^(0) = C_i + B_i until convergence or until R_i exceeds D_i. This model assumes known execution times, fixed priorities, preemptive scheduling, and appropriately modelled release and blocking behavior. Interrupt interference, nonpreemptive sections, cache effects, DMA contention, and communication delays must be included when material.

Priority inversion occurs when a high-priority task waits for a resource held by a low-priority task while medium-priority work executes. Priority inheritance temporarily raises the holder’s priority; priority-ceiling protocols provide another controlled approach. Mutexes, queues, event flags, and lock-free buffers should be selected according to data ownership and timing constraints rather than convenience.

Worked RTOS example

Consider three independent periodic tasks: sensing C=1 ms, T=10 ms; control C=2 ms, T=20 ms; and communication C=3 ms, T=50 ms. Utilisation is 0.1 + 0.1 + 0.06 = 0.26. For n=3, the sufficient bound is 3(2^(1/3)−1) ≈ 0.780, so the task set passes this sufficient test under its assumptions. This does not prove end-to-end correctness: ADC conversion time, interrupt overhead, mutex blocking, radio retries, and actuator output deadlines must also be analysed.

4. Interfaces and Reliability

Common digital interfaces include GPIO, UART, SPI, I²C, CAN, USB, Ethernet, and wireless links such as Bluetooth Low Energy, Wi-Fi, Thread, and LoRaWAN. Interface selection depends on distance, throughput, topology, energy, determinism, node count, electromagnetic environment, and protocol overhead.

SPI commonly provides high throughput and full-duplex transfer but needs chip-select management and has limited inherent fault detection. I²C reduces wiring through addressing and open-drain signalling, but pull-up resistors, bus capacitance, clock stretching, address conflicts, and stuck-low recovery require attention. UART is simple point-to-point asynchronous communication; baud-rate mismatch and framing errors must be considered. CAN is designed for robust multi-node communication with arbitration, error detection, retransmission, and fault confinement.

Reliability is a system property, not merely a protocol property. Good practices include:

• CRCs or checksums selected for the expected error model;
• sequence numbers, acknowledgements, timeouts, and bounded retries;
• input validation, length checks, and state-machine-based parsing;
• watchdogs used to recover from defined failure modes;
• brownout detection and safe reset handling;
• termination, shielding, grounding, and transient protection where appropriate;
• pull-up sizing based on rise-time and sink-current constraints;
• fault injection and electromagnetic compatibility testing.

A retry policy must be bounded. Infinite retries can block higher-level functions and exhaust energy. Safety-relevant commands should be idempotent where possible, authenticated, and associated with an expiry or freshness value.

5. Actuator Control and Safety

Open-loop control commands an actuator without measuring the result. It is simple but vulnerable to load variation, friction, supply changes, and ageing. Closed-loop control measures an output and adjusts the command. A proportional–integral–derivative controller is commonly represented in continuous time as

u(t) = K_p e(t) + K_i ∫e(τ)dτ + K_d de(t)/dt,

where e(t) is the reference minus measured output. In digital implementation, the integral and derivative terms require sampling, numerical approximation, saturation handling, and filtering. Derivative action amplifies measurement noise, so a filtered derivative or velocity estimate is often used. Integral windup occurs when the actuator saturates while the integral continues to accumulate; anti-windup schemes such as conditional integration or back-calculation are therefore important.

PWM average output is approximately D V_s for an ideal switching stage driving a suitably averaged load, where D is duty ratio between 0 and 1 and V_s is supply voltage. This is not a universal actuator law: motor speed, torque, current, and load depend on electrical and mechanical dynamics. A motor driver must be rated for peak current, switching losses, thermal dissipation, electromagnetic interference, and fault conditions.

Safety design requires defined states for sensor failure, communication loss, watchdog expiry, overcurrent, overtemperature, and unexpected restart. A safe state may mean de-energised, braked, limited-power, or mechanically held, depending on the application.

6. Power Management

The energy budget should be calculated from operating modes rather than nominal supply current alone. Average current for discrete modes is

I_avg = Σ(D_k I_k),

where D_k is the fraction of time in mode k and ΣD_k=1. If a battery has usable capacity Q_use in ampere-hours, an idealised operating time is Q_use/I_avg. Real capacity depends on temperature, discharge rate, ageing, converter efficiency, cutoff voltage, and pulse loads, so a derating factor and measured validation are required.

Duty cycling may place a sensor, radio, and MCU into sleep states. Wake-up time, state retention, clock start-up, sensor settling, and network synchronisation must be included in the timing and energy model. A low-power design also reduces leakage, uses appropriate voltage domains, avoids floating inputs, selects efficient regulators, and minimises unnecessary data transmission. Energy harvesting systems require power-fail-safe state management and energy-aware scheduling rather than assuming continuous availability.

7. Hardware–Software Integration

Integration begins with a precise interface contract: electrical levels, timing, units, scaling, calibration coefficients, error codes, reset behaviour, concurrency rules, and versioning. Hardware abstraction layers isolate application logic from MCU registers and permit testing with simulated peripherals. Drivers should expose timeouts and explicit error states rather than silently blocking.

A robust acquisition path commonly uses DMA to transfer ADC samples into ping-pong buffers. One buffer can be processed while the other is filled, reducing CPU intervention. Buffer size is a trade-off: larger buffers reduce interrupt frequency but increase latency and memory use. Timestamping should occur as close as possible to acquisition, preferably using a hardware timer or peripheral trigger rather than a delayed software timestamp.

Calibration may include offset and gain correction:

x_corrected = (x_raw − x_0)/G,

where x_0 is the measured zero offset in raw units and G is the calibrated scale factor. This correction assumes an approximately linear sensor over the operating range. Temperature-dependent or nonlinear sensors require a multidimensional model, lookup table, or polynomial whose validation error is known.

Security is inseparable from device integration. Secure boot establishes firmware authenticity; signed updates protect the update channel; hardware-backed keys reduce extraction risk; least privilege limits damage from compromised components; and secure storage protects credentials. Data minimisation, consent, retention control, and protection of location or health-related data are ethical and regulatory concerns. Devices deployed in safety or critical infrastructure may also require product-security, radio, electromagnetic-compatibility, functional-safety, and privacy compliance appropriate to jurisdiction and sector.

8. Illustrative Case: Predictive Monitoring of an Industrial Pump

Background

The following is an illustrative engineering case. A water-treatment facility wants to detect pump bearing degradation before failure. Existing inspection is weekly, while a developing bearing fault can worsen within hours.

Problem and analysis

The system must measure vibration up to 1.2 kHz, temperature up to 100 °C, and motor current. It must operate for at least six months from a constrained power supply and report alarms over an industrial network. False alarms are costly, but missed alarms can interrupt treatment.

The vibration chain uses a sensor with a known analogue bandwidth, an anti-aliasing filter, and an ADC sampled at 5 kS/s. The 5 kS/s rate gives a 2.5 kHz Nyquist frequency, leaving a transition band above 1.2 kHz; the filter must still attenuate higher-frequency energy. Sampling at 2 kS/s would be rejected because its 1 kHz Nyquist frequency is below the required 1.2 kHz signal band.

Approach and solution

A low-power MCU performs scheduled acquisition using a timer-triggered ADC and DMA. A temperature sensor uses a digital interface with CRC checking. A current transducer is isolated because of the motor’s electrical environment. The firmware uses an RTOS with high-priority acquisition, medium-priority feature extraction, and lower-priority communication tasks. Response-time analysis includes mutex blocking and DMA completion interrupts.

Features include RMS vibration, crest factor, band energy, temperature trend, and current imbalance. The alarm algorithm combines threshold checks with a baseline model that is updated only during verified healthy operation. A watchdog, brownout detector, bounded communication retries, and fail-safe alarm output handle abnormal conditions. The node enters a reduced sampling mode when the pump is stopped.

Outcome

In a pilot deployment, the architecture provides time-aligned measurements, avoids aliasing in the specified band, and reduces communication energy by transmitting features rather than raw data continuously. The result is not automatically a validated diagnostic system: threshold performance must be assessed against labelled faults, environmental variation, sensor mounting changes, and missing-data cases.

Learning points

The case demonstrates that sampling, mounting, filter design, scheduling, power management, feature extraction, and maintenance decisions must be designed together. A technically accurate sensor reading is not sufficient if its timestamp, calibration status, or failure indication is unknown.

9. Contemporary Developments and Best Practices

TinyML permits inference near the sensor, reducing bandwidth and latency, but model quantisation, drift, explainability, update security, and validation remain important. Event-driven sensors and neuromorphic or asynchronous interfaces can reduce energy for sparse events. Time-sensitive networking and deterministic wireless mechanisms are relevant where bounded communication latency is required. RISC-V ecosystems increase architectural flexibility, although toolchain maturity, verification, and software support must be assessed. Digital twins and fleet telemetry assist calibration and predictive maintenance, but they increase privacy, cybersecurity, and lifecycle-management obligations.

Best practice is to:

1. derive device specifications from system-level requirements;

2. separate accuracy, precision, resolution, and repeatability;

3. design the anti-aliasing filter and sampling rate together;

4. use measured ADC metrics rather than nominal bit count alone;

5. perform response-time analysis for real-time tasks;

6. bound retries, blocking, and recovery paths;

7. include actuator saturation and physical safety states;

8. budget energy across all operating modes;

9. make calibration, timestamps, diagnostics, and firmware version visible;

10. test under temperature, supply variation, interference, faults, and ageing.

Chapter Summary

Smart IoT devices integrate transducers, signal conditioning, converters, processors, firmware, communication interfaces, actuators, and power systems. Sensor selection requires analysis of range, accuracy, noise, bandwidth, drift, interface, environmental conditions, and energy. Signal conditioning must address loading, amplification, filtering, protection, and aliasing. Sampling must satisfy the strict Nyquist condition with practical margin; a 1.2 kHz signal requires a sampling rate greater than 2.4 kS/s, so 2.0 kS/s is inadequate.

ADC evaluation requires more than nominal resolution: quantisation, SNR, ENOB, INL, DNL, reference stability, offset, gain, and noise must be considered. Microcontroller and operating-system choices depend on deterministic timing, resources, security, tools, and power. RTOS utilisation tests are useful but limited; response-time analysis is needed when blocking and interference matter. Reliable interfaces require electrical integrity, error detection, validation, bounded retries, and recovery. Actuator systems require suitable drivers, feedback, saturation handling, and defined safe states. Finally, power, calibration, security, privacy, lifecycle support, and verification must be designed as part of hardware–software integration rather than added after implementation.

Key Terms

Sensor: A subsystem that measures a physical quantity and produces usable data.

Transducer: A device that converts a physical variable into an electrical or other signal.

Actuator: A device that converts an electrical command into physical action.

Signal conditioning: Adaptation of a sensor signal through amplification, filtering, protection, or conversion.

Aliasing: Misrepresentation of spectral components caused by insufficient sampling.

Nyquist frequency: One-half of the sampling frequency.

ADC: Analogue-to-digital converter.

ENOB: Effective number of bits inferred from measured converter performance.

INL: Deviation of ADC transfer behaviour from an ideal straight line.

DNL: Deviation of an individual ADC code width from one ideal LSB.

Microcontroller: Integrated processor, memory, and peripheral device for embedded control.

RTOS: Operating system providing scheduling and timing services for real-time applications.

Schedulability: Ability of a task set to meet all specified timing constraints.

Priority inversion: Delay of a high-priority task by lower-priority resource ownership.

DMA: Direct memory access, allowing peripherals to transfer data with limited CPU intervention.

Duty cycling: Alternating active and low-power operating periods.

Watchdog: Hardware or software timer that supports recovery from a stalled system.

CRC: Cyclic redundancy check used to detect transmission or storage errors.

Anti-windup: Technique preventing excessive integral accumulation during actuator saturation.

Secure boot: Process that permits execution only of authenticated firmware.

Review Questions

Short Answer Questions

1. Distinguish sensor accuracy, resolution, and repeatability.

2. Why is an anti-aliasing filter required before an ADC?

3. Define ENOB and identify two factors that reduce it in a real ADC.

4. What is priority inversion, and how can priority inheritance reduce it?

5. State two reasons why an actuator normally requires a driver circuit.

Long Answer Questions

1. Explain the complete signal path from a physical variable to a cloud application, identifying likely error sources at each stage.

2. Compare bare-metal firmware, an RTOS, and embedded Linux for a connected industrial sensor node.

3. Derive the ideal ADC quantisation-noise SNR relationship and discuss its assumptions and limitations.

4. Explain how actuator saturation, integral windup, and fail-safe states affect closed-loop IoT control.

5. Develop a power-management strategy for a battery-operated node that combines sensing, local processing, and intermittent radio communication.

Analytical / Application Questions

1. A vibration signal contains components up to 1.8 kHz. Evaluate sampling rates of 3.0 kS/s, 4.0 kS/s, and 8.0 kS/s, and explain what additional filter information is needed before selecting one.

2. For periodic tasks (C,T) of (1 ms, 8 ms), (2 ms, 16 ms), and (3 ms, 40 ms), calculate total utilisation and discuss whether the three-task sufficient fixed-priority bound is passed. State assumptions and explain why a response-time test may still be required.

3. Design an interface and fault-recovery strategy for a remote pump controller exposed to electrical noise, intermittent communication, sensor disconnection, and low battery. Justify protocol, diagnostics, actuator safe state, and retry choices.

Multiple Choice Questions with Answers

Question 1

A vibration signal contains useful components up to 1.2 kHz. Which statement is correct about a 2.0 kS/s sampler?

A. It is sufficient because 2.0 kS/s exceeds 1.2 kHz.

B. It is sufficient if the ADC has at least 12 bits.

C. It is insufficient because its Nyquist frequency is 1.0 kHz.

D. It is sufficient provided the signal is periodic.

Correct Answer: C. It is insufficient because its Nyquist frequency is 1.0 kHz.

Question 2

For an ideal 12-bit ADC with a 4.096 V input span, the nominal LSB size is closest to:

A. 0.001 V

B. 0.004 V

C. 0.012 V

D. 0.341 V

Correct Answer: A. 0.001 V

Question 3

Which condition is required for the ideal ADC SNR expression 6.02N + 1.76 dB?

A. A full-scale sinusoidal input and quantisation noise as the only noise source

B. A square-wave input at half the sampling rate

C. An arbitrary input with no quantisation

D. An analogue signal exceeding the ADC range

Correct Answer: A. A full-scale sinusoidal input and quantisation noise as the only noise source

Question 4

For three independent periodic tasks under the classic Liu–Layland assumptions, which is a sufficient fixed-priority utilisation bound?

A. U ≤ 1/n

B. U ≤ n(2^(1/n) − 1)

C. U ≥ n(2^(1/n) − 1)

D. U = 2n

Correct Answer: B. U ≤ n(2^(1/n) − 1)

Question 5

What is the principal purpose of DMA in an ADC acquisition system?

A. To increase sensor sensitivity

B. To transfer peripheral data to memory with limited CPU intervention

C. To eliminate analogue noise

D. To replace the anti-aliasing filter

Correct Answer: B. To transfer peripheral data to memory with limited CPU intervention

Question 6

Which actuator-control problem occurs when an integral term continues accumulating while the actuator is saturated?

A. Aliasing

B. Priority inversion

C. Integral windup

D. Quantisation dithering

Correct Answer: C. Integral windup

Question 7

Which feature is most directly associated with robust multi-node CAN communication?

A. No error detection

B. Arbitration, error detection, and fault confinement

C. Mandatory optical isolation in every node

D. Operation without any physical-layer constraints

Correct Answer: B. Arbitration, error detection, and fault confinement

Question 8

If a device spends 90% of its time at 10 mA and 10% at 100 mA, its average current is:

A. 10.9 mA

B. 19 mA

C. 55 mA

D. 100 mA

Correct Answer: B. 19 mA

Question 9

Which statement about an RTOS is most accurate?

A. An RTOS automatically guarantees every deadline.

B. An RTOS removes the need for timing analysis.

C. An RTOS supplies scheduling mechanisms, but deadline guarantees require analysis and bounded implementation behaviour.

D. An RTOS can execute only one task.

Correct Answer: C. An RTOS supplies scheduling mechanisms, but deadline guarantees require analysis and bounded implementation behaviour.

Question 10

Which practice best limits unsafe communication recovery behaviour?

A. Retry every failed message indefinitely

B. Use bounded retries, timeouts, validation, and a defined safe state

C. Ignore message length fields

D. Reset the actuator output randomly

Correct Answer: B. Use bounded retries, timeouts, validation, and a defined safe state