Fundamentals of Electrical Engineering

Chapter 3
DC Circuit Laws and Systematic Analysis

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DC Circuit Laws and Systematic Analysis

Introduction

Direct-current (DC) circuit analysis is the foundation for understanding electrical and electronic systems. A DC circuit contains sources and elements whose voltages and currents are constant or vary slowly enough that transient effects can be neglected. Although practical systems may contain capacitors, inductors, semiconductor devices, and digital controllers, their operating points are frequently determined by linear resistive models.

This chapter develops a systematic method for analyzing linear DC circuits. Ohm’s law relates voltage, current, and resistance; Kirchhoff’s laws express conservation of energy and charge; and series-parallel reduction, division rules, nodal analysis, and mesh analysis provide increasingly general solution techniques. The final check in every reliable analysis is power conservation.

Learning Objectives

After studying this chapter, you should be able to:

  1. Apply Ohm’s law with consistent reference directions and polarities.
  2. Reduce series and parallel resistor networks.
  3. Use voltage-division and current-division relationships.
  4. Formulate and solve Kirchhoff voltage-law (KVL) and Kirchhoff current-law (KCL) equations.
  5. Analyze circuits using node-voltage and mesh-current methods.
  6. Check results using units, limiting cases, and power conservation.
  7. Recognize assumptions, modeling limitations, and practical measurement issues.

1. Electrical Quantities and Circuit Models

A circuit consists of interconnected electrical elements. A node is a point at which two or more element terminals are electrically connected. A branch is an element or series-connected group of elements between two nodes. A loop is any closed path, while a mesh is a loop that contains no other loop inside it.

The principal quantities are:

QuantitySymbolSI unitMeaning
Chargeqcoulomb (C)Quantity of electric charge
Currentiampere (A)Rate of charge flow
Voltagevvolt (V)Energy transferred per unit charge
ResistanceRohm (Ω)Opposition to current
Powerpwatt (W)Rate of energy transfer

The current definition is

i = dq/dt

where q is charge in coulombs and t is time in seconds. Voltage is energy per unit charge. In circuit theory, a reference direction for current and a reference polarity for voltage are selected before equations are written. A negative calculated value means that the actual quantity is opposite to the assumed reference.

An ideal voltage source maintains a specified voltage independent of its current. An ideal current source maintains a specified current independent of its voltage. Real sources have limits and internal resistance, so ideal sources are models valid within an operating range.

2. Ohm’s Law and Resistors

For a linear resistor, Ohm’s law is

v = iR

where v is the voltage across the resistor in volts, i is the current through it in amperes, and R is resistance in ohms. The relationship assumes a linear, time-invariant resistive element over the operating range. Equivalently,

i = v/R

and

R = v/i

provided the relevant denominator is nonzero.

If current enters the terminal marked positive for voltage, the passive sign convention is used. The resistor absorbs power:

p = vi = i²R = v²/R

The three forms are equivalent for a resistor. Power is positive when the element absorbs energy and negative when it delivers energy under the chosen reference convention.

Worked Example 1: Ohm’s law and power

A 12 V source is connected to a 6 Ω resistor. The current is

i = v/R = 12 V/6 Ω = 2 A

The absorbed power is

p = vi = (12 V)(2 A) = 24 W

Thus the resistor converts electrical energy into heat at 24 W. The source delivers 24 W if its current leaves the source’s positive terminal.

3. Kirchhoff’s Laws

Kirchhoff’s laws follow from two conservation principles.

Kirchhoff’s Current Law

Kirchhoff’s current law (KCL) states that the algebraic sum of currents at a node is zero:

∑ ik = 0

This expresses conservation of charge. Currents entering a node may be assigned positive signs and currents leaving negative signs, or vice versa, provided the convention is used consistently. For example, if i₁ and i₂ enter a node while i₃ leaves,

i₁ + i₂ − i₃ = 0

so i₃ = i₁ + i₂.

Kirchhoff’s Voltage Law

Kirchhoff’s voltage law (KVL) states that the algebraic sum of voltage changes around any closed path is zero:

∑ vk = 0

This expresses conservation of energy in a lumped circuit model. Traversing a resistor in the direction of its current produces a voltage drop of iR; traversing opposite the current produces a rise of iR. Crossing a source from its negative to positive terminal is a rise, and crossing from positive to negative is a drop.

KCL and KVL are not competing laws. KCL is applied at nodes, whereas KVL is applied around loops. Together with element relations such as Ohm’s law, they produce a complete set of circuit equations.

4. Series and Parallel Networks

Series elements

Elements are in series when the same current must flow through each element. For resistors in series,

Req = R₁ + R₂ + ⋯ + Rn = ∑ Rk

The equivalent resistance is larger than every individual positive resistance. The total voltage is divided in proportion to resistance.

Parallel elements

Elements are in parallel when they share the same two nodes and therefore have the same voltage. For resistors in parallel,

1/Req = 1/R₁ + 1/R₂ + ⋯ + 1/Rn

For two resistors, this becomes

Req = R₁R₂/(R₁ + R₂)

For positive resistances, a parallel equivalent is smaller than the smallest individual resistance. Conductance is often convenient:

G = 1/R

where G is in siemens (S). Parallel conductances add directly: G_eq = G₁ + G₂ + ⋯ + G_n.

Reduction is possible only when the connections genuinely satisfy the series or parallel definitions. Two components that merely appear adjacent in a drawing are not necessarily in series, and two components whose lines cross are not necessarily in parallel.

Worked Example 2: Series-parallel reduction

A 4 Ω resistor is in series with a parallel combination of 6 Ω and 3 Ω. First,

Rp = (6 × 3)/(6 + 3) = 18/9 = 2 Ω

Therefore,

Req = 4 + 2 = 6 Ω

If the network is connected to a 12 V source, the source current is

I = 12/6 = 2 A

The voltage across the 4 Ω resistor is 8 V. The parallel group therefore has 4 V across it. Its branch currents are 4/6 = 0.667 A and 4/3 = 1.333 A; their sum is 2 A, confirming KCL.

5. Voltage and Current Division

Voltage division

For series resistors connected across a source voltage V, the voltage across R_k is

vk = V × Rk/(R₁ + R₂ + ⋯ + Rn)

This assumes ideal wires, series connection, and no external load connected to the divider output. If a load is connected, it changes the effective resistance and must be included in the calculation.

For two resistors, v₂ = V R₂/(R₁ + R₂). The larger resistor receives the larger voltage because the series current is common.

Current division

For two parallel resistors carrying total current I, the current through R₁ is

i₁ = I × R₂/(R₁ + R₂)

and the current through R₂ is

i₂ = I × R₁/(R₁ + R₂)

The branch current is inversely proportional to its own resistance. In conductance form, for n parallel branches,

ik = I × Gk/(G₁ + G₂ + ⋯ + Gn)

Loading and practical design

A voltage divider is not an ideal voltage source. Connecting a load R_L across R₂ changes the lower resistance to R₂ || R_L, where || denotes the two-resistor parallel equivalent. The output becomes

vo = V × (R₂ || RL)/(R₁ + (R₂ || RL))

Consequently, divider design must consider load current, source tolerance, resistor tolerance, and power dissipation.

6. A Systematic Circuit-Analysis Procedure

A dependable procedure is more important than memorizing isolated formulas:

  1. Redraw the circuit clearly and label nodes, branches, polarities, and current directions.
  2. Identify series and parallel portions that can be reduced without changing the terminal behavior.
  3. Select a method: direct reduction, KCL/node voltage, KVL/mesh current, or a combination.
  4. Write equations before substituting numbers where practical.
  5. Solve for unknown voltages and currents with units.
  6. Interpret negative results as reversed reference directions.
  7. Check KCL, KVL, limiting behavior, and power conservation.

A circuit with n essential nodes generally requires n − 1 independent node-voltage equations after one reference node is selected. A mesh method requires one independent equation for each independent mesh current in a planar circuit. Redundant equations should not be added merely to increase the apparent amount of work.

7. Node-Voltage Analysis

Node-voltage analysis assigns voltages relative to a selected reference node, usually called ground. The reference node has voltage 0 V. For a resistor between nodes a and b, current from a to b is

iab = (Va − Vb)/R

Applying KCL at node a produces an equation in node voltages.

Worked Example 3: Node-voltage analysis

A 10 V source feeds a 2 kΩ resistor connected to node V, and a 3 kΩ resistor connects V to ground. KCL at V gives

(V − 10)/2 kΩ + V/3 kΩ = 0

Multiplying by 6 kΩ,

3(V − 10) + 2V = 0

Thus 5V − 30 = 0 and V = 6 V. The current through the 2 kΩ resistor is (10 − 6)/2 kΩ = 2 mA, while the current through the 3 kΩ resistor is 6/3 kΩ = 2 mA. KCL is satisfied.

Special cases

If an ideal voltage source connects a node directly to ground, that node voltage is known immediately. If an ideal voltage source lies between two nonreference nodes, the two nodes form a supernode. KCL is written around the supernode, together with the voltage-source constraint V_a − V_b = V_s.

Node analysis is often efficient when a circuit has relatively few essential nodes, many current sources, or several branches connected to a common reference.

8. Mesh-Current Analysis

Mesh analysis is based on KVL and applies directly to planar circuits. Assign a mesh current to each independent mesh, normally all clockwise. For a resistor belonging only to mesh j, its voltage contribution is R i_j. For a resistor shared by meshes j and k, the voltage drop in mesh j is R(i_j − i_k).

Worked Example 4: Two-mesh analysis

Consider two clockwise meshes sharing a 2 Ω resistor. The left mesh contains a 10 V source and a 4 Ω resistor; the right mesh contains a 6 Ω resistor. Let mesh currents be i₁ and i₂. The KVL equations are

(4 + 2)i₁ − 2i₂ = 10
−2i₁ + (6 + 2)i₂ = 0

The second equation gives i₂ = i₁/4. Substitution into the first gives 6i₁ − 2(i₁/4) = 10, or 5.5i₁ = 10. Therefore,

i₁ = 1.818 A

and

i₂ = 0.455 A

The current in the shared resistor, downward in the direction of i₁, is i₁ − i₂ = 1.364 A. A negative mesh-current result would simply indicate that the actual current is opposite the selected mesh direction.

Mesh analysis is especially useful for planar circuits with few meshes and many voltage sources. It is less convenient for nonplanar circuits or circuits dominated by current sources. A current source shared by two meshes creates a supermesh; KVL is written around the outer boundary and a current constraint is added.

9. Power Conservation and Verification

For a complete DC circuit, the algebraic sum of element powers is zero:

∑ pk = 0

Using passive sign convention, p_k > 0 denotes absorption and p_k < 0 denotes delivery. Equivalently,

Pdelivered = Pabsorbed

This check is independent of the method used to find the voltages and currents.

Verification example

In Worked Example 2, the 4 Ω resistor absorbs (2 A)²(4 Ω) = 16 W. The 6 Ω branch absorbs (0.667 A)²(6 Ω) ≈ 2.667 W, and the 3 Ω branch absorbs (1.333 A)²(3 Ω) ≈ 5.333 W. Total absorption is 24 W. The 12 V source delivers (12 V)(2 A) = 24 W, so the net power is zero.

Other useful checks include:

  • Units: volts divided by ohms must produce amperes.
  • KCL: branch currents entering a node must equal currents leaving.
  • KVL: voltage rises and drops around a loop must balance.
  • Bounds: a passive voltage-divider output should lie between source limits.
  • Limiting cases: an open circuit has zero current; an ideal short has zero voltage.
  • Resistor ratings: calculated power must not exceed the component rating, with an appropriate safety margin.

10. Applied Case: A Sensor Interface Divider

Background. An illustrative industrial sensor produces a 12 V supply and a controller requires approximately 5 V at an input that draws 1 mA. A two-resistor divider is proposed.

Problem. Select nominal resistors so that the loaded output is close to 5 V. Because the controller is a load, it cannot be ignored.

Analysis and approach. Choose R₂ = 10 kΩ from output to ground. To draw 1 mA at 5 V, the controller’s approximate input resistance is R_L = 5 kΩ. Hence

R₂,eff = 10 kΩ || 5 kΩ = (10 × 5)/(10 + 5) kΩ = 3.333 kΩ

For 5 V from 12 V, the required ratio is R₁/R₂,eff = (12 − 5)/5 = 1.4. Therefore R₁ ≈ 4.667 kΩ; a standard 4.7 kΩ resistor is suitable. The loaded output is

vo = 12 × 3.333/(4.7 + 3.333) ≈ 4.98 V

The current through R₁ is approximately (12 − 4.98)/4.7 kΩ = 1.49 mA. About 0.99 mA enters the load and 0.50 mA flows through the 10 kΩ resistor.

Outcome. The divider meets the nominal voltage requirement, but its output changes if the load current changes. A regulated supply, buffer amplifier, or dedicated converter may be preferable when accuracy, efficiency, or isolation is required.

Learning points. Loading must be included; nominal calculations do not guarantee performance under tolerance and temperature variation; and resistor power ratings must be checked. The power in R₁ is approximately (1.49 mA)²(4.7 kΩ) ≈ 10.4 mW, so a conventional 0.25 W resistor is adequate in this illustrative case.

11. Limitations, Safety, and Professional Practice

The methods in this chapter assume lumped elements, ideal wires, linear resistors, and DC steady state. Real resistors vary with temperature and tolerance. Wire resistance, contact resistance, source internal resistance, and instrument loading can affect results. At high frequency, parasitic capacitance and inductance invalidate a purely resistive model.

Electrical measurements require safe procedures. De-energize circuits before changing connections, use appropriately rated probes and meters, avoid shorting a voltage source, and observe instrument category and voltage ratings. In professional work, calculations should be traceable, component ratings documented, and designs reviewed against applicable electrical codes and institutional safety procedures. Software circuit simulators are useful for verification, but they do not replace correct models, independent calculations, or physical safety controls.

Modern design tools can automatically construct nodal matrices and solve large linear systems. AI-assisted tools may help identify equations or compare simulation results, but engineers remain responsible for reference conventions, model validity, data confidentiality, and verification of generated results.

Chapter Summary

Ohm’s law connects voltage, current, and resistance for linear resistors. KCL expresses charge conservation at nodes, while KVL expresses energy conservation around closed paths. Series resistances add, parallel conductances add, and voltage- and current-divider formulas are convenient special cases of these laws. Node-voltage analysis uses KCL and is effective for circuits with few essential nodes; mesh-current analysis uses KVL and is effective for planar circuits with few meshes. Ideal-source constraints produce special structures such as supernodes and supermeshes. Every solution should be checked using units, KCL, KVL, physical limits, component ratings, and power conservation. Practical divider design must account for loading, tolerances, safety, and the limitations of ideal circuit models.

Key Terms

Node: A connection point common to two or more circuit elements.

Branch: An element or series path between two nodes.

Loop: Any closed path in a circuit.

Mesh: A loop containing no other loop.

Reference direction: An arbitrarily selected positive direction for current.

Reference polarity: An arbitrarily selected positive terminal for voltage.

Ohm’s law: The relation v = iR for a linear resistor.

KCL: The algebraic sum of currents at a node is zero.

KVL: The algebraic sum of voltages around a closed path is zero.

Resistance: Opposition to current, measured in ohms.

Conductance: Reciprocal of resistance, measured in siemens.

Series connection: A connection in which elements carry the same current.

Parallel connection: A connection in which elements share the same voltage.

Voltage division: Distribution of source voltage among series elements.

Current division: Distribution of total current among parallel branches.

Node-voltage analysis: A KCL-based method using node voltages relative to a reference.

Mesh-current analysis: A KVL-based method using currents assigned to independent meshes.

Supernode: Two or more nonreference nodes linked by an ideal voltage source.

Supermesh: A mesh region formed around a current source shared by meshes.

Passive sign convention: A convention in which positive current enters the positive voltage terminal.

Review Questions

Short Answer Questions

  1. State Ohm’s law and define each quantity in the relation.
  2. What physical conservation principles underlie KCL and KVL?
  3. Distinguish between series and parallel resistor connections.
  4. Why can a voltage-divider output change when a load is connected?
  5. What does a negative calculated current indicate?

Long Answer Questions

  1. Explain a systematic procedure for analyzing a linear DC circuit, including methods of verification.
  2. Derive the two-resistor voltage-divider formula using KVL and Ohm’s law.
  3. Explain node-voltage analysis, including the treatment of an ideal voltage source between two nonreference nodes.
  4. Explain mesh-current analysis and the voltage contribution of a resistor shared by two meshes.
  5. Discuss why power conservation is an essential independent check of a circuit solution.

Analytical / Application Questions

  1. A 24 V source feeds a 4 Ω resistor in series with a parallel combination of 8 Ω and 16 Ω. Determine the equivalent resistance, source current, voltage across the parallel group, and current in each branch.
  2. Use node-voltage analysis for a node connected through 2 kΩ to 10 V, through 5 kΩ to 4 V, and through 10 kΩ to ground. Determine the node voltage and each branch current.
  3. Design a loaded divider from 15 V to approximately 6 V when the load resistance is 6 kΩ. Select one convenient lower resistor, calculate the required upper resistor using the loaded model, and estimate the resistor powers.

Multiple Choice Questions with Answers

Question 1

A 12 V source is connected across a 6 Ω resistor. What current flows?

A. 0.5 A

B. 2 A

C. 6 A

D. 72 A

Correct Answer: B. 2 A

Question 2

Which law expresses conservation of charge at a circuit node?

A. Ohm’s law

B. Kirchhoff’s voltage law

C. Kirchhoff’s current law

D. The power law

Correct Answer: C. Kirchhoff’s current law

Question 3

Two resistors of 6 Ω and 3 Ω are connected in parallel. Their equivalent resistance is:

A. 2 Ω

B. 3 Ω

C. 9 Ω

D. 18 Ω

Correct Answer: A. 2 Ω

Question 4

In a series voltage divider, the larger resistor receives:

A. No voltage

B. The smaller voltage always

C. A voltage proportional to its resistance

D. A current proportional to its resistance

Correct Answer: C. A voltage proportional to its resistance

Question 5

A resistor has 10 V across it and carries 2 A. Its absorbed power is:

A. 5 W

B. 12 W

C. 20 W

D. 40 W

Correct Answer: C. 20 W

Question 6

In node-voltage analysis, node voltages are normally measured relative to:

A. The largest resistor

B. A selected reference node

C. The highest-current branch

D. The power source only

Correct Answer: B. A selected reference node

Question 7

For a resistor shared by two mesh currents i₁ and i₂, the voltage contribution in mesh 1 is commonly written as:

A. R(i₁ + i₂)

B. R(i₁ − i₂)

C. R/i₁

D. R(i₂ − i₁)²

Correct Answer: B. R(i₁ − i₂)

Question 8

A negative calculated branch current means that:

A. The circuit violates KCL

B. The resistor has negative resistance

C. The actual current is opposite the assumed reference direction

D. The source must be removed

Correct Answer: C. The actual current is opposite the assumed reference direction

Question 9

For a complete DC circuit using passive sign convention, the algebraic sum of all element powers is:

A. Zero

B. Equal to the source voltage

C. Always positive

D. Equal to the equivalent resistance

Correct Answer: A. Zero

Question 10

A voltage-divider load generally causes the output voltage to:

A. Remain unchanged under all conditions

B. Increase above the source voltage

C. Change because the load alters the effective resistance

D. Become exactly zero

Correct Answer: C. Change because the load alters the effective resistance

Fundamentals of Electrical Engineering
Chapter 3 of 15