Electronics Devices & Circuits

Chapter 9
Frequency Response, Feedback and Stability

Post Graduate Program in Electrical Engineering
Electronics Devices & Circuits   •   Post Graduate

9. Frequency Response, Feedback and Stability

Introduction and Context

An amplifier is rarely required to operate at only one frequency. Communication circuits, instrumentation systems, control interfaces, data converters, and sensor front ends must preserve signal amplitude and phase over a specified frequency range. The frequency response of an amplifier describes how its gain and phase vary with frequency. At low frequencies, coupling and bypass capacitors often reduce gain; at high frequencies, transistor junction capacitances, wiring capacitances, and device transit times become significant. Between these regions lies the midband, where the gain is approximately constant.

Frequency response cannot be studied independently of feedback. Feedback modifies gain, bandwidth, distortion, noise, input resistance, output resistance, and stability. Negative feedback usually improves several performance measures, but it also introduces the possibility of oscillation when the phase shift around the feedback loop becomes excessive. Consequently, amplifier design requires simultaneous consideration of poles, zeros, loop gain, compensation, phase margin, and stability criteria.

This chapter develops a unified approach to these issues. It begins with low- and high-frequency models, proceeds to Bode-plot interpretation and pole-zero analysis, and then examines feedback amplifiers and practical stability design.

Learning Objectives

After completing this chapter, the reader should be able to:

1. Explain the origin of low-, mid-, and high-frequency limitations in transistor amplifiers.

2. Construct approximate low- and high-frequency equivalent circuits.

3. Identify poles and zeros and estimate their effects on magnitude and phase response.

4. Construct and interpret Bode plots.

5. Derive the principal effects of negative feedback on gain, bandwidth, distortion, noise, and impedances.

6. Distinguish forward gain, feedback factor, loop gain, and closed-loop gain.

7. Assess stability using gain margin, phase margin, Nyquist reasoning, and pole locations.

8. Explain dominant-pole, lead, lag, and Miller compensation.

9. Diagnose common causes of amplifier peaking, ringing, and oscillation.

10. Apply these ideas to practical amplifier design decisions.

9.1 Frequency Regions of an Amplifier

The voltage gain of a practical amplifier may be represented by

\[

A_v(j\omega)=\frac{V_o(j\omega)}{V_i(j\omega)}.

\]

In the midband region, reactive elements have little influence and the gain is approximately a constant, \(A_M\). At low frequency, external capacitors behave as significant impedances. At high frequency, internal capacitances and device transport effects dominate. The lower and upper cutoff frequencies, \(f_L\) and \(f_H\), are conventionally defined as the frequencies at which the gain magnitude falls to \(1/\sqrt{2}\) of its midband value, or 3 dB below it. The bandwidth is approximately

\[

BW=f_H-f_L.

\]

For a wideband amplifier with \(f_H\gg f_L\), the bandwidth is nearly \(f_H\). For a narrowband or tuned amplifier, this approximation is not valid.

The frequency response is a complex quantity. A magnitude plot alone does not predict waveform fidelity or feedback stability; phase response is equally important. A sinusoid may emerge with the same amplitude but a different phase, while a nonsinusoidal waveform may suffer severe distortion because its harmonics experience unequal attenuation and phase shift.

9.2 Low-Frequency Response: Coupling and Bypass Networks

The low-frequency response of a capacitively coupled common-emitter amplifier is usually governed by three capacitors: the input coupling capacitor, the output coupling capacitor, and the emitter bypass capacitor. Each capacitor forms a high-pass network with an effective resistance.

For a capacitor \(C\) connected to an effective resistance \(R\), the corner frequency is

\[

f_c=\frac{1}{2\pi R C}.

\]

The effective resistance is the resistance seen by the capacitor with independent sources set to zero. For an input coupling capacitor, it may include the source resistance and amplifier input resistance. For an output coupling capacitor, it includes the collector or drain resistance and the load resistance. For an emitter bypass capacitor, it is related to the emitter resistance and the small-signal resistance looking into the emitter.

A single high-pass factor can be written as

\[

H(s)=\frac{s/omega_c}{1+s/\omega_c}.

\]

Below its corner frequency, the magnitude rises at approximately 20 dB per decade and its phase approaches +90 degrees relative to the high-frequency reference. If several low-frequency poles are near one another, their effects multiply. The total lower cutoff frequency is then not simply the largest individual corner frequency; the combined response must be evaluated.

The emitter bypass capacitor illustrates an important design trade-off. At midband it provides an ac ground, reducing emitter degeneration and increasing gain. At low frequency its reactance increases, degeneration returns, and gain falls. Removing the bypass capacitor may reduce gain but improve linearity, input resistance, and feedback. Thus, a low-frequency limitation is not always a defect; it may be deliberately used to shape circuit behavior.

9.3 High-Frequency Models and Device Capacitances

At high frequency, the small-signal hybrid-pi model of a bipolar transistor includes base-emitter capacitance \(C_\pi\) and base-collector capacitance \(C_\mu\). A field-effect transistor model includes gate-source and gate-drain capacitances, often denoted \(C_{gs}\) and \(C_{gd}\). These capacitances arise from depletion regions, charge storage, and device geometry.

The base-collector or gate-drain capacitance is especially influential in a voltage amplifier because it connects the input and output nodes. If the voltage gain from input to output is \(A_v\), the Miller effect gives an approximate input capacitance

\[

C_{in}\approx C_{gs}+C_{gd}(1-A_v)

\]

for a voltage-inverting stage. Since \(A_v\) is negative, the effective capacitance can be much larger than the physical feedback capacitance. The input pole is approximately

\[

f_{p,in}=\frac{1}{2\pi R_{source}C_{in}}.

\]

Miller multiplication explains why a high-gain common-source or common-emitter stage may have a surprisingly small bandwidth. It also explains why cascode configurations, which reduce voltage variation across the feedback capacitance, provide improved high-frequency performance.

A useful high-frequency approximation is a product of first-order factors:

\[

A(s)=\frac{A_0}{(1+s/\omega_{p1})(1+s/\omega_{p2})\cdots}.

\]

Each pole contributes approximately −20 dB per decade to the magnitude slope after its corner and up to −90 degrees of phase lag. A zero contributes a positive slope of 20 dB per decade and phase lead, although a left-half-plane zero and a right-half-plane zero have different stability implications.

9.4 Poles, Zeros and Bode-Plot Construction

A transfer function can be expressed as

\[

H(s)=K\frac{(1+s/\omega_{z1})(1+s/\omega_{z2})\cdots}{(1+s/\omega_{p1})(1+s/\omega_{p2})\cdots}.

\]

The roots of the numerator are zeros and the roots of the denominator are poles. Poles determine natural modes and are central to stability. Zeros shape the response by suppressing or enhancing particular frequency ranges.

For a first-order pole,

\[

|H(j\omega)|=\frac{|K|}{\sqrt{1+(omega/\omega_p)^2}},

\]

and

\[

\angle H(j\omega)=-\tan^{-1}(\omega/\omega_p).

\]

The straight-line Bode approximation is constant below \(\omega_p\), falls at 20 dB per decade above it, and has a phase transition concentrated approximately from one decade below to one decade above the pole. At the corner frequency the exact magnitude is 3 dB below the asymptotic line and the phase is −45 degrees.

For a second-order denominator,

\[

H(s)=\frac{K\omega_n^2}{s^2+2\zeta\omega_n s+omega_n^2},

\]

\(\omega_n\) is the natural frequency and \(\zeta\) is the damping ratio. A low damping ratio can produce gain peaking near \(\omega_n\), followed by ringing in the time domain. The quality factor is related to damping by \(Q=1/(2\zeta)\). This relationship makes Bode plots useful for anticipating transient behavior.

A practical Bode construction procedure is:

  • factor the transfer function into constant, pole, and zero terms;
  • mark all break frequencies on a logarithmic frequency axis;
  • begin with the low-frequency gain;
  • change the magnitude slope by +20 dB/decade for each first-order zero and −20 dB/decade for each first-order pole;
  • add phase contributions, remembering that phase—not only magnitude—determines feedback stability.

9.5 Feedback Amplifiers and Loop Gain

A feedback amplifier samples a portion of the output and returns it to the input. For negative feedback, the returned signal opposes the source signal. If the forward gain is \(A(s)\) and the feedback factor is \(\beta(s)\), the closed-loop gain is

\[

T(s)=\frac{A(s)}{1+A(s)\beta(s)}.

\]

The quantity \(L(s)=A(s)\beta(s)\) is the loop gain. When \(|L|\gg1\), the closed-loop gain approaches \(1/\beta\), making it less sensitive to variations in transistor parameters and temperature. The sensitivity of closed-loop gain to forward gain is

\[

S_T^A=\frac{1}{1+A\beta}.

\]

Thus, high loop gain reduces sensitivity.

Negative feedback also tends to reduce nonlinear distortion and noise generated inside the forward amplifier by approximately the factor \(1+A\beta\), provided the disturbance is injected within the feedback loop and loop gain remains sufficiently large at the disturbance frequency. It increases bandwidth because the closed-loop response is spread over a wider frequency range. In the simplest one-pole case, if the open-loop gain-bandwidth product is approximately constant,

\[

f_{H,closed}\approx f_{H,open}(1+A_0\beta).

\]

This benefit is accompanied by reduced gain and possible stability problems.

The effect on impedance depends on the feedback topology. Series mixing at the input tends to increase input resistance, while shunt mixing tends to decrease it. Voltage sampling at the output tends to reduce output resistance, whereas current sampling tends to increase it. These rules are valuable, but exact values should be obtained from the complete small-signal circuit.

9.6 Stability, Phase Margin and Gain Margin

The closed-loop poles are determined by

\[

1+A(s)\beta(s)=0.

\]

At a frequency where the loop phase is −180 degrees, negative feedback effectively becomes positive feedback. If the loop magnitude is at least unity there, sustained oscillation or instability may result. This is the essence of the Barkhausen condition, although the condition is best understood as a boundary condition rather than a complete universal test for nonlinear oscillators.

The gain crossover frequency \(\omega_{gc}\) is where \(|L(j\omega)|=1\), or 0 dB. The phase margin is

\[

PM=180^\circ+\angle L(j\omega_{gc}).

\]

The phase crossover frequency \(\omega_{pc}\) is where the loop phase is −180 degrees. The gain margin is

\[

GM=\frac{1}{|L(j\omega_{pc})|},

\]

or, in decibels, \(GM_{dB}=-20\log_{10}|L(j\omega_{pc})|\).

Positive phase and gain margins generally indicate a stable linear feedback system under the assumed model. A phase margin around 45–60 degrees is often selected as a practical compromise between speed and damping, but the appropriate value depends on load variation, modeling uncertainty, noise, and transient requirements. Excessive phase margin may produce a sluggish response, whereas very small phase margin produces peaking, overshoot, and ringing.

The Nyquist criterion provides a more general viewpoint. The locus of \(L(j\omega)\) is examined relative to the critical point −1+j0. Encirclements of this point, together with the number of right-half-plane open-loop poles, determine closed-loop stability. Unlike simple gain-margin inspection, the Nyquist method handles nonminimum-phase systems and unstable open-loop plants more directly.

9.7 Compensation Techniques

Compensation deliberately modifies poles and zeros so that the amplifier remains stable over expected operating conditions.

Dominant-pole compensation places a low-frequency pole in the forward path. This causes the loop gain to fall before additional poles contribute substantial phase lag. The amplifier then behaves approximately as a single-pole system near crossover. The price is reduced bandwidth or slew-rate capability.

Miller compensation uses a capacitor across a high-gain stage. Through the Miller effect, it creates pole splitting: one pole moves to a lower frequency and another to a higher frequency. This can provide a dominant pole and improve phase margin. In integrated amplifiers, a series resistor may be added to control the associated zero. An uncontrolled Miller capacitor can generate a right-half-plane zero, which introduces phase lag and degrades stability.

Lead compensation adds phase advance around the intended crossover region and is useful when extra phase margin is required. Lag compensation increases low-frequency loop gain while reducing high-frequency gain, improving steady-state accuracy but usually slowing the response. Practical compensation may combine these approaches.

A compensation design should account for load capacitance, output resistance, bias current, process variation, temperature, package parasitics, and feedback-network tolerances. Stability verified only at nominal conditions is not sufficient for a production design.

9.8 Practical Design Workflow

A disciplined frequency-response design begins with a small-signal model valid over the intended frequency range. The designer then identifies external and internal reactive elements, estimates pole and zero locations, and constructs an initial Bode plot. The loop is opened at a carefully chosen point for simulation or measurement, and the loop gain is determined without disturbing loading conditions.

The required crossover frequency is selected from speed, noise, power, and settling-time requirements. Compensation is introduced to ensure adequate phase margin at the worst-case load and process corner. Time-domain verification then checks overshoot, settling, recovery from overload, and response to large-signal transitions. Finally, stability is tested with realistic source impedance, load capacitance, interconnects, and feedback components.

A common mistake is to infer stability from a clean closed-loop gain plot alone. A closed-loop plot may hide a narrow resonance or may be measured under only one loading condition. Loop-gain measurement, pole analysis, and transient testing provide complementary evidence.

Applied Case Study: Stability of a Two-Stage CMOS Amplifier

Background

Consider an illustrative two-stage CMOS operational amplifier intended to drive a capacitive sensor interface. The first stage provides high voltage gain, and the second stage drives the load. Negative feedback sets the closed-loop voltage gain.

Situation and Problem

Initial simulation shows a high open-loop gain and adequate dc accuracy, but the closed-loop output exhibits approximately 25% overshoot and several cycles of ringing when a step is applied. The load capacitance is larger than the nominal design value.

Analysis

The first stage contributes a low-frequency pole. The second-stage output resistance and load capacitance introduce another pole. At the selected crossover frequency, the phase contribution of the two poles is large, leaving a phase margin of only about 25 degrees. The increased load capacitance lowers the output pole further, moving it closer to crossover. The loop therefore approaches the −180-degree phase condition while its magnitude is still near unity.

Approach and Solution

A Miller capacitor is inserted between the first-stage output and the second-stage output to create pole splitting. A small series resistor is added to control the compensation zero and prevent an undesirable right-half-plane zero. The compensation is selected so that the unity-loop-gain frequency remains below the worst-case non-dominant pole. The design is then evaluated for minimum and maximum load capacitance, supply voltage, temperature, and transistor-model corners.

Outcome

The revised design reduces crossover frequency slightly but increases phase margin to approximately 60 degrees in the nominal case and maintains acceptable margin at the specified corners. Step-response overshoot is substantially reduced, and the output settles without sustained ringing. The design sacrifices some speed to obtain predictable behavior over the required load range.

Learning Points

The case demonstrates that high dc gain does not guarantee a stable amplifier. Load capacitance can move a pole and change the loop phase. Compensation must be designed from loop-gain behavior, not merely from the desired closed-loop gain. Finally, robust stability is a worst-case requirement rather than a nominal simulation result.

Challenges, Limitations and Common Mistakes

Frequency-response models are approximations. Device capacitances vary with bias and voltage, transistor parameters vary with process and temperature, and parasitic elements may be difficult to extract accurately. A first-order model is valuable for insight but may miss pole-zero cancellations, nonminimum-phase zeros, distributed effects, or resonances.

Frequent design errors include confusing bandwidth with gain-bandwidth product, ignoring source and load impedance, treating all feedback as automatically stabilizing, and using the Barkhausen condition without examining pole locations. Another error is adding a compensation capacitor without checking the zero it creates. Measurement itself can alter the circuit through probe capacitance, cable inductance, or grounding impedance.

The 3 dB bandwidth is not a complete quality metric. Two amplifiers with the same bandwidth may have very different phase margins, group delays, distortion, and transient responses. For precision and communication applications, phase linearity and delay variation may be as important as amplitude flatness.

Professional and Ethical Considerations

Engineers must report bandwidth, gain, phase margin, and stability conditions with their test assumptions. Claims of stability should specify load range, supply conditions, temperature, feedback factor, and measurement method. Omitting known marginal behavior can lead to unsafe or unreliable products. In regulated or safety-critical systems, design reviews should preserve traceable evidence of worst-case stability analysis, verification, and change control.

Current Developments

Modern integrated amplifiers increasingly use automated pole-zero extraction, periodic small-signal analysis, and corner-based loop-gain simulation. Electronic-design-automation tools can estimate stability across large process and load spaces, while optimization algorithms can trade gain, bandwidth, power, and phase margin. Digitally assisted calibration can compensate some gain and bandwidth variation, but it cannot replace analog stability analysis when the feedback loop contains continuous-time dynamics. High-speed data converters and interface circuits also require attention to package parasitics, electromagnetic coupling, and distributed interconnect effects.

Best Practices

  • Begin with a physically meaningful small-signal model.
  • Separate low-frequency, midband, and high-frequency mechanisms before combining them.
  • Plot both magnitude and phase.
  • Analyze loop gain rather than relying only on closed-loop gain.
  • Design for worst-case load, process, temperature, and supply conditions.
  • Use compensation to control pole locations and zeros deliberately.
  • Confirm frequency-domain predictions with time-domain transients.
  • Check measurement loading and probe effects.
  • Document gain margin, phase margin, crossover frequency, and test conditions.

Chapter Summary

Frequency response describes the magnitude and phase variation of amplifier gain with frequency. Low-frequency behavior is commonly controlled by coupling and bypass capacitors, while high-frequency behavior is governed by device capacitances, Miller multiplication, and transistor transport effects. Poles and zeros provide a compact mathematical language for these effects, and Bode plots offer an efficient graphical method for estimating gain and phase.

Negative feedback makes closed-loop gain less sensitive to device variations and generally improves bandwidth, distortion, noise, and selected impedances. Its central quantity is loop gain, \(L=A\beta\), and the closed-loop denominator is \(1+A\beta\). Stability depends on the locations of closed-loop poles and on the relation between loop magnitude and phase. Gain margin, phase margin, and Nyquist analysis provide practical stability measures. Compensation techniques, including dominant-pole, Miller, lead, and lag compensation, intentionally shape poles and zeros to obtain a reliable trade-off between speed and damping. Sound design requires worst-case analysis, simulation, measurement, and professional reporting.

Key Terms

Bandwidth: The frequency range over which an amplifier satisfies a specified gain criterion.

Bode plot: Logarithmic plots of transfer-function magnitude and phase versus frequency.

Closed-loop gain: Gain measured with the feedback path connected.

Compensation: Deliberate modification of poles and zeros to achieve desired stability and response.

Crossover frequency: Frequency at which loop-gain magnitude equals unity.

Damping ratio: Parameter describing the decay and peaking of a second-order system.

Gain margin: The factor, or decibel amount, by which loop gain may increase before instability at phase crossover.

Loop gain: Product of forward gain and feedback factor, \(A\beta\).

Miller effect: Effective multiplication of a capacitance connected between input and output nodes.

Midband gain: Approximately constant gain in the central operating-frequency range.

Nyquist criterion: Stability test based on the locus of loop gain relative to the critical point −1.

Phase margin: Additional phase lag required at gain crossover to reach −180 degrees.

Pole: A root of the transfer-function denominator that represents a natural dynamic mode.

Right-half-plane zero: A zero that can introduce magnitude lead but phase lag and may impair stability.

Sensitivity: Dependence of a system quantity on variation in a circuit parameter.

Unity-gain frequency: Frequency at which a specified gain or loop gain has magnitude one.

Zero: A root of the transfer-function numerator that shapes magnitude and phase response.

Review Questions

Short Answer Questions

1. Why do coupling capacitors cause gain reduction at low frequencies?

2. Define loop gain and state its relation to closed-loop gain.

3. What is the Miller effect in a common-emitter amplifier?

4. Define phase margin and gain crossover frequency.

5. Why can a right-half-plane zero be harmful in a feedback amplifier?

Long Answer Questions

1. Derive the closed-loop gain of a negative-feedback amplifier and explain how feedback affects gain sensitivity, bandwidth, distortion, and noise.

2. Explain the construction and interpretation of a Bode plot for a transfer function containing two poles and one zero.

3. Discuss the high-frequency hybrid-pi model of a bipolar transistor and explain the origin of the Miller-limited bandwidth.

4. Compare dominant-pole, Miller, lead, and lag compensation techniques.

5. Explain the Nyquist stability viewpoint and relate it to gain margin and phase margin.

Analytical / Application Questions

1. An amplifier has a dominant pole at 10 Hz and a second pole at 100 kHz. Explain how increasing feedback factor changes crossover frequency and what additional information is needed to assess stability.

2. A closed-loop amplifier shows 15% overshoot and ringing only when a capacitive load is connected. Identify likely pole movements and propose a verification and compensation strategy.

3. A feedback amplifier has loop phase −145 degrees at its 0 dB crossover frequency. Estimate its phase margin and discuss whether the design is likely to require further investigation.

22. Multiple Choice Questions with Answers

Question 1

Which element most commonly determines the low-frequency cutoff of a capacitively coupled transistor amplifier?

A. Collector depletion capacitance only

B. Coupling or bypass capacitor together with its effective resistance

C. Transistor Early voltage

D. Output transistor beta at dc

Correct Answer: B. Coupling or bypass capacitor together with its effective resistance

Question 2

For a first-order pole, the asymptotic magnitude slope above the pole frequency is:

A. +20 dB per decade

B. 0 dB per decade

C. −20 dB per decade

D. −40 dB per decade

Correct Answer: C. −20 dB per decade

Question 3

The closed-loop gain of a negative-feedback amplifier is:

A. A(1+Aβ)

B. A/(1+Aβ)

C. β/(1+A)

D. A−β

Correct Answer: B. A/(1+Aβ)

Question 4

At the gain crossover frequency, a loop has phase −135°. Its phase margin is:

A. 25°

B. 45°

C. 135°

D. 315°

Correct Answer: B. 45°

Question 5

Which effect explains the increase of input capacitance caused by a capacitance between the input and output of an inverting amplifier?

A. Skin effect

B. Early effect

C. Miller effect

D. Hall effect

Correct Answer: C. Miller effect

Question 6

A right-half-plane zero is potentially dangerous because it:

A. Adds phase lead without changing magnitude

B. Introduces phase lag despite producing a magnitude-rise contribution

C. Always eliminates all poles

D. Makes the dc gain exactly unity

Correct Answer: B. Introduces phase lag despite producing a magnitude-rise contribution

Question 7

If loop gain is much greater than unity over a frequency range, the closed-loop gain is approximately:

A. Aβ

B. A

C. 1/β

D. β/A

Correct Answer: C. 1/β

Question 8

A low phase margin in a feedback amplifier most commonly leads to:

A. Improved damping and zero overshoot

B. Peaking, overshoot, and ringing

C. Infinite input resistance

D. Removal of all high-frequency poles

Correct Answer: B. Peaking, overshoot, and ringing

Question 9

The principal purpose of dominant-pole compensation is to:

A. Increase every pole frequency equally

B. Ensure loop gain falls before additional phase lag threatens stability

C. Eliminate the feedback factor

D. Increase output capacitance deliberately

Correct Answer: B. Ensure loop gain falls before additional phase lag threatens stability

Question 10

In the Nyquist plot, the critical point associated with closed-loop stability is:

A. 0+j0

B. 1+j0

C. −1+j0

D. −j1

Correct Answer: C. −1+j0

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