Electrical Engineering Materials

Chapter 8
Wide-Bandgap, Two-Dimensional and Nanoelectronic Materials

Bachelors Program in Electrical Engineering
Electrical Engineering Materials   •   Bachelor

Wide-Bandgap, Two-Dimensional and Nanoelectronic Materials

Introduction

Silicon remains the foundation of modern electronics, but several applications increasingly approach its physical and practical limits. Electric vehicles, renewable-energy converters, radar, wireless communications, flexible sensors and low-dimensional transistors require combinations of breakdown strength, switching speed, thermal performance, mechanical flexibility and electrostatic control that silicon cannot always provide efficiently.

Wide-bandgap materials—particularly silicon carbide (SiC), gallium nitride (GaN) and diamond—enable high electric fields, elevated-temperature operation and reduced power losses. Two-dimensional (2D) materials such as graphene and transition-metal dichalcogenides (TMDs) offer atomically thin channels, unusual transport properties and mechanical flexibility. Nanostructures add quantum confinement, tunnelling and large surface-to-volume ratios, but also introduce variability, interface sensitivity and difficult manufacturing requirements.

Material superiority alone does not guarantee a commercially superior device. Substrate quality, epitaxy, contacts, gate dielectrics, thermal interfaces, packaging, reliability, cost and manufacturing yield often determine whether a promising material becomes an industrial technology.

Learning Objectives

After studying this chapter, students should be able to:

  1. Relate bandgap, critical electric field, mobility and thermal conductivity to device performance.
  2. Derive the ideal drift-region specific on-resistance of a unipolar power device.
  3. Compare SiC, GaN and diamond for high-voltage, high-frequency and high-temperature applications.
  4. Explain the electronic properties of graphene and semiconducting TMDs.
  5. Describe quantum confinement and transport in nanoscale structures.
  6. Evaluate fabrication, integration, reliability and sustainability challenges.
  7. Select materials for power, radio-frequency, flexible and low-dimensional electronic systems.

1. Material Properties and Device Requirements

1.1 Bandgap and intrinsic carriers

The bandgap Eg is the energy separation between the valence-band maximum and conduction-band minimum. The intrinsic carrier concentration of a nondegenerate semiconductor is approximately

ni = √(NC NV) exp(−Eg/(2kB T))

where NC and NV are the effective densities of states in m⁻³ or cm⁻³, kB is Boltzmann's constant, and T is absolute temperature in kelvin. The equation assumes thermal equilibrium and Maxwell–Boltzmann carrier statistics.

A wide bandgap greatly suppresses intrinsic carrier generation at elevated temperatures. This reduces leakage current and permits higher junction temperatures, although contacts, oxides, metallization and packaging may impose lower practical limits.

1.2 Critical electric field

The critical electric field Ec is the approximate field at which avalanche breakdown becomes significant. Wide-bandgap materials generally sustain larger fields than silicon. Consequently, a voltage-blocking region can be thinner and more heavily doped, reducing its electrical resistance.

Critical field is not an immutable single value. It depends on crystal orientation, defect density, temperature, doping profile, device geometry and the breakdown criterion used.

1.3 Mobility, saturation velocity and thermal conductivity

Carrier mobility μ relates drift velocity to electric field in the low-field regime:

vd = μE

Here vd is drift velocity in m·s⁻¹ and E is electric field in V·m⁻¹. At high fields, velocity approaches a material-dependent saturation velocity, so the linear relation no longer applies.

High mobility reduces channel and drift resistance. High saturation velocity is particularly valuable for high-frequency devices. Thermal conductivity kth, measured in W·m⁻¹·K⁻¹, controls heat spreading. The approximate temperature rise of a device is

ΔT = PlossR_θ

where Ploss is dissipated power in watts and R_θ is the relevant junction-to-reference thermal resistance in K·W⁻¹. This lumped relation applies under specified steady-state boundary conditions; transient operation requires a thermal impedance model.

1.4 Representative material comparison

Values vary with temperature, crystal quality, doping and measurement method. The following room-temperature figures are representative rather than universal specifications.

MaterialBandgap, eVCritical field, MV·cm⁻¹Electron mobility, cm²·V⁻¹·s⁻¹Thermal conductivity, W·m⁻¹·K⁻¹Principal strengths
Si1.12≈0.3≈1,350≈150Mature, inexpensive processing
4H-SiC≈3.26≈2.5–3.0≈800–1,000≈370–490High-voltage power conversion
GaN≈3.4≈3.0–3.5≈1,000–1,500 bulk; structure-dependent≈130–230Fast switching and RF power
Diamond≈5.47often projected ≈10≈2,000 electrons; higher holes possible≈1,000–2,200Exceptional field and heat capability
GrapheneZero-gap semimetalNot used as a conventional bulk blocking valueOften very high; substrate-dependentVery high in high-quality sheetsRF, sensors, interconnects, flexible systems

Mobility comparisons must be interpreted cautiously. Device mobility can be far below bulk mobility because of interfaces, surface phonons, impurities, access resistance and high-field effects.

2. Wide-Bandgap Power Materials

2.1 Ideal drift-region resistance

Consider a vertical, unipolar power device with a uniformly doped n-type drift region of thickness L, donor concentration ND and electron mobility μn. Assuming complete donor ionization, low-field conduction and negligible contact and channel resistances, conductivity is

σ = qμnND

where q is the elementary charge. Resistivity is ρ = 1/σ. Resistance is R = ρL/A, so resistance multiplied by active area is

Ron,sp = RA = L/(qμnND)

Thus Ron,sp has units of Ω·m² or Ω·cm². It is proportional to drift thickness—not thickness squared—for fixed doping and mobility.

For an ideal one-sided abrupt junction with a uniform drift doping, the maximum field has a triangular profile at breakdown. Under the depletion approximation,

VB = EcL/2

and Poisson's equation gives

Ec = qNDL/εs

where VB is breakdown voltage in volts and εs is semiconductor permittivity in F·m⁻¹. Eliminating L and ND gives

L = 2VB/Ec
ND = εsEc2/(2qVB)

and therefore

Ron,sp = 4VB2/(εsμnEc3)

This ideal constant-mobility result has VB2 scaling. It is commonly called the ideal unipolar drift-region limit. It is not a complete device model: field-dependent mobility, incomplete ionization, junction curvature, termination structures, substrate resistance, channel resistance and reliability margins increase practical resistance.

Ideal drift-region electric-field profile E_c L x E(x) Area = V_B Uniformly doped depleted drift region
Ideal triangular electric-field profile in a uniformly doped drift region
Figure: Ideal triangular electric-field profile in a uniformly doped drift region

Figure: The breakdown voltage equals the area under the ideal triangular electric-field profile.

Worked Example 1: Ideal 4H-SiC drift region

Estimate the drift-region doping, thickness and specific on-resistance for an ideal 1,200 V 4H-SiC device. Use Ec = 2.5 × 108 V·m-1, εs = 9.7ε0, ε0 = 8.854 × 10-12 F·m-1 and μn = 0.090 m2·V-1·s-1.

First,

L = 2(1200)/(2.5 × 108) = 9.60 × 10-6 m = 9.60 μm

The permittivity is εs = 8.588 × 10-11 F·m-1. Therefore,

ND = (8.588 × 10-11)(2.5 × 108)2/[2(1.602 × 10-19)(1200)]
= 1.40 × 1022 m-3 = 1.40 × 1016 cm-3

Finally,

Ron,sp = L/(qμnND) = 4.77 × 10-8 Ω·m2

Since 1 Ω·m2 = 107 mΩ·cm2,

Ron,sp = 0.477 mΩ·cm2

This value is an ideal drift-only limit. A manufactured MOSFET will have additional channel, accumulation-layer, substrate, contact and package resistance.

2.2 Silicon carbide

4H-SiC is the dominant SiC polytype for power electronics. It combines a high critical field, useful electron mobility and high thermal conductivity. Commercial devices include Schottky barrier diodes and MOSFETs for electric vehicles, solar inverters, industrial drives and power supplies.

SiC can form silicon dioxide, permitting MOS-gated structures. However, the SiO₂/SiC interface contains traps that reduce channel mobility and can cause threshold-voltage instability. Basal-plane dislocations, stacking faults and oxide reliability require careful control. High-quality SiC substrates are also more difficult and expensive to grow and machine than silicon wafers.

SiC is particularly attractive for vertical devices above several hundred volts because current flows through the wafer thickness, allowing large active areas and efficient voltage blocking.

2.3 Gallium nitride

GaN is a direct-bandgap III–V semiconductor. Most commercial power GaN devices use an AlGaN/GaN heterostructure. Polarization discontinuities create a high-density two-dimensional electron gas (2DEG) without conventional channel doping. This channel combines low sheet resistance with high carrier velocity.

Lateral GaN high-electron-mobility transistors (HEMTs) offer low capacitance and rapid switching. They are widely used in compact power supplies, radio-frequency amplifiers and lower-to-medium-voltage converters. Switching at high frequency can reduce passive-component size, but only when gate-drive design, electromagnetic interference and package inductance are controlled.

Important challenges include dynamic on-resistance caused by charge trapping, current collapse, gate reliability, electric-field crowding and heat removal. GaN-on-silicon provides large wafers and lower cost but introduces lattice and thermal-expansion mismatch. GaN-on-SiC offers improved thermal and RF performance at greater substrate cost. Native bulk GaN supports vertical architectures but remains comparatively expensive and size-limited.

2.4 Diamond

Diamond has an ultrawide bandgap, very high thermal conductivity, high carrier mobilities and a potentially exceptional breakdown field. These properties suggest extremely low drift resistance and high-temperature operation. Diamond can also function as a heat spreader for other semiconductor devices.

Practical diamond electronics remain limited by wafer size, defect control, doping and contacts. Boron produces useful p-type conduction, but reliable shallow n-type doping is difficult. Large-area single-crystal growth is costly, and forming stable low-resistance contacts is challenging. Consequently, diamond's near-term impact may be greater in thermal management, radiation detection and specialized devices than in mainstream switching transistors.

2.5 Material selection for power and RF devices

No single material dominates every application:

  • SiC: strong choice for vertical, high-voltage and high-temperature power devices.
  • GaN: strong choice for high-frequency switching, lateral RF devices and compact converters.
  • Diamond: exceptional theoretical capability but immature electronic integration.
  • Silicon: remains preferable where cost, manufacturing maturity and adequate performance dominate.

A proper comparison must consider total converter loss rather than on-resistance alone. Switching energy, reverse recovery, output capacitance, gate-drive loss and parasitic inductance can dominate at high frequency.

3. Two-Dimensional Electronic Materials

A 2D material consists of strongly bonded atomic planes coupled to adjacent planes primarily through van der Waals interactions. An isolated monolayer can be less than one nanometre thick. This geometry offers excellent electrostatic gate control but makes electronic behaviour highly sensitive to interfaces and contamination.

3.1 Graphene

Graphene is a single layer of carbon atoms in a honeycomb lattice. Near its charge-neutrality points, the energy–wave-vector relation is approximately linear:

E(k) = ±ℏvF|k|

where ℏ is the reduced Planck constant, vF is graphene's Fermi velocity, approximately 106 m·s-1, and k is wave vector relative to a Dirac point.

Graphene possesses high mobility, mechanical strength, optical transparency and thermal conductivity. It is promising for RF electronics, chemical and biological sensors, transparent conductors, flexible systems and interconnects.

Its principal limitation for digital logic is the absence of a substantial intrinsic bandgap. A graphene transistor therefore cannot easily achieve the low off-state current required by conventional complementary logic. Nanoribbon confinement, bilayer electric fields and chemical modification can open a gap, but frequently degrade mobility or produce nonuniformity.

3.2 Transition-metal dichalcogenides

Layered TMDs have the general formula MX2, where M is commonly Mo or W and X is S, Se or Te. Examples include MoS₂, WS₂, MoSe₂ and WSe₂. Many semiconducting TMD monolayers have bandgaps in the visible-to-near-infrared energy range and can provide much larger transistor on/off ratios than graphene.

Monolayer MoS₂ changes from an indirect-gap material in bulk form to a direct-gap semiconductor. Atomically thin channels suppress short-channel electrostatic degradation and permit flexible devices. Different TMDs offer n-type, p-type or ambipolar behaviour depending on contacts, defects and electrostatic environment.

Limitations include lower mobility than ideal graphene, contact resistance, sulfur or selenium vacancies, environmental sensitivity, dielectric-induced disorder and difficulty producing uniform wafer-scale monolayers.

3.3 Contacts and interfaces

The resistance of a 2D transistor is often dominated by its metal contacts. Fermi-level pinning, Schottky barriers and contamination can prevent efficient carrier injection. Reported field-effect mobility also depends strongly on contact correction and device geometry.

Conventional oxide deposition may damage or poorly nucleate on dangling-bond-free surfaces. Hexagonal boron nitride provides a clean layered dielectric and encapsulant in research devices, while industrial integration requires scalable dielectric deposition and alignment processes.

3.4 Flexible electronics

Atomically thin materials can tolerate bending because strain remains small when thickness is low. For a thin layer bent to radius R, the approximate maximum surface strain is

εbend ≈ t/(2R)

where t is total bent-stack thickness. This relation assumes pure bending, small strain and a neutral plane near the stack mid-thickness. Encapsulation and substrate layers must be included when determining the actual neutral plane.

Flexible applications include wearable sensors, electronic skin, foldable displays and conformal antennas. Mechanical flexibility does not eliminate reliability problems: repeated cycling can crack conductors, delaminate interfaces or alter contact resistance.

4. Nanostructures and Low-Dimensional Transport

4.1 Dimensionality

Electronic confinement produces several structure classes:

StructureConfined dimensionsFree dimensionsExample
Quantum well12Semiconductor heterostructure channel
Nanowire or nanotube21Si nanowire, carbon nanotube
Quantum dot30Colloidal or epitaxial nanocrystal

Reducing dimensionality changes the density of electronic states and may create discrete energy levels.

4.2 Quantum confinement

For an electron in an ideal one-dimensional infinite potential well of width L, the allowed energies are

En = n2π2ℏ2/(2m^*L2), n = 1, 2, 3, …

where m^* is effective mass. This idealized formula assumes parabolic bands, infinitely high barriers and a uniform effective mass. Real nanostructures require finite-barrier, multiband or atomistic models.

Because energy spacing scales as 1/L2, smaller structures exhibit stronger confinement. Quantum-dot emission can therefore be tuned through particle size, enabling displays, photodetectors and biomedical labels.

Worked Example 2: Confinement energy

Estimate the ground-state confinement energy of an electron with m^* = 0.20m0 in a 5.0 nm infinite well. Use m0 = 9.109 × 10-31 kg and ℏ = 1.055 × 10-34 J·s.

E1 = π2(1.055 × 10-34)2/[2(0.20)(9.109 × 10-31)(5.0 × 10-9)2]
= 1.21 × 10-20 J

Dividing by q = 1.602 × 10-19 C gives

E1 = 0.075 eV

The result is an approximate single-direction confinement energy, not necessarily the full optical bandgap shift.

4.3 Ballistic and diffusive transport

When channel length is shorter than the relevant scattering mean free path, transport becomes partly ballistic. For a phase-coherent conductor with spin-degenerate channels, the Landauer conductance is

G = (2q2/h)∑n Tn

where h is Planck's constant and Tn is the transmission probability of mode n. The formula highlights that nanoscale conductance depends on available modes and contact transmission, not only bulk resistivity.

In longer channels, phonon, impurity, defect and surface scattering produce diffusive transport. Many practical nanoscale devices lie between ideal ballistic and fully diffusive limits.

4.4 Single-electron effects

A sufficiently small island has charging energy

EC = q2/(2C)

where C is total island capacitance. Coulomb blockade becomes observable when EC substantially exceeds thermal energy kBT and tunnel-junction resistances are sufficiently high to preserve charge quantization. These requirements make room-temperature single-electron electronics difficult but not impossible for extremely small capacitances.

4.5 Nanostructure applications

Nanowires provide gate-all-around electrostatics, chemical sensitivity and potential heterogeneous integration. Carbon nanotubes can offer high carrier velocity and thin-body control, but chirality sorting, placement and metallic-tube removal remain manufacturing challenges. Quantum dots enable tunable optoelectronic response, while nanoporous and nanocomposite materials support sensing, energy storage and thermal-interface applications.

5. Fabrication and Integration

5.1 Growth methods

SiC bulk crystals are commonly produced by high-temperature sublimation-based growth, followed by epitaxial deposition. GaN is frequently grown by metal-organic chemical vapour deposition or molecular-beam epitaxy on foreign substrates. Diamond films are commonly produced by chemical vapour deposition using activated carbon-containing gases.

Graphene can be mechanically exfoliated for research, grown by chemical vapour deposition on catalytic metals, or formed epitaxially on SiC. TMDs may be exfoliated, grown directly by vapour methods or assembled through layer transfer.

Growth must control thickness, stoichiometry, grain boundaries, dislocations, impurities and surface roughness. A process yielding excellent microscopic flakes is not automatically scalable to uniform wafers.

5.2 Patterning and transfer

Lithography and plasma etching can introduce edge damage, vacancies and contamination into atomically thin materials. Transfer from a growth substrate may leave polymer residue, wrinkles, tears and trapped moisture. Direct growth on the target wafer avoids transfer damage but may exceed the thermal budget of existing CMOS circuitry.

Monolithic three-dimensional integration requires especially low process temperatures because completed lower layers contain metals and dielectrics that cannot tolerate conventional high-temperature epitaxy.

5.3 Defects and variability

Defects can be beneficial or harmful. Controlled dopants set carrier density, but vacancies and dislocations may act as traps, scattering centres or leakage paths. In nanoscale devices, a small number of defects can produce substantial device-to-device variation. Statistical process control must therefore measure distributions rather than only average properties.

5.4 Packaging and parasitics

Fast wide-bandgap switches generate large dv/dt and di/dt. Stray inductance causes voltage overshoot approximately according to

VL = Ls(di/dt)

where Ls is parasitic inductance. Compact layouts, Kelvin-source connections, suitable gate resistance and low-inductance modules are essential. Thermal-expansion mismatch, solder fatigue and insulation ageing must also be considered.

For RF devices, package capacitance and interconnect inductance may erase intrinsic transistor advantages. Material, device and package must therefore be co-designed.

6. Applied Case: SiC Conversion Stage for an Electric Vehicle

This is an illustrative case.

Background

An engineering team is redesigning a traction-inverter operating point that delivers 40 kW of electrical output to a motor. The existing silicon-based stage operates at 95.0% efficiency. The proposed SiC design is estimated to achieve 97.5% efficiency at the same output, after including semiconductor, magnetic and gate-drive losses.

Problem

The team must quantify heat-load reduction and determine whether changing semiconductor technology alone is sufficient.

Analysis

Efficiency is defined as

η = Pout/Pin

For the existing inverter, the specified 40 kW is output power:

Pin,Si = 40/0.950 = 42.105 kW
Ploss,Si = 42.105 − 40 = 2.105 kW

For the proposed SiC inverter:

Pin,SiC = 40/0.975 = 41.026 kW
Ploss,SiC = 41.026 − 40 = 1.026 kW

The estimated heat reduction is 2.105 − 1.026 = 1.079 kW, or approximately 51.3% of the original loss.

Approach and solution

The team should not select the SiC device solely from its rated current and voltage. It must evaluate conduction loss over the drive cycle, switching energy versus temperature, short-circuit withstand time, gate-oxide reliability, electromagnetic compatibility, cooling-system mass and module inductance. A low-inductance package and optimized gate driver are adopted to limit overshoot and unintended switching.

Outcome

If the projected efficiency is achieved, cooling demand falls substantially, potentially reducing heat-sink size and improving vehicle range. The economic decision still depends on device and module cost, production yield, reliability qualification and system-level savings.

Learning points

  1. Efficiency comparisons must state whether power is input or output.
  2. Reduced semiconductor loss can create secondary benefits in cooling and packaging.
  3. Fast devices require parasitic-aware circuit design.
  4. System-level optimization is more meaningful than comparison of isolated material properties.

7. Reliability, Sustainability and Governance

Wide-bandgap and nanoelectronic devices require application-specific qualification. Relevant stresses include high-temperature reverse bias, gate bias, power cycling, humidity, radiation and repetitive avalanche. Accelerated tests must reproduce credible failure mechanisms; extrapolation is unreliable when a test activates a different mechanism from normal operation.

Supply chains also matter. Gallium is commonly obtained as a by-product of other metal processing, while high-purity precursor gases may be hazardous. Fabrication can consume substantial energy and water. Nanoparticle release requires exposure controls because biological effects may depend on particle size, shape and surface chemistry rather than bulk composition alone.

Responsible engineering practices include life-cycle assessment, worker protection, traceable sourcing, design for repair or recycling, transparent reliability data and compliance with chemical and electronic-waste regulations. Claims about superior sustainability should include manufacturing impacts, lifetime and system-level energy savings.

8. Contemporary Directions and Engineering Best Practice

Research is moving toward vertical GaN, larger high-quality substrates, improved SiC gate interfaces, diamond heat spreaders, van der Waals heterostructures and heterogeneous chiplet integration. Twisted 2D layers permit tunable electronic states, while 2D semiconductors are being investigated for back-end-compatible transistors and sensors.

Machine learning is increasingly used to screen material compositions, interpret microscopy, optimize deposition parameters and detect process drift. Such models require physically meaningful inputs, representative data and independent validation; correlation alone does not establish a reliable process window.

Best practice is to:

  • translate material properties into device- and system-level metrics;
  • state assumptions behind ideal performance limits;
  • characterize interfaces and contacts, not only bulk crystals;
  • measure variability and degradation over realistic operating cycles;
  • co-design devices, drivers, packages and cooling systems;
  • compare total cost, reliability and environmental impact.

Chapter Summary

Wide-bandgap materials extend power and RF electronics beyond conventional silicon limits. SiC combines high critical field and thermal conductivity for high-voltage vertical devices. GaN heterostructures provide high-density channels suited to rapid switching and RF amplification. Diamond offers extraordinary theoretical electrical and thermal performance but remains constrained by doping, contacts and wafer technology.

For an ideal uniformly doped unipolar drift region, specific on-resistance is Ron,sp = L/(qμnND). Under a one-sided abrupt-junction depletion model with constant mobility, optimization at the critical field gives Ron,sp = 4VB2/(εsμnEc3). Real devices depart from this ideal because of interfaces, geometry, mobility variation and parasitic resistances.

Graphene offers exceptional transport, flexibility and thermal properties but lacks the intrinsic bandgap required for conventional digital switching. Semiconducting TMDs provide atomically thin channels and useful bandgaps, although contacts, defects and wafer-scale growth remain difficult. Nanostructures exhibit quantum confinement, altered density of states, ballistic transport and single-electron effects. Across all these technologies, fabrication yield, integration, packaging, reliability, sustainability and cost are as important as intrinsic material properties.

Key Terms

Wide-bandgap semiconductor: Semiconductor with a substantially larger bandgap than silicon, enabling low intrinsic carrier concentration and high-field operation.

Critical electric field: Electric field at which significant avalanche breakdown occurs under specified conditions.

Specific on-resistance: Device on-resistance multiplied by active area, usually expressed in Ω·cm².

Drift region: Lightly doped device region designed to support off-state voltage.

Unipolar device: Device whose principal conduction involves one carrier type.

4H-SiC: Hexagonal silicon-carbide polytype widely used in power electronics.

HEMT: High-electron-mobility transistor based on a semiconductor heterostructure.

Two-dimensional electron gas: Confined sheet of mobile electrons formed at an interface or heterojunction.

Graphene: Single honeycomb layer of carbon atoms with approximately linear low-energy dispersion.

Transition-metal dichalcogenide: Layered compound of general formula MX₂, many examples of which are semiconducting.

Van der Waals heterostructure: Stack of atomically thin materials held together mainly by van der Waals forces.

Quantum confinement: Modification of electronic energy states when dimensions approach carrier wavelengths.

Quantum dot: Nanostructure that confines carriers in all three spatial dimensions.

Ballistic transport: Carrier motion through a region with little or no scattering.

Coulomb blockade: Suppression of electron transfer caused by the charging energy of a small island.

Contact resistance: Resistance associated with carrier injection between a conductor and semiconductor.

Dynamic on-resistance: Temporary increase in on-resistance, commonly associated with trapped charge.

Thermal resistance: Ratio of temperature rise to dissipated power under defined boundary conditions.

Heterogeneous integration: Integration of components made from different materials or processes in one system.

Review Questions

Short Answer Questions

  1. Why does a wide bandgap support higher-temperature operation?
  2. Distinguish bulk carrier mobility from effective device mobility.
  3. Why is graphene unsuitable for conventional digital logic without bandgap engineering?
  4. What physical mechanism creates the 2DEG in an AlGaN/GaN heterostructure?
  5. Define quantum confinement and identify when it becomes important.

Long Answer Questions

  1. Compare SiC, GaN and diamond with respect to power-device performance, fabrication maturity and principal limitations.
  2. Derive the ideal unipolar drift-region specific on-resistance from the depletion approximation, stating every assumption.
  3. Discuss the properties, applications and integration problems of graphene and semiconducting TMDs.
  4. Explain ballistic transport, quantum confinement and Coulomb blockade, including their applicability conditions.
  5. Evaluate how contacts, packaging, defects and thermal management can prevent a high-performance material from producing a high-performance system.

Analytical / Application Questions

  1. A converter delivers 40 kW output at 95% efficiency. Calculate its input power and total loss. If efficiency increases to 98%, calculate the new loss and percentage loss reduction.
  2. For an ideal 4H-SiC drift region, use VB = 600 V, Ec = 2.5 × 108 V·m-1, εs = 9.7ε0 and μn = 0.090 m2·V-1·s-1 to determine thickness, donor concentration and specific on-resistance.
  3. Select a material platform for each of the following and justify each choice: a 1,200 V traction inverter, a millimetre-wave amplifier, a transparent strain sensor and an atomically thin digital transistor.

Multiple Choice Questions with Answers

Question 1

For a uniformly doped drift region of thickness L, what is its drift-only specific on-resistance under low-field conduction?

A. L/(qμnND)

B. L2/(qμnND)

C. qμnND/L

D. 1/(qμnNDL2)

Correct Answer: A. L/(qμnND)

Question 2

Under the ideal one-sided abrupt-junction model with constant mobility, how does optimized drift-region specific on-resistance scale with breakdown voltage?

A. VB1/2

B. VB

C. VB2

D. VB3

Correct Answer: C. VB2

Question 3

Which material is most established for vertical 1,200 V power MOSFETs?

A. Graphene

B. 4H-SiC

C. Monolayer MoS₂

D. Diamond

Correct Answer: B. 4H-SiC

Question 4

What is the principal limitation of pristine graphene for conventional digital logic?

A. It has no substantial intrinsic bandgap

B. It cannot conduct electrons

C. It is mechanically inflexible

D. It has extremely low thermal conductivity

Correct Answer: A. It has no substantial intrinsic bandgap

Question 5

Which property makes semiconducting TMD monolayers attractive compared with graphene for switching transistors?

A. They always have zero contact resistance

B. They possess useful semiconductor bandgaps

C. They are bulk three-dimensional metals

D. They require no gate dielectric

Correct Answer: B. They possess useful semiconductor bandgaps

Question 6

Which issue most directly limits diamond's use in mainstream electronic switching devices?

A. An excessively narrow bandgap

B. Poor thermal conductivity

C. Difficulty achieving practical doping, contacts and large wafers

D. Inability to support high electric fields

Correct Answer: C. Difficulty achieving practical doping, contacts and large wafers

Question 7

A 5 nH parasitic inductance carries a current changing at 2 × 109 A·s-1. What inductive voltage is produced?

A. 0.4 V

B. 2.5 V

C. 10 V

D. 400 V

Correct Answer: C. 10 V

Question 8

Which nanostructure confines carriers in all three spatial dimensions?

A. Quantum well

B. Nanowire

C. Two-dimensional electron gas

D. Quantum dot

Correct Answer: D. Quantum dot

Question 9

A converter delivers 40 kW output at 95% efficiency. Approximately how much power does it lose?

A. 1.00 kW

B. 2.11 kW

C. 5.00 kW

D. 8.00 kW

Correct Answer: B. 2.11 kW

Question 10

According to the ideal infinite-well model, how does confinement energy change when well width is halved?

A. It falls to one-quarter

B. It falls to one-half

C. It doubles

D. It increases by a factor of four

Correct Answer: D. It increases by a factor of four

Electrical Engineering Materials
Chapter 8 of 15