1. Digital Systems, Number Representations and Codes

Introduction and Context

Digital electronics is concerned with the representation, manipulation, storage, and transmission of information using discrete signal states. Although physical voltages and currents are continuous quantities, a digital system interprets selected ranges of these quantities as symbolic values, usually 0 and 1. This abstraction enables electronic circuits to perform reliable computation despite noise, component variation, and imperfect physical conditions.

The foundations developed in this chapter support almost every later topic in digital electronics. Logic gates, combinational and sequential circuits, processors, memories, communication interfaces, embedded systems, and digital control systems all depend on binary variables and systematic methods for representing information. A designer must therefore understand not only how to convert numbers between bases, but also why particular representations are selected, how arithmetic behaves within finite word lengths, and how codes control ambiguity and errors.

A digital representation is never the information itself. It is a convention for associating physical or symbolic patterns with meanings. The same bit pattern may represent an unsigned integer, a signed integer, a character, an instruction, a sensor value, or part of a coded message. Interpretation depends on the system specification.

Learning Objectives

After studying this chapter, the reader should be able to:

1. Explain the digital abstraction and distinguish analog quantities from digital representations.

2. Describe binary logic, logic levels, Boolean variables, and the role of noise margins.

3. Convert numbers among decimal, binary, octal, and hexadecimal systems.

4. Perform arithmetic using unsigned, signed, fixed-point, and complement representations.

5. Identify overflow, underflow, truncation, quantization, and sign-extension effects.

6. Compare weighted, non-weighted, alphanumeric, Gray, and parity-based codes.

7. Explain the principles of error detection and correction, including Hamming distance and Hamming codes.

8. Select appropriate representations for practical digital-system applications.

The Digital Abstraction: From Physical Signal to Logical Value

An analog signal can assume a continuous range of values. A digital circuit, in contrast, assigns a finite set of logical values to ranges of physical signal levels. In binary logic, the two logical values are conventionally called LOW and HIGH, or 0 and 1. The actual voltage corresponding to either value depends on the technology and interface specification; logical 1 is not universally equal to a particular voltage.

The abstraction is useful because a receiver does not need to distinguish every voltage. It only needs to determine whether a signal lies within an accepted LOW or HIGH region. Between these regions may be an indeterminate range. This separation creates noise immunity: moderate disturbances may alter the physical voltage without altering the interpreted logical value. The difference between the maximum input voltage guaranteed to be LOW and the maximum output voltage guaranteed to be LOW is one form of low-level noise margin; the corresponding difference at the HIGH level gives high-level noise margin.

Digital abstraction is therefore a design trade-off. It sacrifices some precision in the physical signal so that the system gains repeatability, restoration, ease of storage, and resistance to accumulated noise. Logic gates regenerate signals, so a degraded but valid input can produce a clean output. Nevertheless, digital systems are not immune to physical effects. Timing violations, metastability, electromagnetic interference, power-supply variation, and incorrect voltage interfacing can cause logical failure.

A binary variable has two possible states, but a binary word may contain any number of bits. An n-bit word has 2^n distinct patterns. If all patterns represent unsigned values, the range is 0 through 2^n − 1. If patterns represent symbols or control states, the available meanings may be assigned in another way.

Binary Logic and Boolean Variables

Boolean algebra provides the mathematical language of digital logic. A Boolean variable takes one of two values, 0 or 1. The principal operations are AND, OR, and NOT. For variables A and B, A AND B is 1 only when both inputs are 1; A OR B is 1 when at least one input is 1; and NOT A reverses the value of A.

The corresponding identities are:

• A + 0 = A and A · 1 = A
• A + 1 = 1 and A · 0 = 0
• A + A = A and A · A = A
• A + A' = 1 and A · A' = 0
• (A + B)' = A'B'
• (AB)' = A' + B'

Here, + denotes OR, juxtaposition denotes AND, and the prime denotes complementation. The final two relationships are De Morgan’s laws. They are especially important when a circuit must be implemented using NAND or NOR gates, both of which are functionally complete: either gate type alone can realize any Boolean function.

A truth table lists the output for every input combination. For n independent binary inputs, it contains 2^n rows. Truth tables are valuable for specification and verification, while Boolean expressions and logic diagrams are useful for implementation. At postgraduate level, it is important to recognize that these are different descriptions of the same combinational relationship.

The meaning of a bit pattern depends on context. For example, 1001 may mean decimal 9 as an unsigned binary number, −7 in a four-bit two’s-complement system, the decimal digit 9 in a BCD field, or a control symbol in a communication protocol. Correct interpretation is consequently a system-level responsibility, not a property of the bits alone.

Positional Number Systems

A radix or base-r positional number system uses r symbols, normally 0 through r − 1. The value of a string of digits is the weighted sum of its digits:

N = d_m r^m + d_(m−1) r^(m−1) + ... + d_1 r + d_0 + d_(−1)r^(−1) + ...

In decimal, r = 10. Binary uses r = 2 and the digits 0 and 1. Octal uses r = 8, while hexadecimal uses r = 16 and the symbols A through F for decimal values 10 through 15.

For example,

(101101.101)_2 = 1(2^5) + 0(2^4) + 1(2^3) + 1(2^2) + 0(2^1) + 1(2^0) + 1(2^−1) + 0(2^−2) + 1(2^−3)

= (45.625)_10.

Binary-to-hexadecimal conversion is particularly convenient because each hexadecimal digit corresponds exactly to four binary bits. Thus, 1101 0110 1011₂ is D6B₁₆. Each octal digit corresponds to three bits, so octal remains useful in contexts where groups of three bits are natural.

Decimal integers can be converted to binary by repeated division by 2, recording remainders from least significant to most significant. Decimal fractions can be converted by repeated multiplication by 2, recording the integer part at each step. Some decimal fractions, such as 0.1, have no finite binary representation. A practical system must then select an approximation, introducing representation error.

Unsigned Arithmetic and Finite Word Length

For an n-bit unsigned representation, the least significant bit (LSB) has weight 2^0 and the most significant bit (MSB) has weight 2^(n−1). Addition follows the same carry rules as decimal addition. However, a fixed-width result retains only n bits. A carry beyond the MSB is discarded in ordinary modular unsigned arithmetic, although it may be recorded as a carry flag.

The range of an n-bit unsigned number is:

0 ≤ N ≤ 2^n − 1.

If an operation produces a value above this range, unsigned overflow occurs. For example, in eight bits, 250 + 10 mathematically equals 260, but the stored eight-bit result is 4, with a carry out of the most significant position. Whether this is an error depends on the application. Modular arithmetic is intentional in counters and address calculations, but dangerous in financial, measurement, or control computations.

Subtraction may be implemented by adding a complement, avoiding a separate subtractor. This illustrates a broader engineering principle: an appropriate representation can simplify hardware by converting several operations into one common operation.

Signed Representations and Complements

Signed-magnitude representation uses the MSB as a sign bit and the remaining bits for magnitude. In an eight-bit signed-magnitude system, 00000101 represents +5 and 10000101 represents −5. It has two representations of zero, +0 and −0, and arithmetic circuits require special treatment of signs and magnitudes.

One’s complement is formed by inverting every bit. For eight bits, +5 is 00000101 and −5 is 11111010. One’s complement also has two zeros. Addition requires end-around carry: a carry out of the MSB is added to the LSB.

Two’s complement is obtained by inverting all bits and adding 1. In eight bits, −5 is 11111011. Its range is asymmetric:

−2^(n−1) ≤ N ≤ 2^(n−1) − 1.

Thus, eight-bit two’s complement represents −128 through +127. Two’s complement is widely used because addition and subtraction use the same binary adder, zero has only one representation, and sign extension is straightforward. To sign-extend a two’s-complement value, replicate its sign bit into the newly added high-order positions. Zero-extension is appropriate only for non-negative unsigned values or when the type is explicitly unsigned.

For two’s-complement addition, overflow occurs when two operands with the same sign produce a result with the opposite sign. A carry out of the MSB alone does not define signed overflow. For example, adding two positive eight-bit values that produces a negative result indicates overflow, while adding a positive and a negative value cannot produce signed overflow.

Fixed-Point Representation

Fixed-point notation assigns a fixed position to the binary point. A word may contain an integer field and a fractional field. If four bits are assigned to the integer part and four to the fractional part, the weights may be 2^3, 2^2, 2^1, 2^0, 2^−1, 2^−2, 2^−3, and 2^−4. The resolution is 2^−4 = 0.0625, while the range depends on whether the representation is signed and on the number of integer bits.

Fixed-point arithmetic is attractive in embedded control, digital signal processing, and low-power systems because it requires less hardware and often has predictable execution time compared with floating-point arithmetic. The designer must allocate bits among range, resolution, and sign. Multiplication changes the position of the binary point: multiplying two Q-format values produces a result with the sum of their fractional-bit counts, normally followed by scaling or rounding.

Truncation simply removes low-order bits, whereas rounding adds information about the discarded portion and usually reduces average error. Saturation clamps an out-of-range result to the largest or smallest representable value. In control systems, saturation may be safer than modular wraparound, which can transform a slightly excessive positive command into a large negative command.

Quantization is the mapping of a continuous or higher-precision value to one of a finite set of codes. It introduces quantization error, generally bounded by approximately half a least-significant step under round-to-nearest operation. Representation choices must therefore be evaluated against sensor accuracy, dynamic range, computational cost, and system safety.

Codes: Representation Beyond Ordinary Numbers

A code is a prescribed assignment of bit patterns to information symbols or states. Codes may be weighted, non-weighted, character-oriented, positional, sequential, or designed specifically for error control.

Binary-Coded Decimal

In 8421 BCD, each decimal digit is represented independently by four bits. Decimal 59 is represented as 0101 1001, not as the binary representation of decimal 59, which is 0011 1011. BCD simplifies decimal display and decimal financial processing, but six of the sixteen four-bit combinations are invalid. Arithmetic requires correction when a digit exceeds 9 or when a carry is generated.

Gray Code

Gray code is a non-weighted code in which adjacent code words differ in exactly one bit. This property reduces ambiguity when a mechanical or optical position sensor moves between adjacent states. In a binary counter, several bits may change simultaneously; unequal propagation delays can produce transient incorrect values. A Gray-coded encoder avoids multiple simultaneous transitions at adjacent positions. Gray code is not normally used for arithmetic because its numerical weights are not direct powers of two.

Character and Instruction Codes

Alphanumeric codes associate bit patterns with letters, digits, punctuation, or control functions. ASCII uses seven information bits, commonly stored in an eight-bit unit, while Unicode provides a much larger abstract character repertoire through several encoding formats. In a processor, bit patterns may instead encode operation codes, register fields, addressing modes, and immediate operands. The essential point is that a codebook defines interpretation; an isolated pattern has no universal meaning.

One-Hot and Application-Specific Codes

In a one-hot code, exactly one bit is asserted for each state. Such coding can simplify state decoding and improve fault detection, at the cost of using more storage bits. Application-specific codes are selected according to transition behavior, decoding complexity, power consumption, security, or fault tolerance rather than numerical convenience.

Error Detection and Error Correction

Communication and storage systems are exposed to noise, interference, defects, timing uncertainty, and radiation. An error occurs when the received or retrieved pattern differs from the transmitted or intended pattern. Coding techniques add redundancy so that some errors can be detected or corrected.

The Hamming distance between two code words is the number of bit positions in which they differ. The minimum distance d_min of a code is the smallest distance between any two valid code words. A code with minimum distance d_min can detect up to d_min − 1 errors and can correct up to floor((d_min − 1)/2) errors. These limits express capability, not guaranteed performance when assumptions are violated.

A parity bit provides a simple example. For even parity, the parity bit is selected so that the total number of 1s is even. A single-bit error changes parity and is detected. However, an even number of bit errors may leave parity unchanged, so parity alone cannot locate or correct an error.

Two-dimensional parity places parity checks across rows and columns. A single erroneous bit can often be located at the intersection of the erroneous row and column. More advanced block codes and cyclic redundancy checks (CRCs) use algebraic structures to detect burst errors efficiently. A CRC appends a remainder obtained by polynomial division over GF(2). It is widely used in data links and storage interfaces, but normally detects errors rather than correcting them.

Hamming codes place parity bits at positions numbered by powers of two. Each parity bit checks a selected set of positions, and the collection of failed parity checks forms a syndrome. For a standard Hamming code with minimum distance three, a single-bit error can be corrected. An extended Hamming code adds an overall parity bit and can provide single-error correction and double-error detection under the usual assumptions.

The selection of an error-control scheme involves a trade-off among redundancy, latency, decoding complexity, power, and the expected error model. A wireless link with frequent burst interference may require interleaving and a powerful forward-error-correction code, whereas a short control word on a reliable board may need only parity or a CRC.

A Representation-Selection Framework

A competent digital designer does not select a representation merely because it is familiar. The following questions provide a useful framework:

1. What meanings must the bit pattern represent—number, symbol, state, instruction, or measurement?

2. What range and resolution are required?

3. Are negative values possible, and is saturation preferable to wraparound?

4. How frequently will arithmetic, comparison, conversion, or display be performed?

5. What error patterns are likely: isolated bit errors, bursts, synchronization errors, or invalid states?

6. What are the constraints on hardware area, power, timing, storage, and verification?

7. How will interfaces document byte order, bit order, signedness, scaling, and invalid codes?

This framework prevents a common systems error: treating representation as an implementation detail. Representation affects algorithms, interfaces, testing, safety, and long-term interoperability.

Applied Case Study: Reliable Temperature Acquisition in an Embedded Controller

Background

Consider an illustrative industrial controller that measures temperature from a sensor, transmits the measurement over a noisy field bus, and regulates a heating process. The controller must represent temperatures from −40 °C to 125 °C with a resolution of 0.1 °C.

Situation and Problem

An initial design stores the sensor reading as an eight-bit unsigned integer in degrees Celsius. Negative temperatures cannot be represented, and the resolution is only 1 °C. In addition, raw messages contain no error-detection field. During electrical interference, a changed bit may cause the heater command to increase unexpectedly.

Analysis

The required span is 165 °C, and a 0.1 °C resolution requires 1650 distinguishable steps. Eleven unsigned bits provide 2048 levels, but a signed scaled representation is more natural. Define the stored integer x by:

x = (T + 40) / 0.1,

where T is temperature in degrees Celsius. The range maps to 0 through 1650. A 16-bit unsigned field is sufficient and leaves unused codes for diagnostics. Alternatively, a signed fixed-point format may represent temperature directly in tenths of a degree, with −400 to +1250 as valid values.

The interface specification must state byte order, scaling, valid range, and treatment of unused codes. A CRC should be appended to each message to detect common transmission errors. If a corrupted message is detected, the controller should reject it and apply a safe fallback rather than use the corrupted value. If the heating system is safety-critical, range checks and plausibility checks should supplement the CRC, because a validly transmitted but faulty sensor reading is not a communication error.

Approach and Solution

The revised design uses a 16-bit signed fixed-point temperature in tenths of a degree, a CRC for frame integrity, and explicit range validation. Arithmetic is performed with additional internal width to prevent overflow during filtering. Output commands use saturation rather than wraparound. Test cases include boundary values, sign transitions near 0 °C, corrupted single-bit and burst patterns, and maximum heating demand.

Outcome

The representation supports the required range and resolution, while the CRC detects transmission corruption. Validation and saturation reduce the consequences of sensor and arithmetic faults. The design also becomes easier to document because the physical meaning of each stored integer is explicit.

Learning Points

The case demonstrates that number representation, coding, arithmetic width, and safety behavior must be designed together. Error detection cannot replace range validation, and numerical precision cannot compensate for an ambiguous interface specification.

Common Mistakes, Limitations, and Professional Considerations

Several errors recur in digital-system design. Confusing a binary number with a BCD field leads to incorrect conversions. Treating a carry out as signed overflow produces false diagnostic decisions. Zero-extending a negative two’s-complement value changes its meaning. Ignoring fractional scaling causes apparently correct integer arithmetic to produce incorrect physical values. Assuming that parity detects all errors is also unsafe; some multiple-bit errors are invisible to a single parity check.

Finite representations impose unavoidable limits. More bits increase storage, wiring, power, and processing requirements. Error-correcting redundancy reduces usable data rate and adds decoder latency. Gray coding reduces transition ambiguity but does not itself provide arithmetic convenience or complete error detection. CRCs are strong for many error patterns but depend on the selected polynomial and frame assumptions.

Professional practice requires precise interface documentation. Specifications should define signedness, bit numbering, byte order, scaling, valid and reserved patterns, rounding mode, overflow behavior, and error response. In safety-related systems, representation decisions should be traceable to requirements and verified with boundary-value, fault-injection, and independent review techniques. Designers should not claim that a code is “error-proof”; all codes operate under assumptions about the number and structure of errors.

Current Developments and Design Trends

Modern processors increasingly combine integer, fixed-point, floating-point, and vector representations. Digital signal-processing and machine-learning accelerators use reduced-precision formats, such as eight-bit integers or specialized floating-point formats, to improve energy efficiency and throughput. Their use requires calibration, scaling, and analysis of accumulated quantization error.

High-speed communication systems employ sophisticated forward-error-correction codes, including low-density parity-check and polar codes. Memory systems use error-correcting codes to compensate for device variability and aging. Hardware description languages and formal verification tools allow arithmetic widths, signedness, and unreachable code states to be checked before fabrication. These developments reinforce a central principle: representation is part of system architecture, verification, and reliability engineering.

Best Practices

• Define the semantic meaning of every field before choosing its bit pattern.
• Calculate range, resolution, and word length from requirements rather than habit.
• Distinguish unsigned overflow, signed overflow, truncation, rounding, and saturation.
• Use sign extension only for signed values and zero extension only when appropriate.
• Reserve and validate invalid code patterns where fault detection is valuable.
• Choose error-control methods according to the expected error model.
• Specify bit order, byte order, scaling, parity, CRC parameters, and failure behavior.
• Test boundary values, sign changes, maximum values, invalid codes, and injected errors.
• Treat redundancy and precision as engineering trade-offs, not as free improvements.

Chapter Summary

Digital systems convert physical signals into discrete logical values, gaining noise tolerance and repeatability through abstraction. Binary variables and Boolean algebra provide the foundation for logic design, while positional notation gives systematic meaning to bit patterns. Unsigned, signed-magnitude, one’s-complement, and two’s-complement representations differ in range, zero representation, and arithmetic behavior; two’s complement is especially useful because one adder can support both addition and subtraction. Fixed-point formats trade range against resolution and require explicit decisions about scaling, rounding, truncation, and saturation.

Codes extend representation beyond ordinary numbers. BCD supports decimal digits, Gray code reduces transition ambiguity, character codes represent symbols, and application-specific codes optimize state decoding or fault behavior. Error-control codes add structured redundancy. Hamming distance determines detection and correction capability, while parity, CRCs, and Hamming codes serve different purposes. In practical systems, representation must be selected with regard to meaning, numerical requirements, physical interfaces, error models, safety, and verification.

Key Terms

Digital abstraction: Representation of physical signals as discrete logical states.

Logic level: A voltage or signal range interpreted as a logical 0 or 1.

Noise margin: Tolerance between guaranteed output levels and recognized input levels.

Boolean variable: A variable restricted to the values 0 and 1.

Radix: The base of a positional number system.

Most significant bit: The bit with the greatest positional weight.

Least significant bit: The bit with the smallest positional weight.

Unsigned representation: A representation in which all bits contribute non-negative positional weights.

Signed magnitude: A signed representation using one sign bit and a magnitude field.

One’s complement: A representation in which negation is obtained by inverting every bit.

Two’s complement: A signed representation formed by bit inversion followed by addition of one.

Overflow: A result outside the range representable by the selected format.

Fixed-point representation: A numerical format with a fixed binary-point position.

Quantization: Mapping a continuous or higher-precision value to discrete levels.

BCD: Binary-coded decimal, in which each decimal digit has its own binary code.

Gray code: A code whose adjacent valid words differ in one bit.

Hamming distance: The number of differing bit positions between two code words.

Parity bit: A redundant bit used to indicate the parity of the number of ones.

CRC: Cyclic redundancy check based on polynomial arithmetic over binary fields.

Syndrome: The pattern of parity-check failures used to identify an error condition.

Review Questions

Short Answer Questions

1. Why can digital abstraction provide noise immunity even though the underlying signal is analog?

2. State the range of an n-bit unsigned representation.

3. Why is two’s complement generally preferred to signed magnitude for processor arithmetic?

4. What is the defining transition property of Gray code?

5. What does the minimum Hamming distance indicate about a code?

Long Answer Questions

1. Explain positional number systems and describe methods for converting integer and fractional decimal values to binary.

2. Compare signed magnitude, one’s complement, and two’s-complement representations with respect to range, zero, and arithmetic.

3. Discuss fixed-point design, including range, resolution, scaling, rounding, truncation, and saturation.

4. Explain BCD, Gray, character, and one-hot codes and identify an appropriate application for each.

5. Describe parity, CRC, and Hamming coding, including their capabilities and engineering trade-offs.

Analytical / Application Questions

1. An eight-bit two’s-complement controller adds two positive values and obtains a negative result. Determine whether overflow has occurred and explain the criterion used.

2. Design a representation for a sensor ranging from −20 °C to 80 °C with 0.1 °C resolution. State a suitable scaling method, word length, and overflow policy.

3. A communication frame uses a single even-parity bit. Analyze which classes of bit errors are detected and propose a stronger method for detecting burst errors.

22. Multiple Choice Questions with Answers

Question 1

A four-bit pattern is interpreted as 8421 BCD. Which decimal value does 0100 1001 represent?

A. 49

B. 73

C. 1001

D. 4.9

Correct Answer: A. 49

Question 2

In an eight-bit two’s-complement system, which event definitely indicates signed overflow?

A. A carry is produced from the MSB

B. A positive and a negative number are added

C. Two positive operands produce a negative result

D. The result contains four 1s

Correct Answer: C. Two positive operands produce a negative result

Question 3

What is the principal advantage of Gray code in a position encoder?

A. Each code word has a direct power-of-two weight

B. Adjacent code words differ in only one bit

C. It detects every two-bit error

D. It eliminates the need for synchronization

Correct Answer: B. Adjacent code words differ in only one bit

Question 4

The range of an eight-bit unsigned binary number is:

A. −128 to 127

B. −127 to 127

C. 0 to 255

D. 0 to 256

Correct Answer: C. 0 to 255

Question 5

A code has minimum Hamming distance 5. How many errors can it guarantee to correct?

A. 1

B. 2

C. 4

D. 5

Correct Answer: B. 2

Question 6

Which operation is normally appropriate when a signed two’s-complement value is widened to a larger word length?

A. Invert all bits

B. Replicate the sign bit

C. Append zeros at the MSB side

D. Reverse the bit order

Correct Answer: B. Replicate the sign bit

Question 7

Why may saturation be preferred to wraparound in a motor-control calculation?

A. Saturation increases numerical resolution

B. Wraparound always detects errors

C. Saturation avoids converting an excessive value into an opposite extreme

D. Saturation requires no comparison hardware

Correct Answer: C. Saturation avoids converting an excessive value into an opposite extreme

Question 8

A single parity bit fails to detect which type of error pattern?

A. Any single-bit error

B. Any odd number of bit errors

C. Any even number of bit errors

D. Every error in the parity bit

Correct Answer: C. Any even number of bit errors

Question 9

For the binary value 101.101₂, what is its decimal value?

A. 5.125

B. 5.625

C. 6.125

D. 6.625

Correct Answer: B. 5.625

Question 10

Which statement best describes a CRC?

A. It normally corrects every single-bit error

B. It adds a polynomial-division remainder to detect transmission errors

C. It assigns one bit to each system state

D. It represents each decimal digit with four bits

Correct Answer: B. It adds a polynomial-division remainder to detect transmission errors