7. Sampled-Data and Digital Control

Introduction and Context

Most modern control systems are implemented digitally. Industrial drives, aircraft flight-control computers, process controllers, robots, medical instruments, and power-electronic converters commonly measure physical variables with sensors, process them in microprocessors or programmable logic controllers, and generate actuator commands at discrete instants. The plant, however, usually remains continuous: motors rotate, temperatures change, currents flow, and mechanical structures vibrate in continuous time. Sampled-data control is concerned with the interaction between these continuous physical processes and discrete computational devices.

This interaction is not merely a matter of replacing the variable s by the variable z. Sampling introduces information loss, zero-order holds alter the effective plant, computation creates delay, and finite word length produces quantization. Consequently, digital control design must consider both mathematical stability and implementation realities. A controller that is satisfactory in an ideal simulation may become oscillatory, noisy, or unstable when sampling, timing, saturation, and computational delay are included.

This chapter develops the principal analytical tools for sampled-data systems: sampling and aliasing, zero-order holds, the z-transform, discrete-time models, stability, discretization, digital controller design, state estimation, and embedded implementation. The emphasis is on engineering judgment: selecting a sampling period, choosing a discretization method, interpreting discrete poles, and identifying nonideal effects before commissioning a system.

Learning Objectives

After studying this chapter, the reader should be able to:

1. explain the operation of sampled-data control systems and distinguish continuous, discrete, and digital signals;

2. apply the sampling theorem and identify aliasing mechanisms;

3. derive or interpret zero-order-hold and discrete state-space models;

4. use the z-transform to analyze difference equations and transfer functions;

5. assess discrete-time stability using pole locations and related criteria;

6. compare common discretization methods and select an appropriate method for an application;

7. design digital PID controllers and understand the effects of delay, saturation, quantization, and jitter;

8. formulate discrete observers and Kalman-filter-based state estimators; and

9. make sound implementation decisions for embedded control systems.

From a Continuous Plant to a Digital Loop

A typical digital feedback loop contains a plant, sensor, anti-aliasing filter, analog-to-digital converter, digital controller, digital-to-analog converter or pulse-width modulator, and actuator. The sensor output is continuous in time. The anti-aliasing filter limits high-frequency content before sampling. At every sampling instant, the converter produces a number, the controller executes an algorithm, and the actuator command is held or modulated until the next update.

If the sampling instants are t=kT, where T is the sampling period and k is an integer, a sampled signal is represented as x[k]=x(kT). The notation x(t) denotes a continuous-time signal, whereas x[k] denotes a sequence. A discrete controller maps measured sequences into control sequences, for example

u[k]=C(z)e[k],

where e[k] is the sampled error and C(z) is a transfer function in the shift operator z. The digital controller does not directly manipulate every value of a continuous waveform; it computes a command at selected instants.

The sampling period is a design variable. A faster sampling rate generally improves tracking and disturbance rejection and reduces phase lag associated with sampling, but increases processor load, communication traffic, sensor noise bandwidth, and energy consumption. A slower rate may be adequate for a thermal process but unacceptable for a current-control loop in a power converter. Sampling should therefore be selected from the dynamics and performance requirements of the complete loop rather than from processor speed alone.

Sampling, Reconstruction, and Aliasing

The ideal sampling theorem states that a band-limited signal with highest frequency f_max can be reconstructed exactly if the sampling frequency satisfies

f_s > 2f_max.

The frequency f_s/2 is called the Nyquist frequency. In practice, the inequality must include a margin because real filters are not ideal and signals may contain noise, switching ripple, resonances, or unmodeled high-frequency components.

Sampling replicates the spectrum of a continuous signal around integer multiples of f_s. If these replicas overlap, different continuous-time frequencies produce the same sampled sequence. This phenomenon is aliasing. For example, a sinusoid at frequency f sampled at f_s is indistinguishable, under ideal uniform sampling, from a sinusoid whose frequency is |f-nf_s| for a suitable integer n and lies within the Nyquist interval. A high-frequency vibration can therefore appear as a low-frequency oscillation in the digital controller.

Aliasing cannot be removed by digital processing after the signal has been sampled; the lost distinction is already absent. Prevention requires an analog anti-aliasing filter before the ADC, suitable sensor bandwidth, and a sampling frequency sufficiently greater than the highest frequency of interest. In control applications, anti-aliasing filters introduce phase lag, so their cutoff frequency must be selected as a compromise between attenuation and dynamic fidelity.

Sampling may also create intersample behavior. A sampled output can appear acceptable at the update instants while exhibiting excessive excursions between them. This is important in systems with resonant modes, saturation limits, or safety constraints. Discrete-time performance should therefore be supplemented by continuous-time simulation or hardware testing when intersample behavior matters.

The Zero-Order Hold and the Discrete Plant Model

The most common reconstruction mechanism is the zero-order hold (ZOH). It holds each computed control value constant over one sampling interval:

u(t)=u[k], kT <= t < (k+1)T.

The hold is simple and is naturally realized by a DAC or an actuator interface. However, it is not dynamically neutral. Its frequency response is

H_0(s)=(1-e^{-sT})/s,

which includes a magnitude effect resembling a sinc function and a phase delay. For sufficiently low frequencies, the hold behaves approximately like a delay of T/2. This delay contributes phase lag and becomes important when the sampling period is not small relative to the closed-loop time scale.

For a continuous state-space model

x_dot(t)=Ax(t)+Bu(t), y(t)=Cx(t)+Du(t),

with a zero-order-held input, the exact discrete model at sampling instants is

x[k+1]=A_d x[k]+B_d u[k],

y[k]=Cx[k]+Du[k],

where

A_d=e^{AT},

B_d=integral from 0 to T of e^{A tau}B d tau.

The matrix exponential preserves the continuous plant dynamics exactly at the sampling instants, assuming the input remains constant over each interval. If A is nonsingular, B_d=A^{-1}(A_d-I)B; the integral form is more general and is preferred conceptually. Exact discretization is particularly valuable for simulation and model-based control because it avoids approximation error associated with replacing derivatives by finite differences.

For a scalar first-order plant G(s)=K/(tau s+1), the ZOH model is

G_d(z)=K(1-e^{-T/tau})/(z-e^{-T/tau}),

when input and output are represented at consistent sampling instants. The continuous pole at -1/tau maps to the discrete pole e^{-T/tau}. This mapping illustrates a general result: a continuous pole s_i maps under exact sampling to z_i=e^{s_iT}.

The z-Transform as an Analytical Tool

The z-transform is the discrete-time counterpart of the Laplace transform. For a sequence x[k], its unilateral form is

X(z)=sum from k=0 to infinity of x[k]z^{-k}.

The unilateral transform is especially useful for control because it incorporates initial conditions in difference equations. Important transform properties include linearity, time shifting, and convolution. If a linear time-invariant discrete system has impulse response g[k], then y[k]=g[k]*u[k], and Y(z)=G(z)U(z).

The variable z is related to a complex discrete-time mode z=re^{jtheta}. Its magnitude determines growth or decay: |z|<1 produces decay, |z|=1 produces sustained oscillation, and |z|>1 produces growth. The angle theta is the discrete radian frequency, related to continuous frequency by theta=omega T within the principal frequency interval.

A difference equation such as

y[k]-a y[k-1]=b u[k-1]

has transfer function

Y(z)/U(z)=bz^{-1}/(1-az^{-1}).

The factor z^{-1} represents one sample of delay. Explicit delays are significant in digital control because a computational delay of one sample can substantially reduce phase margin in a fast loop.

The final-value theorem, when its stability conditions are satisfied, is

lim k->infinity y[k]=lim z->1 (z-1)Y(z).

It should not be applied blindly: the relevant closed-loop system must be stable and the limit must exist.

Discrete-Time Stability and Performance

A linear time-invariant discrete system is asymptotically stable if all closed-loop poles lie strictly inside the unit circle in the z-plane. Poles on the unit circle generally indicate marginal behavior and are unacceptable for asymptotic regulation; repeated poles on the unit circle produce unbounded responses. Poles outside the unit circle cause divergence.

The mapping z=e^{sT} maps the open left half of the s-plane inside the unit circle. Thus exact discretization preserves stability for a continuous plant, but controller discretization and delays can change the closed-loop pole locations. The discrete root locus, Jury test, bilinear transformations, and state-transition analysis are useful stability tools. For a polynomial of modest order, the Jury criterion provides an algebraic test without explicitly computing all roots.

Discrete pole locations also determine transient performance. A real pole close to one produces a slow response. A complex pair z=re^{±jtheta} produces a sampled oscillation with damping governed by r and frequency approximately theta/T. A useful approximate settling-time relation for a dominant pole is t_s approximately -4T/ln(r), for a two-percent criterion, provided the pole dominates and the response is appropriately interpreted.

Frequency-response analysis requires care. The discrete frequency response is evaluated on the unit circle, z=e^{jOmega}, with Omega in radians per sample. Frequencies separated by integer multiples of the sampling frequency are indistinguishable, which is another expression of spectral periodicity.

Discretizing Controllers and Continuous Models

A continuous controller can be converted to a digital algorithm in several ways. The choice influences frequency response, stability, disturbance rejection, and implementation complexity.

Forward Euler, or forward rectangular integration, replaces s by (z-1)/T. It is simple but may distort dynamics and can map stable continuous poles outside the unit circle when the sampling period is large. Backward Euler replaces s by (1-z^{-1})/T, or equivalently s approximately (z-1)/(Tz). It is numerically robust and maps the entire open left half-plane into the unit disk, although it adds frequency distortion and effective damping.

The bilinear, or Tustin, transformation is

s approximately (2/T)(z-1)/(z+1).

It maps the left half-plane to the interior of the unit circle and is widely used because it preserves stability and gives a useful frequency-domain approximation. Its frequency warping can be compensated by prewarping at a critical frequency. Tustin is often suitable for PID and compensator implementation when exact plant discretization is not being used.

Impulse-invariant and matched-pole-zero methods preserve selected time-domain or pole-zero features, but can suffer from aliasing or undesirable zero placement. Exact ZOH discretization is generally preferred for a plant model with piecewise-constant actuation, whereas Tustin is often convenient for transforming an analog controller. The selection should follow the physical interface and the performance objective rather than habit.

Digital PID Control

A continuous PID controller has the form

u(t)=K_p e(t)+K_i integral e(t)dt+K_d de(t)/dt.

A digital implementation must approximate the integral and derivative and must address saturation and noise. A practical incremental PID algorithm is often written as

u[k]=u[k-1]+K_p(e[k]-e[k-1])+K_iT e[k] + (K_d/T)(e[k]-2e[k-1]+e[k-2]),

with suitable filtering of the derivative term. This equation is illustrative; sign conventions, sampling alignment, and derivative filtering must be specified in a real implementation.

Derivative action amplifies high-frequency measurement noise. A filtered derivative replaces the ideal differentiator with a realizable lead-lag element. Integral action can cause windup when the actuator saturates: the error continues to accumulate even though the requested command cannot be delivered. Anti-windup methods include conditional integration, back-calculation, and tracking-based schemes.

Digital PID design should account for computational delay, ZOH phase lag, sensor filtering, actuator dynamics, and finite resolution. Tuning from a continuous design is acceptable only when the sampling frequency is sufficiently high and the discretization is verified through a discrete closed-loop model. The final design should be checked against actuator limits, reference changes, disturbances, noise, and worst-case execution time.

State-Space Control and State Estimation

When all relevant states are not measured, a discrete observer can reconstruct them. For

x[k+1]=A_d x[k]+B_d u[k], y[k]=C_d x[k],

a Luenberger observer is

xhat[k+1]=A_d xhat[k]+B_d u[k]+L(y[k]-C_d xhat[k]).

The estimation-error dynamics are

e[k+1]=(A_d-LC_d)e[k].

The observer gain L is selected so that the eigenvalues of A_d-LC_d lie inside the unit circle, commonly faster than the dominant controller poles but not so fast that measurement noise is excessively amplified. Observability of the pair (A_d,C_d) is a prerequisite for arbitrary pole placement.

A discrete Kalman filter provides a statistically optimal linear estimator under commonly used assumptions of known models, white process noise, white measurement noise, and specified covariance matrices. The prediction equations are

xhat[k+1|k]=A_d xhat[k|k]+B_d u[k],

P[k+1|k]=A_dP[k|k]A_d^T+Q.

The measurement update uses the innovation y[k]-C_d xhat[k|k-1] and the measurement-noise covariance R. In practice, Q and R are model-and-sensor tuning parameters as well as statistical quantities. Poorly chosen covariances can make the estimator sluggish, noisy, or overconfident. Estimator design must also consider sensor faults, packet loss, biases, and constraints.

Quantization, Timing, and Embedded Realization

An ADC converts a continuous amplitude into one of finitely many levels. Quantization error is often modeled as bounded noise with magnitude approximately half an ADC step, but this model becomes unreliable for low-resolution, nonlinear, or correlated signals. Quantization can produce limit cycles in systems with integral action, especially when the reference is small and the actuator command changes in discrete increments.

Numerical representation matters. Fixed-point arithmetic is efficient and predictable but requires scaling, overflow protection, and analysis of resolution. Floating-point arithmetic simplifies range management but does not eliminate numerical errors or timing constraints. Coefficient quantization can move poles and reduce stability margins, particularly in high-order filters with poorly conditioned polynomial forms. State-space or cascaded realizations are often more robust than direct high-order transfer-function implementations.

Timing has two distinct aspects. Sampling jitter changes the effective sampling instant, while computational delay shifts the control command. Jitter is particularly harmful in systems with high-frequency dynamics or synchronization requirements. A real-time implementation should specify task priority, interrupt behavior, input-output timing, worst-case execution time, deadline handling, and fail-safe behavior. A controller that occasionally misses its deadline is not equivalent to the nominal mathematical algorithm.

Saturation, rate limits, dead zones, actuator backlash, sensor faults, communication delays, and packet losses should be represented in verification models. Watchdogs, range checks, diagnostic signals, redundant measurements, and safe-state transitions are not optional additions in safety-critical control systems.

An Applied Case: Digital Speed Control of a DC Motor

Background

Consider an illustrative laboratory drive consisting of a DC motor, a speed sensor, a PWM power amplifier, and a microcontroller. The engineering objective is to regulate motor speed despite load-torque changes. The electrical current loop is assumed to be substantially faster than the outer speed loop, so the speed plant is approximated by

G(s)=K/(tau s+1).

Suppose the dominant mechanical time constant is 0.10 s. The speed loop must respond rapidly but should not react to switching ripple or encoder quantization.

Situation and Analysis

A first decision is the sampling period. Choosing T=0.01 s gives ten samples per mechanical time constant. This is a reasonable initial choice for an outer loop, but it must be validated against the desired bandwidth, encoder update rate, and processor workload. The PWM carrier and current loop may operate much faster, while the speed controller executes every tenth carrier period.

The continuous pole at -10 rad/s maps to

z_p=e^{-10(0.01)} approximately 0.905.

Thus the exact ZOH model has a stable discrete pole near 0.905. If a proportional controller is used initially, the closed-loop response can be simulated with the ZOH model rather than with an arbitrary finite-difference approximation.

The encoder measurement is filtered to reduce quantization-induced speed noise. The filter cutoff must remain well above the intended speed-loop bandwidth; otherwise, its phase lag will reduce damping. The controller includes integral action to remove steady-state speed error, but anti-windup is added because the PWM command is limited to its allowable duty-cycle range.

Approach and Solution

The design procedure is as follows. First, identify motor and load parameters experimentally using safe excitation. Second, discretize the plant exactly under the assumed held input. Third, select a controller using the discrete model and include one sample of computational delay if the firmware timing requires it. Fourth, test reference steps, load disturbances, saturation, sensor noise, and startup conditions in simulation. Fifth, commission with a restricted duty-cycle limit and monitor speed, current, error, execution time, and saturation status.

If the desired bandwidth is increased without reducing T, the ZOH and computational delay consume more phase margin. The designer may then reduce T, redesign the controller, or accept a slower response. Simply increasing proportional gain is not a reliable remedy. If encoder quantization produces a small oscillation, possible responses include increasing resolution, filtering with awareness of phase lag, reducing integral aggressiveness, or introducing a suitable deadband—provided the resulting steady-state error is acceptable.

Outcome and Learning Points

The case demonstrates that the digital controller is a system rather than only an equation. Sampling, exact plant modeling, measurement filtering, actuator saturation, anti-windup, task scheduling, and commissioning limits all influence the final result. The most important lesson is to verify the complete sampled-data loop, including nonideal interfaces, before relying on continuous-time tuning results.

Challenges, Professional Practice, and Emerging Directions

Common mistakes include sampling below the required rate, omitting anti-aliasing filters, ignoring one-sample delays, discretizing a controller without checking closed-loop poles, differentiating noisy measurements, allowing integral windup, and testing only nominal linear conditions. Another frequent error is to assess stability only at sample instants while neglecting intersample peaks.

Professional practice requires traceable requirements, documented assumptions, reproducible models, version-controlled software, calibration procedures, and independent verification for critical functions. In safety-related applications, the controller may be subject to sector-specific standards governing functional safety, electromagnetic compatibility, cybersecurity, and software development. Numerical decisions should be justified by measurable requirements rather than convenience.

Modern control platforms increasingly combine digital control with real-time operating systems, field buses, FPGA acceleration, edge analytics, and model-predictive control. Data-driven methods and neural estimators can support fault detection or adapt models, but they do not remove the need for sampling theory, stability analysis, bounded computation, and explainable safety behavior. Hardware-in-the-loop testing, processor-in-the-loop testing, and automated regression tests are valuable bridges between analysis and deployment.

Best practice is to begin with a physically meaningful continuous model, derive an exact or justified discrete model, select sampling and filtering together, include delays and limits, analyze discrete stability, and validate both sampled and intersample behavior. Implementation should then be tested under worst-case timing, disturbances, sensor faults, and parameter uncertainty.

Chapter Summary

Sampled-data control links continuous physical plants with discrete computational algorithms. Sampling must satisfy bandwidth requirements and be protected by analog anti-aliasing filters. A zero-order hold maintains each control command between updates and contributes magnitude and phase effects. Exact ZOH discretization maps a continuous state model through A_d=e^{AT} and the corresponding input integral.

The z-transform provides a systematic description of sequences, delays, difference equations, and discrete transfer functions. Discrete stability requires all closed-loop poles to lie inside the unit circle. Forward Euler, backward Euler, Tustin, and exact ZOH methods have different stability and frequency-response properties. Digital PID controllers require derivative filtering, anti-windup, and explicit treatment of delay. Discrete observers and Kalman filters reconstruct unmeasured states, but their performance depends on observability, noise assumptions, and covariance selection.

Finally, quantization, jitter, computational deadlines, finite word length, saturation, and communication effects can determine whether an implemented controller succeeds. Sound digital-control engineering therefore combines mathematical design with embedded-systems discipline, verification, safety considerations, and application-specific judgment.

Key Terms

Sampling: Conversion of a continuous-time signal into values at discrete instants.

Sampling period: Time interval T between successive samples.

Sampling frequency: Number of samples acquired per second, equal to 1/T.

Nyquist frequency: One-half of the sampling frequency.

Aliasing: Misidentification of a continuous frequency caused by spectral overlap during sampling.

Anti-aliasing filter: Analog pre-sampling filter that attenuates frequencies above the usable band.

Zero-order hold: Device that maintains a computed input constant over one sampling interval.

Discrete model: Mathematical model describing system behavior at discrete sampling instants.

z-transform: Transform used to analyze discrete-time sequences and systems.

Unit circle: Locus |z|=1 in the z-plane, which separates stable and unstable pole regions.

Discretization: Conversion of a continuous-time model or controller into a discrete-time representation.

Tustin transformation: Bilinear mapping s approximately (2/T)(z-1)/(z+1).

Quantization: Representation of a continuous amplitude by finite digital levels.

Sampling jitter: Variation in the actual timing of nominally periodic samples.

Computational delay: Time between measurement acquisition, computation, and actuation.

Integral windup: Accumulation of controller integral action while the actuator is saturated.

Observability: Ability to reconstruct internal states from measured outputs and known inputs.

Luenberger observer: Deterministic state estimator using output-error feedback.

Kalman filter: Recursive estimator based on a system model and stochastic noise covariances.

Intersample behavior: Continuous-time behavior occurring between discrete update instants.

Review Questions

Short Answer Questions

1. What is aliasing, and why can it not be corrected after ADC conversion?

2. State the discrete state-space model for a continuous plant driven through a zero-order hold.

3. What condition on closed-loop poles guarantees asymptotic stability of a discrete-time system?

4. Why is derivative action commonly filtered in a digital PID controller?

5. Distinguish sampling jitter from computational delay.

Long Answer Questions

1. Explain the architecture of a sampled-data feedback loop and discuss the function of the anti-aliasing filter, ADC, controller, and zero-order hold.

2. Derive the exact zero-order-hold discrete state-space model and explain the significance of A_d=e^{AT}.

3. Compare forward Euler, backward Euler, Tustin, and exact ZOH discretization with respect to stability and frequency-response distortion.

4. Discuss the design and implementation of a digital PID controller, including derivative filtering, anti-windup, delay, and actuator saturation.

5. Explain the operation of a discrete Luenberger observer and compare it with a discrete Kalman filter.

Analytical / Application Questions

1. A first-order plant has a continuous pole at -10 rad/s and is sampled every 0.01 s. Calculate its exact discrete pole and interpret the expected transient behavior.

2. A speed-control loop exhibits a low-frequency oscillation only after being implemented on a microcontroller. Develop a diagnostic plan addressing aliasing, quantization, integral windup, computational delay, and sampling jitter.

3. A control engineer proposes doubling the sampling period to reduce processor usage. Identify the model, stability, performance, and implementation checks required before approving the change.

22. Multiple Choice Questions with Answers

Question 1

A continuous pole at s=-5 is sampled with T=0.1 s using an exact zero-order-hold model. Where does the pole map in the z-plane?

A. z=0.6065

B. z=-0.6065

C. z=0.5

D. z=1.05

Correct Answer: A. z=0.6065

Question 2

Which measure must be taken before an ADC to prevent high-frequency components from aliasing into the control bandwidth?

A. Use a digital derivative term

B. Add an analog anti-aliasing filter

C. Increase integral gain

D. Place a pole outside the unit circle

Correct Answer: B. Add an analog anti-aliasing filter

Question 3

A discrete-time closed-loop system is asymptotically stable when

A. all poles lie on the unit circle

B. all poles lie outside the unit circle

C. all poles lie strictly inside the unit circle

D. all zeros lie inside the unit circle

Correct Answer: C. all poles lie strictly inside the unit circle

Question 4

What is the principal physical action of a zero-order hold?

A. It differentiates the controller output

B. It holds each computed command constant until the next update

C. It removes all measurement noise

D. It converts a discrete pole into a continuous pole

Correct Answer: B. It holds each computed command constant until the next update

Question 5

Which discretization method maps the open left half of the s-plane into the interior of the unit circle?

A. Forward Euler

B. Backward Euler only for unstable plants

C. Tustin transformation

D. Random sampling

Correct Answer: C. Tustin transformation

Question 6

Why is anti-windup needed in a digital PID controller?

A. To prevent sampling from occurring

B. To stop integral accumulation when the actuator is saturated

C. To increase ADC resolution

D. To move all poles onto the unit circle

Correct Answer: B. To stop integral accumulation when the actuator is saturated

Question 7

If a digital controller executes one full sample after the measurement is acquired, the principal modeled effect is

A. a computational delay represented by a sample delay

B. removal of the zero-order hold

C. perfect cancellation of plant dynamics

D. conversion of feedback into feedforward

Correct Answer: A. a computational delay represented by a sample delay

Question 8

For the observer xhat[k+1]=A_d xhat[k]+B_d u[k]+L(y[k]-C_d xhat[k]), the estimation error dynamics are governed by

A. A_d+LC_d

B. A_d-LC_d

C. B_d-C_d

D. L-A_dB_d

Correct Answer: B. A_d-LC_d

Question 9

A high-frequency vibration appears as a slow oscillation in sampled data. The most likely explanation is

A. integral windup

B. aliasing

C. observer pole placement

D. backward Euler damping

Correct Answer: B. aliasing

Question 10

Which implementation issue can cause a mathematically stable digital controller to behave unreliably in an embedded system even when its nominal poles are inside the unit circle?

A. A guaranteed infinite processor speed

B. Missed real-time deadlines and variable execution delay

C. An ideal anti-aliasing filter

D. Exact state-transition computation

Correct Answer: B. Missed real-time deadlines and variable execution delay