Data Representation and Computer Arithmetic

Introduction

A computer does not manipulate numbers, letters, images, or instructions in their human-readable forms. At the hardware level, all information is represented by patterns of binary digits, or bits. The choice of representation determines the range of values that can be stored, the precision of calculations, the speed and cost of hardware, and the types of errors that may occur.

Computer organization therefore requires more than knowing that digital systems use 0 and 1. A programmer, technician, or network professional must understand how bit patterns represent unsigned and signed integers, characters, fixed-point and floating-point values. They must also understand binary arithmetic, complements, overflow, precision, and the operation of arithmetic logic units (ALUs).

This chapter develops these foundations and relates them to practical systems such as processors, embedded controllers, network equipment, and software applications.

Learning Objectives

By the end of this chapter, you should be able to:

• Explain positional binary, octal, and hexadecimal representation.
• Convert values between decimal, binary, octal, and hexadecimal.
• Represent unsigned and signed integers using sign-magnitude, one’s complement, and two’s complement.
• Perform binary addition, subtraction, multiplication, and division.
• Identify carry, borrow, overflow, range, and precision limitations.
• Explain fixed-point representation and scaling.
• Describe IEEE 754 floating-point representation and special values.
• Explain the main functions of an ALU.
• Evaluate the effects of rounding and representation error in practical systems.

1. Positional Representation and Binary Data

In a positional numeral system, the value of a digit depends on its position. For a radix (base) r, a sequence of digits dₙ...d₁d₀ represents

where dᵢ is the digit in position i and 0 ≤ dᵢ < r. For a binary number, r = 2 and the digits are 0 and 1. The rightmost bit is the least significant bit (LSB), and the leftmost bit is the most significant bit (MSB).

For example:

A bit has two possible states. Eight bits form one byte. A group of four bits is a nibble. Common units are:

Hexadecimal and octal notation

Hexadecimal uses base 16 and the symbols 0–9 and A–F. Each hexadecimal digit corresponds exactly to four binary bits. Octal uses base 8, and each octal digit corresponds to three bits.

For example:

Binary:       1101 0110 1010
Hexadecimal:  D    6    A

Thus (110101101010)₂ = (D6A)₁₆. Hexadecimal is widely used for memory addresses, machine instructions, masks, and network hardware identifiers because it provides a compact view of binary data.

Fractions in binary

Binary fractions use negative powers of two. For example:

Some decimal fractions terminate in binary; others do not. For instance, 0.5 is exactly (0.1)₂, but 0.1₁₀ has a repeating binary expansion. This fact is central to floating-point error.

2. Integer Representation

Unsigned integers

An n-bit unsigned integer uses all bits for magnitude. Its range is:

For 8 bits, the range is 0 to 255. The number of distinct values is 2ⁿ. Increasing the word size by one bit doubles the number of representable values.

Signed representations

Signed representations reserve some interpretation for negative values. Three historical schemes are important.

#### Sign-magnitude

The MSB is the sign bit: 0 means positive and 1 means negative. The remaining n − 1 bits store the magnitude. For 8 bits, +13 is 00001101 and −13 is 10001101.

Sign-magnitude has two representations of zero: +0 and −0. Its range is

#### One’s complement

A negative number is formed by complementing every bit of its positive counterpart. Thus +13 is 00001101 and −13 is 11110010. One’s complement also has positive and negative zero, and arithmetic requires end-around carry handling.

#### Two’s complement

Two’s complement is the standard representation for signed integers in modern processors. To obtain −x, invert every bit of x and add 1. For n bits, the range is:

For 8 bits this is −128 to +127. There is only one zero.

To encode −13 in 8 bits:

+13       00001101
 Invert    11110010
 Add 1     11110011

To decode 11110011, observe that the MSB is 1. Invert and add 1:

11110011 → 00001100 → 00001101 = 13

Therefore the value is −13.

Two’s complement is convenient because the same binary adder can perform both signed and unsigned addition. The hardware does not need a separate subtraction mechanism for ordinary subtraction; it adds the two’s complement of the subtrahend.

Sign extension

When a signed value is moved to a wider word, the sign must be preserved. Sign extension copies the original MSB into the new positions. For example, the 8-bit value 11110011 (−13) becomes 11111111 11110011 in 16 bits. Zero extension is used for unsigned values: 00001101 becomes 00000000 00001101.

3. Binary Arithmetic

Addition

Binary addition follows four basic rules:

0 + 0 = 0
0 + 1 = 1
1 + 0 = 1
1 + 1 = 0, carry 1

Example:

00110110   (54)
+ 00001101   (13)
-----------
  01000011   (67)

A full-adder circuit receives two operand bits and an incoming carry. It produces a sum bit and an outgoing carry. For input bits A, B, and carry-in Cᵢ, the sum is

and the carry-out is

Here ⊕ denotes exclusive OR, ∧ denotes AND, and ∨ denotes OR. These equations describe one full-adder stage; a multi-bit adder connects stages so that each carry feeds the next position.

Subtraction

Subtraction can be performed by adding the two’s complement:

A − B = A + (two’s complement of B)

Example, using 8 bits:

00010110   (22)
− 00001001   (9)

The two’s complement of 00001001 is 11110111. Therefore:

00010110
+ 11110111
-----------
1 00001101

The carry beyond the eighth bit is discarded, leaving 00001101, or 13.

Multiplication and division

Binary multiplication uses the same shift-and-add principle as decimal multiplication. If a multiplier bit is 1, the multiplicand is added at the corresponding shifted position; if it is 0, no value is added.

For example, 13 × 5:

1101
×      0101
------------
      1101       (1 × 13)
     0000        (0 × 13, shifted)
    1101         (1 × 13, shifted two places)
------------
   1000001       (65)

Division may be implemented by repeated subtraction and shifting. Hardware implementations include restoring and non-restoring division. Multiplication and division are generally more complex and slower than addition, although modern processors may include dedicated or pipelined units.

Overflow and carry

Carry and overflow are different concepts. A carry out of the MSB is significant in unsigned arithmetic. Signed two’s-complement overflow occurs when the mathematical result is outside the signed range.

For addition of two signed values, overflow occurs when operands have the same sign but the result has the opposite sign. An equivalent hardware condition is

where Cᵢₙ is the carry into the sign bit and Cₒᵤₜ is the carry out of the sign bit. This condition applies to two’s-complement addition.

Example using 8 bits:

01111111   (+127)
+ 00000001   (+1)
-----------
  10000000

The bit pattern 10000000 represents −128 in two’s complement, not +128. The mathematical result is outside the range, so signed overflow has occurred. There is no unsigned carry out in this example, illustrating why carry and signed overflow must not be confused.

Subtraction can also overflow. For example, −128 − 1 cannot be represented in 8-bit two’s complement.

4. Character and Text Representation

Characters are encoded using numeric code points. ASCII uses seven bits and represents 128 characters, including English letters, digits, punctuation, and control characters. Extended 8-bit character sets historically added regional symbols but were not globally consistent.

Unicode assigns code points to characters from many writing systems. UTF-8 is a variable-length encoding in which common ASCII characters occupy one byte and other characters occupy two to four bytes. UTF-16 uses one or two 16-bit code units, while UTF-32 uses one 32-bit code unit per code point. Unicode code points and encoded bytes are not the same thing.

The distinction matters in networking and software security. A character count, byte count, and display width can differ. Improper encoding conversion can cause corrupted text, invalid filenames, or security vulnerabilities such as inconsistent validation between systems.

5. Fixed-Point Representation

Fixed-point representation assigns a fixed number of bits to the fractional part. If a stored signed integer I is interpreted with f fractional bits, the represented value is

where I is the stored integer and f is a non-negative integer. The scale factor is fixed for a particular format.

For example, with 8 total bits and 4 fractional bits, the stored pattern 00111000 equals integer 56. Therefore:

Fixed-point arithmetic is efficient and predictable. It is common in microcontrollers, digital signal processing, currency-like quantities with known scales, and systems without a floating-point unit. Addition and subtraction require operands with the same scale. Multiplication produces a result with twice as many fractional-bit positions before rescaling.

Fixed-point limitations include a restricted range and fixed resolution. If the least significant fractional bit represents 2⁻ᶠ, the spacing between adjacent values is 2⁻ᶠ. Rounding or truncation is required when a result cannot fit the selected scale.

6. Floating-Point Representation

Floating-point representation stores a number approximately in scientific notation. A binary floating-point value has a sign, a significand (also called a fraction or mantissa), and an exponent. This provides a very large range but non-uniform spacing between values.

IEEE 754 binary formats

The common IEEE 754 binary32 format has 32 bits:

For a normalized binary32 value, the numerical value is

where s is the sign bit, F is the fraction represented by the 23 fraction bits, and E = e − 127. The stored exponent e uses a bias of 127. The leading 1 is implicit for normalized values, providing effectively 24 significant binary bits.

Binary64 uses 1 sign bit, 11 exponent bits, and 52 fraction bits. Its exponent bias is 1023 and it provides approximately 15–17 decimal significant digits, compared with approximately 6–9 for binary32. These are approximate decimal precision figures, not guarantees for every operation.

Special values

IEEE 754 reserves exponent patterns for special cases:

• Positive and negative zero.
• Positive and negative infinity, commonly produced by division by zero or overflow under the applicable operation rules.
• NaN (Not a Number), representing invalid or undefined results such as 0 ÷ 0.
• Subnormal numbers, which provide gradual underflow near zero when the exponent field is zero and the fraction is nonzero.

The exact behavior of exceptions, rounding modes, signaling NaNs, and language libraries depends on the implementation and programming environment. Software should not assume that NaN behaves like an ordinary number; notably, comparisons involving NaN are generally unordered.

Rounding and precision

Most decimal fractions cannot be represented exactly in a finite binary format. A stored value is therefore often the nearest representable value. Repeated operations can accumulate rounding error. The spacing between adjacent floating-point numbers increases as the magnitude increases, so the same format has different absolute precision at different scales.

A useful conceptual measure is machine epsilon, the gap between 1 and the next larger representable number under a specified format and definition. It should not be confused with the smallest positive floating-point number. Numerical algorithms should consider tolerance, conditioning, cancellation, and the selected rounding mode.

Comparing calculated floating-point values with exact equality is often unsafe. A tolerance-based comparison may use an absolute tolerance for values near zero and a relative tolerance for larger values, but the tolerance must be chosen according to the application’s error requirements.

7. Arithmetic Logic Units

The ALU is a combinational or partly pipelined processor component that performs arithmetic and logical operations. Typical operations include addition, subtraction, comparison, AND, OR, XOR, shifts, and sometimes multiplication or division. Operands come from registers, and the result is returned to a register or another datapath component.

An ALU commonly produces status flags. Examples include:

The same bit pattern can have different meanings depending on the instruction and interpretation. For example, 11111111 is 255 unsigned and −1 in 8-bit two’s complement. The ALU performs bit operations; the instruction and software determine how the result is interpreted.

A ripple-carry adder is simple but may be slow because each carry waits for the preceding stage. Carry-lookahead and related designs calculate carries more rapidly at the cost of additional hardware. Modern processors may use wider, pipelined, superscalar, or vector ALUs to process several values concurrently.

Applied Case: Overflow in an Embedded Temperature Controller

Background

Consider an illustrative embedded thermostat that stores temperature in tenths of a degree Celsius. A temperature of 23.7 °C is stored as the integer 237. The controller uses a signed 16-bit integer, so its scale is 0.1 °C per stored unit.

Problem

A software update calculates a heating limit by adding a sensor reading and an adjustment value. A faulty sensor supplies 32,000 units and the adjustment is 5,000 units. The mathematical result is 37,000, which exceeds the signed 16-bit range of −32,768 to 32,767.

Analysis

In two’s-complement arithmetic, the 16-bit operation wraps to a negative bit pattern unless the processor or program detects overflow. A negative limit could cause the controller to disable heating, activate an alarm incorrectly, or produce unsafe behavior. The error is not solved by merely interpreting the result differently; the chosen representation cannot store the mathematical value.

Approach and solution

The implementation should validate sensor ranges before arithmetic, use a wider intermediate type, check the overflow flag or equivalent language-defined condition, and apply explicit saturation if the control specification requires limiting the result to a safe maximum. Saturation replaces an out-of-range result with the nearest permitted boundary rather than allowing wraparound.

Outcome and learning points

The case demonstrates that representation is part of system design. Engineers must specify units and scaling, calculate worst-case ranges, distinguish wraparound from saturation, test boundary conditions, and document whether arithmetic is signed or unsigned. In safety-related systems, overflow handling should be reviewed, tested, and, where appropriate, independently monitored.

Limitations, Professional Practice, and Contemporary Considerations

Representation choices involve trade-offs among range, precision, cost, speed, power consumption, and compatibility. Integer arithmetic is exact within range but can overflow. Fixed-point arithmetic is efficient but requires careful scaling. Floating-point arithmetic offers range but introduces rounding and exceptional values.

Best practices include:

1. Select a representation from quantified range and error requirements.
2. Document units, scale factors, signedness, and byte order.
3. Use explicit conversion rules at interfaces.
4. Check overflow, underflow, truncation, and invalid floating-point results.
5. Test zero, minimum, maximum, boundary, and negative values.
6. Avoid assuming that a wider type automatically eliminates all numerical error.
7. Use decimal or scaled-integer methods where financial or regulatory rules require exact decimal behavior.
8. Treat binary data validation as a security concern, especially at network and file boundaries.

Modern processors include SIMD/vector arithmetic, fused multiply-add instructions, accelerators, and specialized AI arithmetic such as reduced-precision formats. Reduced precision can improve performance and energy efficiency, but it may increase error and affect model accuracy. Therefore, numerical format selection should be validated experimentally against application requirements rather than selected solely for speed.

Chapter Summary

Computers represent all information as bit patterns. Positional notation explains binary, octal, and hexadecimal values. Unsigned integers provide a range from 0 to 2ⁿ − 1, while two’s-complement signed integers provide a range from −2ⁿ⁻¹ to 2ⁿ⁻¹ − 1 and allow addition hardware to support subtraction. Binary arithmetic relies on adders, shifts, complements, and careful interpretation of carry and overflow.

Characters are encoded using standards such as ASCII and Unicode, with UTF-8 being a common variable-length encoding. Fixed-point numbers use a predetermined scale and offer efficient, predictable arithmetic. Floating-point numbers use sign, significand, and exponent fields, with IEEE 754 defining common formats, rounding behavior, subnormal values, infinities, and NaNs. Floating-point values provide range but not exact representation of every decimal quantity.

The ALU performs arithmetic and logical operations and reports status flags used by software and control logic. Correct engineering practice requires explicit attention to range, precision, scaling, units, overflow, conversion, and boundary testing.

Key Terms

Bit: A binary digit with a value of 0 or 1.

Byte: A group of eight bits.

Radix: The base of a numeral system.

Unsigned integer: An integer representation using all bits for non-negative magnitude.

Sign-magnitude: A signed representation with a separate sign bit and magnitude field.

One’s complement: A representation formed for a negative value by inverting every bit.

Two’s complement: A signed representation formed by inverting bits and adding one; the modern standard for integer hardware.

Sign extension: Copying a signed value’s sign bit into newly added higher-order positions.

Carry: A bit propagated beyond a digit position during addition.

Overflow: A result outside the range representable by a selected format.

Fixed-point: A representation with a fixed location for the binary point.

Scale factor: The factor used to interpret a stored integer as a physical or fractional value.

Floating-point: A representation using sign, significand, and exponent fields.

IEEE 754: A widely used standard for binary floating-point formats and arithmetic behavior.

Significand: The significant part of a floating-point value.

Exponent bias: A constant added to an exponent before storage.

Subnormal number: A floating-point value near zero without the usual implicit leading one.

ALU: Arithmetic logic unit; hardware that performs arithmetic and logical operations.

Precision: The number of distinguishable significant digits or bits represented reliably.

Rounding error: The difference introduced when an exact value is replaced by a representable approximation.

Review Questions

Short Answer Questions

1. What is the range of an n-bit unsigned integer?
2. How is a negative two’s-complement number formed?
3. Distinguish carry from signed overflow.
4. What is the purpose of a fixed-point scale factor?
5. Name the three principal fields in an IEEE 754 floating-point format.

Long Answer Questions

1. Explain sign-magnitude, one’s complement, and two’s complement, including their ranges and treatment of zero.
2. Describe how a processor performs subtraction using two’s-complement addition.
3. Explain IEEE 754 binary32 representation and the purpose of exponent bias.
4. Compare integer, fixed-point, and floating-point representations for embedded systems.
5. Describe the principal operations and status flags of an ALU.

Analytical / Application Questions

1. An 8-bit signed system adds 100 and 60. Show the binary operation, determine the stored result, and explain whether signed overflow occurs.
2. A sensor stores voltage in millivolts using a 12-bit unsigned integer. Determine the largest directly representable voltage and propose a method for handling a higher input.
3. A program repeatedly adds 0.1 using binary floating-point. Explain why the result may differ from the expected decimal value and recommend a suitable comparison or representation strategy.

Multiple Choice Questions with Answers

Question 1

What is the range of an 8-bit unsigned integer?

A. −128 to 127

B. 0 to 255

C. −127 to 127

D. 0 to 256

Correct Answer: B. 0 to 255

Question 2

Which operation forms the two’s complement of a binary number?

A. Add 2 to every bit

B. Invert every bit and add 1

C. Invert only the sign bit

D. Shift every bit left once

Correct Answer: B. Invert every bit and add 1

Question 3

What is the 8-bit two’s-complement representation of −13?

A. 00001101

B. 10001101

C. 11110010

D. 11110011

Correct Answer: D. 11110011

Question 4

In signed two’s-complement addition, overflow occurs when:

A. The operands have different signs and the result is zero

B. The operands have the same sign and the result has the opposite sign

C. There is always a carry out of the MSB

D. The result contains at least one zero bit

Correct Answer: B. The operands have the same sign and the result has the opposite sign

Question 5

An 8-bit fixed-point value has four fractional bits and stores the integer 56. What value does it represent?

A. 0.35

B. 3.5

C. 35.0

D. 896

Correct Answer: B. 3.5

Question 6

Which IEEE 754 binary32 field contains the sign of the value?

A. The 1-bit sign field

B. The 8-bit exponent field

C. The 23-bit fraction field

D. The bias field

Correct Answer: A. The 1-bit sign field

Question 7

What is a principal advantage of hexadecimal notation?

A. It eliminates the need for binary hardware

B. Each hexadecimal digit corresponds to four binary bits

C. It represents only signed values

D. It always gives greater numerical precision

Correct Answer: B. Each hexadecimal digit corresponds to four binary bits

Question 8

Which ALU flag normally indicates that an arithmetic result is exactly zero?

A. Carry flag

B. Overflow flag

C. Zero flag

D. Parity flag

Correct Answer: C. Zero flag

Question 9

Why can decimal 0.1 be represented only approximately in many binary floating-point formats?

A. Binary formats cannot represent any fractions

B. Its binary expansion does not terminate in a finite number of bits

C. The sign bit is unavailable

D. IEEE 754 stores only integers

Correct Answer: B. Its binary expansion does not terminate in a finite number of bits

Question 10

A 16-bit signed integer stores a scaled sensor value in tenths of a unit. What is the maximum positive physical value before considering additional application limits?

A. 3,276.7 units

B. 32,767 units

C. 327,670 units

D. 65,535.0 units

Correct Answer: A. 3,276.7 units