Bipolar Junction Transistors

Introduction

The bipolar junction transistor (BJT) is a three-terminal semiconductor device used for amplification, switching, oscillation, signal conditioning and current control. Although field-effect transistors dominate many high-density integrated circuits, BJTs remain important where high transconductance, predictable analog behavior or economical switching is required.

A BJT is called bipolar because both electrons and holes participate in conduction. Its behavior depends on two interacting p–n junctions and on the injection, transport and collection of minority carriers. Effective circuit design therefore requires both device-level understanding and circuit-level analysis.

Learning Objectives

After completing this chapter, students should be able to:

• explain NPN and PNP transistor structure and carrier transport;
• distinguish cutoff, forward-active, saturation and reverse-active operation;
• compare common-emitter, common-base and common-collector configurations;
• establish stable DC bias and determine the operating point;
• construct and interpret DC and AC load lines;
• apply hybrid-π and T small-signal models;
• design a BJT as a switch and evaluate its switching times;
• assess thermal stability, power dissipation and safe operating area; and
• select a transistor using electrical and thermal ratings.

1. Structure and Transistor Action

A BJT contains three semiconductor regions: emitter, base and collector. An NPN transistor has an n-type emitter, thin p-type base and n-type collector. A PNP transistor uses complementary doping and opposite voltage and current polarities.

Figure: NPN physical structure and circuit symbol. The emitter arrow points outward for an NPN transistor.

The emitter is heavily doped to inject carriers efficiently. The base is thin and lightly doped so that relatively few injected carriers recombine there. The collector is physically larger and moderately doped because it must collect carriers, withstand reverse voltage and dissipate heat.

In normal forward-active operation, the base–emitter junction is forward biased and the base–collector junction is reverse biased. Electrons injected from the NPN emitter diffuse across the base. Most reach the collector depletion region and are swept into the collector. The small fraction that recombines contributes to base current.

The terminal currents obey Kirchhoff's current law:

where I_E, I_C and I_B are emitter, collector and base currents in amperes.

The common-base and common-emitter current gains are

and therefore

These relations apply to consistent DC quantities or to corresponding small-signal increments. In practical transistors, α is close to unity, while β may range from tens to several hundred and varies substantially among devices.

Exponential relation

In forward-active operation, neglecting high-level injection, leakage and Early effect,

where I_S is the scale current, V_BE is base–emitter voltage and V_T = kT/q is thermal voltage. At 300 K, V_T ≈ 25.85 mV. This equation is more fundamental than assuming a fixed 0.7 V base–emitter drop. The fixed-drop model is only a convenient approximation over a restricted current range.

For a given collector current, silicon V_BE typically decreases by approximately 2 mV/°C, although the exact coefficient depends on current density and device construction.

2. Operating Regions

The operating region is determined by the bias states of the two junctions.

In cutoff, collector current is ideally zero, although leakage remains. In forward-active operation, I_C ≈ βI_B may be used if the transistor is not close to saturation and the applicable value of β is known. In saturation, both junctions are forward biased and collector current is determined mainly by the external circuit. Consequently, I_C = βI_B must not be used as a saturation law.

A switching design commonly uses V_CE(sat) between approximately 0.1 and 0.3 V at specified currents. The value must be taken from the data sheet because it depends on collector current, base drive and temperature.

Reverse-active operation interchanges the functional roles of emitter and collector. Because their geometry and doping are not symmetrical, reverse current gain is normally much lower than forward gain.

Early effect

Increasing collector–base reverse voltage widens the depletion region into the base, reduces effective base width and slightly increases collector current. This base-width modulation is called the Early effect. A useful approximation is

where V_A is the Early voltage. The associated small-signal output resistance is approximately r_o = V_A/I_C when V_A ≫ V_CE.

3. Basic Transistor Configurations

The configuration name identifies the terminal common to input and output circuits.

The CE configuration is widely used for amplification and switching. The CB stage is useful for high-frequency circuits and impedance transformation. The CC stage, commonly called an emitter follower, is used as a buffer.

4. DC Biasing and the Operating Point

Biasing establishes the quiescent or Q point before an input signal is applied. For linear amplification, the Q point should remain in the forward-active region despite changes in β, temperature and supply voltage.

4.1 Fixed base bias

A resistor from the supply to the base gives, approximately,

This circuit is simple but poorly stabilized because collector current depends directly on uncertain β and temperature-sensitive V_BE. It is more suitable for some switching applications than for precision analog biasing.

4.2 Emitter feedback

Adding an emitter resistor creates negative feedback. If collector current rises, emitter voltage rises, reducing V_BE and opposing the increase. For a base source represented by Thevenin voltage V_TH and resistance R_TH, the active-region base current is

This equation assumes a constant approximate V_BE, forward-active operation and negligible leakage.

4.3 Voltage-divider bias

For divider resistors R₁ from V_CC to the base and R₂ from base to ground,

A stiff divider has a divider current much greater than expected base current, reducing sensitivity to β, but it also consumes more power and lowers input resistance.

Worked Example 1: Voltage-divider bias

A circuit has V_CC = 12 V, R₁ = 47 kΩ, R₂ = 10 kΩ, R_C = 3.3 kΩ, R_E = 1.0 kΩ, β = 100 and V_BE = 0.70 V.

Thus,

The positive collector–base voltage confirms forward-active operation under the assumed model.

5. DC and AC Load Lines

For a CE circuit without an emitter resistor, Kirchhoff's voltage law gives

This is the DC load line. Its ideal cutoff intercept is V_CE = V_CC, and its zero-voltage current intercept is I_C = V_CC/R_C. Actual saturation occurs near V_CE(sat), not at exactly zero volts.

Figure: The external load line intersects a transistor output characteristic at the Q point.

With an emitter resistor, the exact DC relation is

Using I_E = I_C(1+1/β) gives a β-dependent line. The approximation I_E ≈ I_C is often adequate when β is large.

The AC load line may differ from the DC line when a capacitively coupled load is present. At signal frequencies, the effective collector load can be R_C || R_L, while the DC load remains R_C. Signal swing must avoid both cutoff and saturation.

6. Small-Signal Models

A nonlinear transistor can be linearized about its Q point when signal variations are sufficiently small. At room temperature, the intrinsic parameters are

Here g_m is transconductance in siemens, r_π is hybrid-π input resistance, r_e is intrinsic emitter resistance in the T model and r_o models the Early effect. These are incremental parameters, not physical discrete resistors.

6.1 Hybrid-π model

The hybrid-π model places r_π between base and emitter and a dependent current source g_m v_π from collector to emitter for an NPN transistor, where v_π = v_be. The output resistance r_o may be placed between collector and emitter when the Early effect matters.

6.2 T model

In the T model below, the controlled current-source branch terminates at the base-side terminal node of r_e. It does not join the resistor body. The current through r_e is the emitter small-signal current i_e, and the controlled collector current is αi_e. Capacitances and r_o are omitted.

Figure: Correct T-model topology. The dependent source joins the base-side terminal node of the intrinsic emitter resistance.

For a bypassed-emitter CE amplifier, neglecting source attenuation and assuming the emitter is at AC ground,

The negative sign represents phase inversion. An unbypassed emitter resistor introduces local feedback, reducing gain and distortion while increasing input resistance.

Worked Example 2: Small-signal gain

At 300 K, let I_C = 1.00 mA, β = 100, V_A = 100 V, R_C = 2.2 kΩ and R_L = 10 kΩ. Assume a bypassed emitter.

Since I_E = 1.01 mA,

Also, r_o = 100 kΩ. The effective collector load is

Therefore,

This gain is from v_π to the output; source resistance and the bias network can reduce the overall gain from the signal source.

7. BJT Switching and Switching Times

A BJT switch operates mainly between cutoff and saturation. For reliable saturation, designers specify a forced beta

that is lower than the transistor's minimum active-region β. The base resistor for a voltage-driven NPN switch is approximately

This equation applies when the driver can provide the required current and its output resistance is included or negligible.

7.1 Quantitative switching-time definitions

Switching times are normally measured using stated test conditions and percentage thresholds:

• Delay time, t_d: time from application of forward base drive to collector current reaching 10% of its final on-state value.
• Rise time, t_r: time for collector current to rise from 10% to 90% of its final on-state value.
• Storage time, t_s: after base drive is reversed or removed, time until collector current falls to 90% of its on-state value. It represents removal of excess stored charge, especially after deep saturation.
• Fall time, t_f: time for collector current to decrease from 90% to 10% of its on-state value.

Thus,

Threshold conventions can vary among manufacturers; data-sheet definitions and test circuits must therefore be checked.

Figure: Collector-current waveform using 10% and 90% switching-time definitions.

Worked Example 3: Switching-time calculation

A transistor has t_d = 0.15 μs, t_r = 0.35 μs, t_s = 1.80 μs and t_f = 0.40 μs. Therefore,

The total transition interval per switching cycle is 2.70 μs. Its reciprocal, approximately 370 kHz, is only a theoretical timing bound; practical operation requires steady on/off intervals, loss margin and data-sheet compliance.

For a resistive load, a first-order switching-loss estimate is

provided voltage and current overlap approximately linearly during rise and fall. With 12 V, 0.20 A, 0.75 μs total rise-plus-fall time and 50 kHz,

Storage time is not directly included in this triangular-overlap estimate. Deep saturation increases stored charge and can greatly increase t_s. Schottky-clamped transistors, Baker clamps or controlled base-current reversal can prevent or reduce deep saturation.

8. Thermal Stability and Power Dissipation

Collector power is approximately

The base term is often small, but it should not automatically be ignored in high-current or strongly driven switches.

Junction temperature can be estimated by

where T_J and T_A are junction and ambient temperatures in °C and θ_JA is junction-to-ambient thermal resistance in °C/W. This relation is valid for the mounting, airflow, board area and steady-state conditions corresponding to the specified thermal resistance.

The thermally permitted steady power is

provided no electrical or safe-operating-area limit is exceeded.

Thermal runaway can occur when increased temperature raises collector current, causing additional dissipation and further heating. Emitter degeneration, stable bias networks, heat sinks, current limiting and adequate derating reduce this risk. Paralleled BJTs require particular care because the device carrying more current may heat and attract still more current; emitter ballast resistors promote current sharing.

9. Transistor Ratings and Safe Operation

A data sheet should be interpreted as a set of simultaneous constraints, not as independent values that can all be reached together.

The safe operating area accounts for current limits, power dissipation, breakdown and secondary breakdown. Secondary breakdown is a localized electrothermal failure mechanism particularly important in power BJTs. Staying below nominal maximum voltage, current and power separately does not guarantee that an operating point lies inside the SOA.

Inductive loads require suppression because interrupting current produces a potentially destructive voltage. A flyback diode is common for DC relay coils, although it slows current decay and relay release. Faster clamps use a diode–Zener combination, transient-voltage suppressor or active clamp, selected within voltage and energy ratings.

10. Applied Case: Microcontroller-Controlled Relay

Background

This is an illustrative design case. A 3.3 V microcontroller must operate a 12 V relay coil drawing 120 mA. The selected NPN transistor has a minimum active-region β of 60, a specified V_CE(sat) = 0.20 V near the required current when adequately driven, and a 625 mW package rating under stated board conditions.

Problem and analysis

Using active-region β directly would suggest only 2 mA of base current, but this would not guarantee saturation across production and temperature variation. Choose β_forced=10.

Assuming V_BE(sat)=0.80 V,

A standard 200 Ω resistor provides approximately 12.5 mA if the microcontroller maintains 3.3 V under load.

The transistor's on-state collector dissipation is approximately

which is modest. Nevertheless, the microcontroller pin-current rating must be checked. If 12.5 mA is excessive, a driver IC, Darlington arrangement or logic-level MOSFET is preferable.

Approach and outcome

A flyback diode is placed across the coil with its cathode at +12 V and anode at the transistor collector. The transistor is checked against collector voltage, pulse current, thermal limit and SOA. The base is given a defined pull-down path so that the relay remains off during processor reset.

The design operates reliably, but the diode prolongs relay release because it clamps the coil voltage to a low value. If rapid release is required, an appropriately rated higher-voltage clamp should be evaluated.

Learning points

• Saturation design must not rely on nominal β.
• The controller's output-current capability is part of the design.
• Inductive energy requires a deliberate current-decay path.
• Device power rating alone does not replace SOA and temperature checks.
• Fail-safe behavior during reset or disconnected control signals should be specified.

11. Practical Limitations and Contemporary Developments

BJT gain varies with collector current, temperature and manufacturing spread. Base current imposes drive loss, stored charge slows saturated switching, and low-frequency models omit junction capacitances and transit time. High-frequency analysis introduces base–emitter diffusion capacitance, base–collector depletion capacitance and feedback through the Miller effect.

Modern heterojunction bipolar transistors use different semiconductor materials or alloy compositions across a junction. Silicon–germanium HBTs provide high speed and are widely used in radio-frequency and mixed-signal integrated circuits. Integrated bandgap references and precision analog circuits continue to exploit predictable BJT junction-voltage relationships.

Professional design practice includes component traceability, counterfeit avoidance, conservative derating, documented worst-case analysis and compliance with applicable restrictions such as RoHS. Safety-critical products require qualified components and formal failure analysis. Automated optimization or AI-assisted component selection may accelerate design, but data-sheet conditions, thermal models and laboratory measurements must still be verified by an accountable engineer.

Chapter Summary

A BJT controls a large collector current through carrier injection across a forward-biased base–emitter junction and transport through a thin base. Its principal regions are cutoff, forward-active and saturation. Common-emitter, common-base and common-collector circuits provide different gain, impedance and phase characteristics.

Bias networks establish a Q point, while emitter feedback reduces sensitivity to β and temperature. Load lines identify allowable current and voltage combinations. Around the Q point, hybrid-π and T models permit linear small-signal analysis using g_m, r_π, r_e and r_o.

As a switch, the transistor requires adequate base current and careful treatment of delay, rise, storage and fall times. Saturation improves low on-state voltage but may increase storage delay. Reliable design also requires junction-temperature calculation, derating, SOA verification and protection against inductive transients.

Key Terms

Bipolar junction transistor: Three-terminal semiconductor device in which both carrier types participate in conduction.

Emitter: Heavily doped region that injects carriers into the base.

Base: Thin control region between emitter and collector.

Collector: Region that collects transported carriers and dissipates heat.

Current gain β: Ratio of collector current to base current in common-emitter operation.

Forward-active region: Region used for amplification with forward-biased base–emitter and reverse-biased base–collector junctions.

Saturation: State in which both transistor junctions are forward biased.

Cutoff: Nominal off-state with negligible controlled collector current.

Q point: DC current and voltage operating point in the absence of an input signal.

Load line: Circuit-imposed relationship between collector current and collector–emitter voltage.

Transconductance: Incremental ratio g_m = ∂I_C/∂V_BE at the operating point.

Hybrid-π model: Small-signal BJT model using r_π and a transconductance source.

T model: Small-signal model using intrinsic emitter resistance and an emitter-current-controlled source.

Early effect: Increase of collector current with collector voltage due to base-width modulation.

Forced beta: Designed ratio of collector current to supplied base current in switching operation.

Storage time: Turn-off interval required to remove excess stored charge before collector current falls below 90%.

Thermal runaway: Self-reinforcing increase of temperature, current and power dissipation.

Safe operating area: Permitted combinations of transistor voltage, current and operating duration.

Secondary breakdown: Localized electrothermal failure mechanism in power transistors.

Frequency transition f_T: Frequency at which short-circuit common-emitter current gain becomes unity.

Review Questions

Short Answer Questions

1. Why is the base region of a BJT thin and lightly doped?
2. State the junction-bias conditions for forward-active operation.
3. What is the physical meaning of transistor transconductance?
4. Why is a forced beta used in switching design?
5. Define storage time using collector-current thresholds.

Long Answer Questions

1. Explain carrier transport in an NPN transistor and derive the relationship between α and β.
2. Compare common-emitter, common-base and common-collector configurations in terms of gain, impedance, phase and applications.
3. Explain voltage-divider bias and the stabilizing action of an emitter resistor.
4. Develop the hybrid-π and T small-signal models and discuss their assumptions and limitations.
5. Explain thermal runaway, power derating, secondary breakdown and safe operating area.

Analytical / Application Questions

1. Design a voltage-divider-biased CE amplifier for a specified collector current and Q-point voltage, then test its sensitivity to β variation.
2. A saturated transistor has known delay, rise, storage and fall times. Determine its turn-on time, turn-off time and an appropriate practical switching-frequency range.
3. Select a BJT and protection network for an inductive actuator, considering base drive, saturation voltage, release time, SOA and junction temperature.

Multiple Choice Questions with Answers

Question 1

For an NPN transistor operating in the forward-active region, which junction condition is correct?

A. Both junctions are reverse biased

B. Base–emitter is forward biased and base–collector is reverse biased

C. Both junctions are forward biased

D. Base–emitter is reverse biased and base–collector is forward biased

Correct Answer: B. Base–emitter is forward biased and base–collector is reverse biased

Question 2

A transistor has α = 0.98. What is its corresponding common-emitter current gain β?

A. 0.98

B. 1.02

C. 49

D. 98

Correct Answer: C. 49

Question 3

At 300 K, a BJT carries I_C = 2.0 mA. Using V_T = 25.85 mV, what is its transconductance?

A. 12.9 mS

B. 38.7 mS

C. 77.4 mS

D. 129 mS

Correct Answer: C. 77.4 mS

Question 4

Which transistor configuration normally provides voltage gain near unity, high input resistance and low output resistance?

A. Common base

B. Common collector

C. Common emitter

D. Reverse active

Correct Answer: B. Common collector

Question 5

A CE circuit has V_CC = 10 V and R_C = 2 kΩ, with no emitter resistor. What is the ideal collector-current intercept of its DC load line?

A. 2 mA

B. 5 mA

C. 10 mA

D. 20 mA

Correct Answer: B. 5 mA

Question 6

Why must I_C = βI_B not be treated as the governing equation in saturation?

A. The collector current is then determined mainly by the external circuit and both junctions are forward biased

B. The base current becomes exactly zero

C. The emitter current is always equal to the base current

D. The collector–base junction is strongly reverse biased

Correct Answer: A. The collector current is then determined mainly by the external circuit and both junctions are forward biased

Question 7

A switch has t_d=0.2 μs, t_r=0.4 μs, t_s=1.5 μs and t_f=0.3 μs. What is its turn-off time?

A. 0.6 μs

B. 1.7 μs

C. 1.8 μs

D. 2.4 μs

Correct Answer: C. 1.8 μs

Question 8

Which design change most directly reduces the storage delay caused by deep BJT saturation?

A. Increasing collector resistance without limit

B. Using a Schottky or Baker clamp to prevent deep saturation

C. Removing all base-current limiting

D. Increasing ambient temperature

Correct Answer: B. Using a Schottky or Baker clamp to prevent deep saturation

Question 9

A transistor dissipates 0.50 W in an ambient temperature of 40°C. If θ_JA=100 °C/W, what steady-state junction temperature is estimated?

A. 50°C

B. 90°C

C. 100°C

D. 140°C

Correct Answer: B. 90°C

Question 10

Why is checking maximum collector voltage, maximum current and maximum power separately insufficient for a power BJT?

A. Current gain is always exactly constant

B. Base–emitter voltage cannot be measured

C. The operating point must also lie within the safe operating area, including secondary-breakdown limits

D. Power BJTs cannot operate in the active region

Correct Answer: C. The operating point must also lie within the safe operating area, including secondary-breakdown limits