Basic Electronics Engineering

Chapter 10
Power Supplies and Power Electronic Devices

Bachelors Program in Electrical Engineering
Basic Electronics Engineering   •   Bachelor

Power Supplies and Power Electronic Devices

Introduction

Power supplies convert electrical energy into the voltage, current, frequency, and isolation required by a load. Their design requires more than selecting a converter topology. A successful product must also manage semiconductor stress, magnetics, feedback stability, heat, electromagnetic interference (EMI), abnormal operating conditions, power quality, safety, and cost.

Linear supplies remain useful where low noise and simplicity dominate. Switched-mode power supplies (SMPSs) achieve much higher efficiency and power density by operating semiconductor devices primarily in their low-loss ON and OFF states. Modern systems increasingly employ digital control, bidirectional conversion, battery interfaces, and wide-bandgap devices such as silicon carbide (SiC) MOSFETs and gallium nitride (GaN) transistors.

Learning Objectives

After studying this chapter, students should be able to:

  • design basic linear and switched-mode power supplies;
  • analyze buck, boost, buck–boost, and flyback converters;
  • estimate semiconductor, magnetic, and thermal stresses;
  • distinguish MOSFETs, IGBTs, thyristors, SiC, and GaN devices;
  • design transformer turns, inductance, air gap, and flux density;
  • evaluate control-loop stability and compensation quantitatively;
  • apply gate driving, isolation, protection, and EMI-control practices;
  • assess efficiency, power factor, battery interfaces, and regulatory constraints.

1. Power-Supply Architecture and Specifications

A mains-powered electronic supply commonly includes an input fuse, surge suppressor, EMI filter, rectifier, bulk capacitor or power-factor-correction (PFC) stage, DC–DC converter, output filter, feedback system, and protection circuits. Isolation is required where safety standards demand separation between hazardous primary circuitry and accessible secondary circuitry.

Important specifications include:

SpecificationEngineering meaning
Line regulationOutput change caused by input-voltage variation
Load regulationOutput change caused by load-current variation
Ripple and noisePeriodic and high-frequency output-voltage components
EfficiencyOutput power divided by input power
Power factorReal input power divided by apparent power
Transient responseOutput behavior after rapid line or load changes
Hold-up timeDuration for which the output remains valid after input loss
Isolation ratingPermissible voltage between primary and secondary domains

Efficiency is

η = Pout/Pin = Pout/(Pout+Ploss)

where η is dimensionless, and powers are in watts. At 90% efficiency, a 100 W supply dissipates 100/0.90-100=11.1 W.

2. Rectification and Linear Power Supplies

2.1 Rectifier and reservoir capacitor

A full-wave bridge reverses the negative half-cycle of an AC input. With a sufficiently large reservoir capacitor, the approximate peak-to-peak ripple is

ΔV ≈ Iload/(fr C)

where Iload is approximately constant, C is capacitance, and fr is the ripple frequency. For full-wave rectification, fr=2fline. This approximation assumes small ripple and short capacitor-charging intervals.

For a 1 A load, 100 Hz ripple frequency, and 4700 μF capacitor,

ΔV ≈ 1/(100 × 4700 × 10-6) = 2.13 V

The bridge must withstand repetitive current pulses much larger than the average load current. These narrow pulses also degrade power factor and increase harmonic distortion.

2.2 Linear regulators

A linear regulator continuously adjusts a pass transistor so that the output remains constant. For a regulator carrying output current Io, its approximate dissipation is

Preg = (Vin-Vo)Io + VinIq

where Iq is quiescent current. If Iq is negligible,

η ≈ Vo/Vin

This is an upper-bound approximation and applies only when input and output currents are nearly equal.

Worked example—thermal design. A 12 V source supplies a 5 V, 0.8 A regulator with negligible quiescent current:

Preg=(12-5)(0.8)=5.6 W

If ambient temperature is 40°C and maximum junction temperature is 125°C, the maximum total junction-to-ambient thermal resistance is

θJA,max=(125-40)/5.6=15.2 °C/W

If junction-to-case and interface resistances total 3°C/W, the heat sink must provide no more than approximately 15.2-3=12.2 °C/W. Thermal design must also account for airflow, mounting orientation, and tolerance.

Low-dropout regulators (LDOs) require only a small input–output difference but may become unstable with unsuitable output-capacitor values or equivalent series resistance (ESR). Manufacturer stability requirements are therefore part of the design, not optional recommendations.

3. Switched-Mode Conversion

SMPS converters transfer energy using controlled switches, inductors, transformers, diodes, and capacitors. The following ideal relationships assume steady-state continuous-conduction mode (CCM), lossless components, and sufficiently small ripple.

3.1 Buck converter

During the switch ON interval, the inductor voltage is Vin-Vo. During the OFF interval it is -Vo. Inductor volt-second balance gives

D(Vin-Vo)+(1-D)(-Vo)=0

therefore

Vo = DVin

The inductor ripple is

ΔIL = (Vin-Vo)D/(Lfs)

where D is duty ratio, L is inductance, and fs is switching frequency.

For triangular capacitor current and negligible control interaction, buck output ripple can be estimated by

ΔVo ≈ ΔIL/(8fsC)+ΔIL rC

where rC is capacitor ESR. The ESR term represents the approximate peak-to-peak step associated with triangular inductor ripple.

Example. For 24 V to 12 V, 5 A, 100 kHz, and a target ripple of 1 A peak-to-peak:

D=12/24=0.5
L=(24-12)(0.5)/(1 × 100000)=60 μH

3.2 Boost converter

Ideal CCM volt-second balance gives

Vo = Vin/(1-D)

and

ΔIL = VinD/(Lfs)

The output cannot normally be lower than the input through ordinary boost action. In CCM, the boost converter also has a right-half-plane zero: increasing duty initially deprives the output of energy before raising its long-term voltage. For an ideal boost converter with resistive load R and inductance L,

fRHPZ = R(1-D)2/(2πL)

Feedback crossover is commonly kept well below this frequency, often below approximately one-fifth of it.

3.3 Inverting buck–boost converter

For the ideal inverting topology in CCM,

Vo = -VinD/(1-D)

The negative sign indicates reversed output polarity. Non-inverting buck–boost converters use additional switches or coupled structures to provide either step-up or step-down operation without polarity reversal.

3.4 Flyback converter

A flyback converter stores energy in a gapped coupled inductor while the primary switch is ON and releases it to the secondary while the switch is OFF. Under ideal CCM conditions,

Vo = (Ns/Np)VinD/(1-D)

where Np and Ns are primary and secondary turns. Diode drops, leakage inductance, winding resistance, dead time, and snubber losses alter the practical result.

Isolated flyback supply with transformer and optocoupler feedback Primary—hazardous domain Isolated secondary DC input MOSFET Flybacktransformer Rectifier DC output PWM controller+ gate driver Output sensingand reference Optocouplerisolation Every power, sensing, or control path crossing this boundary contains an isolation element.
Isolated flyback supply with transformer and optocoupler feedback
Figure: Isolated flyback supply with transformer and optocoupler feedback

Figure: Galvanically isolated flyback converter. Power crosses through the transformer and feedback crosses only through the optocoupler; no direct conductor crosses the isolation boundary.

Alternatives to an optocoupler include an isolated error amplifier, a certified digital isolator, or an auxiliary transformer winding with primary-side regulation. Safety depends on insulation rating, creepage, clearance, transformer construction, and certification—not merely on drawing a boundary in a schematic.

4. Semiconductor Power Devices

DeviceMain characteristicsTypical use
Silicon MOSFETVoltage-driven, fast, resistive ON-state lossLow- to medium-voltage, high-frequency converters
IGBTMOS gate with bipolar conduction; lower high-voltage conduction loss but tail currentMotor drives, inverters, medium-frequency high power
SCR/thyristorLatches ON after a gate pulse; turns OFF when current falls below holding currentControlled rectifiers, soft starters, crowbars
TRIACBidirectional thyristor for ACLamp and heater control
SiC MOSFETHigh blocking voltage, fast switching, high-temperature capabilityEV traction, PFC, high-voltage converters
GaN HEMTVery low charge and fast switching; generally lower voltage range than SiCCompact high-frequency adapters and DC–DC converters

4.1 Loss estimation

MOSFET conduction loss is approximately

Pcond=Irms2RDS(on)

The resistance must be evaluated at operating junction temperature. A first-order hard-switching estimate is

Psw ≈ 0.5VDSID(tr+tf)fs

where voltage and current are assumed to overlap linearly during transitions. This excludes output-capacitance loss, reverse recovery, gate-drive loss, parasitics, and ringing.

Gate-drive power is approximately

Pg=QgVgfs

where Qg is total gate charge at the relevant operating conditions and Vg is gate-drive swing.

For IGBTs, a useful conduction model is

Pcond ≈ VCE(sat)Iavg,ond

for an approximately constant ON-state drop, where d is conduction fraction. Datasheet curves provide more accurate values.

4.2 Gate drivers

A gate driver must source and sink enough current to charge and discharge device capacitances rapidly. Approximate average gate current is Qgfs, whereas peak current is governed by desired transition time and total gate-path impedance. Excessively fast switching increases EMI and overshoot; excessively slow switching increases switching loss.

High-side N-channel devices may use bootstrap drivers, isolated drivers, or isolated bias supplies. Half-bridge drivers require dead time to avoid shoot-through. Miller-induced turn-on can be reduced using low-impedance turn-off paths, negative gate bias where permitted, Miller clamps, and careful layout.

5. Magnetics Design

Magnetics frequently determine the size, losses, isolation capability, and achievable switching frequency of a converter.

5.1 Flux and turns

Faraday's law gives the winding voltage

v=N Ae(dB/dt)

where N is turns, Ae is effective core area in m², and B is flux density in tesla. For an approximately constant primary voltage during an interval ton,

ΔB=Vpton/(NpAe)=VpD/(NpAefs)

Therefore, for a selected permissible flux excursion,

Np ≥ max(VpD)/(ΔBmaxAefs)

The maximum must be taken over the full input and control range. Flux excursion must include reset behavior, tolerances, transient duty limits, and possible flux walking.

5.2 Inductance and air gap

For a core whose reluctance is dominated by a uniform air gap,

L ≈ μ0N2Ae/lg

where μ0=4π×10-7 H/m and lg is gap length. The formula neglects core reluctance and fringing, so practical design uses manufacturer AL data or finite-element correction.

Stored magnetic energy is

EL=0.5LIpk2

In a flyback converter, this energy is deliberately stored mainly in the gap. A conventional transformer ideally transfers energy directly and normally does not require a large energy-storage gap.

5.3 Copper and core losses

Copper loss is

Pcu=Irms2Rac

At high frequency, Rac exceeds DC resistance because of skin and proximity effects. Skin depth is

δ=√(2ρ/(ωμ))

where ρ is conductor resistivity, ω=2πf, and μ is permeability. Foil, litz wire, and interleaved windings can reduce AC loss, although interleaving may increase primary-to-secondary capacitance and common-mode EMI.

Core loss is often estimated using an empirical Steinmetz relation:

Pv=kf^α(ΔB)^β

where Pv is loss per unit core volume and k, α, and β are material- and waveform-dependent coefficients. Manufacturer data must be used with consistent units. Nonsinusoidal excitation may require an improved generalized Steinmetz method or measured loss curves.

5.4 Worked flyback magnetics design

Design an illustrative 24–36 V input, 12 V/2 A isolated flyback at 100 kHz. Assume 90% efficiency for current estimation, a 0.5 V secondary diode drop, Ae=80 mm2, and choose Np/Ns=3.

The secondary voltage reflected to the primary is

VR=(Np/Ns)(Vo+VD)=3(12+0.5)=37.5 V

At 24 V input, ideal volt-second balance gives

D=VR/(Vin+VR)=37.5/(24+37.5)=0.610

Choose Np=18 and Ns=6. The low-line flux excursion is

ΔB=24(0.610)/(18 × 80 × 10-6 × 100000)=0.102 T

Input power is 24/0.90=26.67 W, so low-line average input current is 26.67/24=1.111 A. Since primary current flows for fraction D, its approximate mean during the ON interval is

Ion,avg=1.111/0.610=1.82 A

Choose a peak-to-peak magnetizing ripple of 40% of this value: ΔI=0.728 A. Then

Lm=VinD/(ΔIfs)=24(0.610)/(0.728 × 100000)=201 μH

The approximate peak current is 1.82+0.728/2=2.18 A. For a gap-dominated core,

lg≈μ0Np2Ae/Lm=0.162 mm

This is a preliminary value. Final design must verify saturation including DC bias, fringing loss, leakage inductance, winding RMS currents, insulation margins, core loss, temperature rise, and worst-case current limiting.

6. Feedback and Control-Loop Compensation

A regulated converter uses negative feedback to reject disturbances. The loop gain is

T(s)=Gc(s)Gm(s)Gp(s)H(s)

where Gc is compensator transfer function, Gm is PWM or modulator gain, Gp is power-stage transfer function, and H is feedback gain.

At the gain-crossover frequency fc, |T|=1. Phase margin is 180°+∠T(j2πfc). Practical designs commonly target about 45°–70°, but acceptable values depend on transient requirements, tolerances, sampling delay, and nonlinear operating modes.

For an ideal voltage-mode buck converter with output-capacitor ESR rC, resistive load R, and CCM operation, the duty-to-output transfer function is

Gvd(s)=Vin(1+srCC)/[1+s(CrC+L/R)+s2LC(1+rC/R)]

This model neglects parasitic inductor resistance, delays, and discontinuous conduction. The LC double pole can introduce nearly 180° phase lag, while capacitor ESR introduces a zero at

fESR=1/(2πrCC)

A type-III compensator can be written as

Gc(s)=K(1+s/ωz1)(1+s/ωz2)/[s(1+s/ωp1)(1+s/ωp2)]

The integrator gives zero steady-state error to a constant disturbance, two zeros add phase near the LC resonance, and high-frequency poles reduce noise gain.

Quantitative compensation example

Consider a 24-to-12 V voltage-mode buck converter with L=47 μH, C=220 μF, R=6 Ω, rC=0.05 Ω, fs=100 kHz, and a 1 V PWM ramp. The LC resonant frequency is

f0=1/(2π√(LC))=1.57 kHz

and the ESR zero is

fESR=1/(2π × 0.05 × 220 μF)=14.5 kHz

Select fc=10 kHz, zeros at 1.25 and 1.96 kHz, and poles at 14.5 and 50 kHz. Evaluating the power stage at 10 kHz gives approximately

|Gvd|=0.726, ∠Gvd=-143.7°

With unity PWM gain and feedback gain for the normalized example, the required compensator magnitude is 1/0.726=1.377. Evaluating the frequency-dependent factors in the selected compensator gives

|Gc(j2π10000)|=0.000538K

Thus choose

K=1.377/0.000538=2.56 × 103 rad/s

The compensator phase at crossover is approximately +25.9°, producing an estimated loop phase of -117.8° and phase margin of 62.2°. Component tolerances, PWM delay, sampling, load range, current limiting, and measured frequency response must still be checked. Crossover should normally remain below about one-tenth of switching frequency and below restrictive right-half-plane zeros.

7. Protection, Isolation, and Thermal Reliability

Common protection functions include:

  • cycle-by-cycle overcurrent limiting;
  • short-circuit shutdown or hiccup restart;
  • input undervoltage lockout;
  • output overvoltage protection;
  • overtemperature shutdown;
  • reverse-polarity and reverse-current protection;
  • surge suppression using MOVs, TVS diodes, or active clamps;
  • snubbers and clamps for leakage-inductance energy.

A fuse protects wiring and limits fire risk; it does not necessarily protect a semiconductor quickly enough. Protection coordination must consider fault energy, interruption rating, component safe operating area, and restart behavior.

Isolation components require adequate working voltage, transient rating, creepage, clearance, insulation thickness, and common-mode transient immunity. Reinforced insulation may replace two independent basic-insulation barriers when certified for the application.

8. EMI and Layout

Differential-mode noise circulates between supply conductors. Common-mode noise flows through parasitic capacitance to chassis, protective earth, or surrounding structures. An EMI filter may use differential inductors, common-mode chokes, X capacitors across the line, and safety-rated Y capacitors across an isolation barrier.

The most effective EMI measure is usually controlling current-loop geometry. High-di/dt commutation loops and high-dv/dt switching nodes should be physically small. Gate-drive returns should not share inductive paths with power current. Kelvin source connections improve gate-control accuracy.

Input filters can interact with a converter's negative incremental input resistance. Damping may be required to prevent oscillation. Compliance testing uses specified equipment such as a line-impedance stabilization network (LISN); an oscilloscope trace alone does not establish regulatory compliance.

9. Power Quality and Battery Interfaces

For sinusoidal voltage and current with phase difference φ, displacement power factor is cosφ. With distorted current, true power factor is

PF=Preal/(VrmsIrms)

Passive rectifier-capacitor inputs often have poor distortion power factor. Active PFC shapes line current to follow line voltage, commonly using a boost stage. Harmonic-current limits apply to many product categories.

Battery-connected converters must support chemistry-specific limits and battery-management-system commands. Lithium-ion charging usually applies constant current followed by constant voltage, with current tapering during the voltage-limited phase. A charger must not infer safety from terminal voltage alone; cell temperature, individual cell voltages, pack current, isolation, contactor state, and fault status may be required.

Bidirectional converters support regenerative braking, vehicle-to-grid operation, energy storage, and uninterruptible supplies. Direction changes require controlled current ramps and prevention of DC-bus overvoltage.

10. Applied Case: Isolated Battery-Supported Control Supply

Illustrative case. An industrial controller requires an isolated 12 V, 24 W rail from a nominal 24–36 V battery bus.

Problem. The supply must maintain isolation, exceed 88% efficiency, avoid transformer saturation, survive output shorts, and meet conducted-emissions requirements.

Analysis. A linear regulator would dissipate at least (24-12)2=24 W at minimum input and even more at high input, so it is unsuitable. An isolated flyback is appropriate at 24 W because it provides isolation with one magnetic component and modest circuit complexity. The earlier magnetics calculation gives an 18:6 turns ratio, approximately 201 μH magnetizing inductance, 0.102 T low-line flux excursion, and 2.18 A estimated peak primary current.

Approach. The design uses a 100 V MOSFET only if leakage overshoot is clamped sufficiently below its derated voltage limit; otherwise a higher-rated device is selected. Secondary output sensing drives an optocoupler, ensuring that the feedback path crosses the barrier only through a certified isolation component. Cycle-by-cycle current limiting, hiccup short-circuit protection, input undervoltage lockout, a primary RCD or active clamp, and thermal shutdown are included. A common-mode choke and differential input filter are added after measuring noise with a LISN. The filter is damped and checked for control interaction.

Outcome. Prototype acceptance requires efficiency and temperature measurements across input and load range, transformer hipot testing, loop-gain measurement, short-circuit testing, surge testing, and pre-compliance EMI scans. Passing nominal bench operation alone is insufficient.

Learning points. Topology, magnetics, semiconductor rating, feedback isolation, compensation, protection, and EMI form one coupled design problem. Optimizing any one in isolation can compromise another.

11. Contemporary Developments and Professional Practice

SiC and GaN devices enable higher switching frequencies and smaller passive components, but their fast edges magnify parasitic inductance, common-mode current, insulation stress, and measurement error. Suitable drivers, low-inductance packaging, controlled gate resistance, and high-bandwidth isolated probes are essential.

Digital power controllers can implement adaptive dead time, telemetry, fault logging, nonlinear control, and parameter estimation. Machine-learning methods may support predictive maintenance or anomaly detection, but safety-critical shutdown should remain deterministic, independently verifiable, and robust against corrupted data.

Designers must comply with electrical-safety, EMC, environmental, and energy-efficiency regulations applicable to the market. Ethical engineering includes honest efficiency reporting, adequate component derating, traceable safety analysis, repairability where feasible, and avoidance of protection shortcuts that transfer risk to users or service personnel.

Chapter Summary

Power-supply design integrates energy conversion, control, magnetics, semiconductor operation, thermal management, isolation, EMI, and protection. Linear regulators offer low noise and simplicity but become inefficient at large voltage drops. SMPS topologies use switched inductive energy transfer to achieve high efficiency. Volt-second balance determines ideal conversion ratios and magnetic flux excursion, while current ripple determines inductance and device stress.

MOSFETs, IGBTs, thyristors, SiC, and GaN devices serve different voltage, frequency, and power ranges. Their selection requires conduction, switching, gate-drive, thermal, and fault analysis. Magnetics design requires verified turns, air gap, saturation margin, winding loss, core loss, and insulation. Stable regulation depends on the complete loop gain; compensation must account for LC poles, ESR zeros, switching delay, and right-half-plane zeros. Safe professional designs also require explicit isolation in every barrier-crossing power, sensing, or control path, coordinated protection, compliant EMI filtering, and validated battery and power-quality behavior.

Key Terms

Buck converter: A topology that ideally reduces DC voltage.

Boost converter: A topology that ideally increases DC voltage.

Continuous-conduction mode: Operation in which inductor current never reaches zero during a cycle.

Duty ratio: Fraction of a switching period for which a controlled switch is ON.

Flyback converter: An isolated converter that stores energy in a gapped coupled inductor.

Galvanic isolation: Prevention of direct conductive connection between circuit domains.

Gate driver: Circuit that supplies controlled gate voltage and current to a power switch.

IGBT: Insulated-gate bipolar transistor used mainly at higher voltage and power.

Line regulation: Output sensitivity to input-voltage variation.

MOSFET: Voltage-controlled field-effect transistor widely used for power switching.

Optocoupler: Isolation device that transfers information using light.

Phase margin: Angular distance between loop phase and −180° at gain crossover.

Power factor: Ratio of real power to RMS apparent power.

Right-half-plane zero: A nonminimum-phase zero that initially drives output opposite to its final response.

Skin effect: Concentration of AC current near a conductor surface.

Snubber: Network that limits switching transients or damps ringing.

Thyristor: Latching semiconductor switch triggered through a gate.

Volt-second balance: Steady-state requirement that average inductor voltage over a period is zero.

Wide-bandgap device: Semiconductor device, notably SiC or GaN, with a larger bandgap than silicon.

Review Questions

Short Answer Questions

  1. Why does a linear regulator become inefficient when its input–output voltage difference is large?
  2. State the ideal CCM conversion ratio of a buck converter.
  3. What is the purpose of dead time in a half-bridge?
  4. Distinguish differential-mode EMI from common-mode EMI.
  5. Why is an air gap commonly used in a flyback magnetic component?

Long Answer Questions

  1. Derive the ideal CCM voltage ratio of a boost converter using volt-second balance.
  2. Compare MOSFETs, IGBTs, SiC MOSFETs, and GaN devices in terms of loss, frequency, voltage, and application.
  3. Explain a complete transformer or coupled-inductor design process, including turns, flux, gap, copper loss, core loss, and insulation.
  4. Explain how LC poles, ESR zeros, and right-half-plane zeros influence converter compensation.
  5. Discuss the protection, isolation, thermal, and regulatory requirements of a mains-powered SMPS.

Analytical / Application Questions

  1. Design the inductor for a 36-to-12 V, 4 A buck converter at 150 kHz with 30% peak-to-peak current ripple. State all assumptions.
  2. A MOSFET carries 8 A RMS with RDS(on)=40 mΩ at operating temperature. It switches 200 V and 8 A with a combined linear transition time of 50 ns at 100 kHz. Estimate conduction and hard-switching losses.
  3. Propose an isolated 48 V battery-to-15 V, 60 W supply, identifying topology, semiconductor ratings, feedback isolation, magnetics checks, protection, compensation, and EMI validation.

Multiple Choice Questions with Answers

Question 1

An ideal CCM buck converter operates from 30 V with duty ratio 0.4. What is its output voltage?

A. 7.5 V

B. 12 V

C. 30 V

D. 75 V

Correct Answer: B. 12 V

Question 2

A full-wave rectifier connected to a 50 Hz source produces a reservoir-capacitor ripple frequency of:

A. 25 Hz

B. 50 Hz

C. 100 Hz

D. 200 Hz

Correct Answer: C. 100 Hz

Question 3

A linear regulator converts 15 V to 5 V at 1 A with negligible quiescent current. Its approximate power dissipation is:

A. 3.33 W

B. 5 W

C. 10 W

D. 15 W

Correct Answer: C. 10 W

Question 4

Which component explicitly transfers feedback across the isolation boundary in the chapter's isolated flyback architecture?

A. Ordinary copper trace

B. Optocoupler

C. Output capacitor

D. Gate resistor

Correct Answer: B. Optocoupler

Question 5

What is the principal magnetic purpose of the air gap in a flyback coupled inductor?

A. To eliminate winding resistance

B. To store energy and control inductance

C. To create galvanic isolation

D. To remove all leakage inductance

Correct Answer: B. To store energy and control inductance

Question 6

A MOSFET carries 5 A RMS and has RDS(on)=20 mΩ at operating temperature. Its conduction loss is:

A. 0.1 W

B. 0.5 W

C. 2.5 W

D. 5 W

Correct Answer: B. 0.5 W

Question 7

Which converter has a right-half-plane zero under CCM operation?

A. Ideal voltage-mode buck converter

B. Linear regulator

C. Boost converter

D. Resistive voltage divider

Correct Answer: C. Boost converter

Question 8

At loop gain crossover, a converter has a loop phase of −125°. What is its phase margin?

A. 35°

B. 55°

C. 125°

D. 305°

Correct Answer: B. 55°

Question 9

Which device normally remains ON after its gate trigger is removed until current falls below its holding current?

A. MOSFET

B. IGBT

C. SCR

D. Zener diode

Correct Answer: C. SCR

Question 10

A 100 W converter operates at 80% efficiency. What is its total power loss?

A. 20 W

B. 25 W

C. 80 W

D. 125 W

Correct Answer: B. 25 W

Basic Electronics Engineering
Chapter 10 of 15