Chapter 8
Operational Amplifiers and Linear Applications
Bachelors Program in Electrical Engineering
Basic Electronics Engineering
•
Bachelor
Operational Amplifiers and Linear Applications
Introduction
The operational amplifier, or op-amp, is a high-gain differential amplifier designed to perform predictable operations when combined with external feedback components. Op-amps are central to sensor interfaces, audio systems, control equipment, biomedical instrumentation, data acquisition, power electronics and communication circuits.
Circuit analysis commonly begins with an ideal model, but reliable design requires practical limits such as finite bandwidth, input offset voltage, bias current, noise, output-current capability, common-mode range, slew rate and stability. These limitations determine whether a circuit that is correct on paper will operate correctly in hardware.
Learning Objectives
After studying this chapter, the reader should be able to:
apply ideal and practical op-amp models;
design inverting, non-inverting, summing and differential amplifiers;
analyze instrumentation amplifiers and sensor interfaces;
design integrators, differentiators and comparators;
select active-filter topologies and calculate component values;
explain precision rectification and signal conditioning;
evaluate offset, noise, bandwidth, slew rate and stability; and
verify operating ranges against an op-amp data sheet.
1. Op-Amp Fundamentals
An op-amp has an inverting input, a non-inverting input and an output. Its open-loop relationship is
vo = AOL(v_+ - v_-)
where AOL is the open-loop voltage gain, v_+ and v_- are the input voltages, and vo is the output voltage. Because AOL may exceed 105 at low frequency, even a small differential voltage can drive the output into saturation.
1.1 Ideal model
An ideal op-amp has:
infinite open-loop gain;
infinite input resistance and therefore zero input currents;
zero output resistance;
infinite bandwidth and slew rate;
zero offset and noise; and
unlimited common-mode and output-voltage ranges.
With stable negative feedback and linear operation, two useful ideal conditions follow:
v_+ = v_- , \qquad i_+ = i_- = 0
The equality of input voltages is a feedback consequence, often called a virtual short. It does not apply when the output is saturated, when feedback is positive, or when frequency-dependent phase shift makes the loop unstable.
1.2 Negative feedback
For an amplifier with forward gain A and feedback factor β, the closed-loop gain is
ACL = \frac{A}{1+Aβ}
If the loop gain satisfies |Aβ| \gg 1 and the feedback is negative, then ACL \approx 1/β. The external components therefore determine the gain more accurately than the uncertain open-loop gain.
Negative-feedback op-amp block diagram
Figure: Negative-feedback op-amp block diagram
Figure: Negative feedback returns a fraction β of the output to oppose the input error.
2. Basic Closed-Loop Amplifiers
2.1 Inverting amplifier
An input resistor Rin connects the signal to the inverting terminal, while Rf connects the output to that terminal. The non-inverting input is referenced to ground. Under ideal linear operation, the inverting node is at virtual ground.
Applying Kirchhoff’s current law gives
\frac{vi}{Rin} = \frac{-vo}{Rf}
and hence
\frac{vo}{vi} = -\frac{Rf}{Rin}
The minus sign represents a 180° phase inversion. The input resistance seen by an ideal source is Rin.
Worked example. An input of 0.20 V is applied through 10 kΩ, with a 47 kΩ feedback resistor:
A four-resistor difference amplifier provides accurate subtraction when its resistor ratios satisfy
\frac{R2}{R1}=\frac{R4}{R3}=K
Under this matching condition,
vo=K(v2-v1)
The differential signal is vd=v2-v1, while the common-mode signal is vCM=(v1+v2)/2. Ratio mismatch converts common-mode voltage into output error, so precision resistor networks are preferable to unrelated discrete resistors.
where Ad and ACM are differential and common-mode gains.
3.2 Three-op-amp instrumentation amplifier
An instrumentation amplifier combines two high-input-resistance non-inverting stages with a difference amplifier. In the common symmetric topology, two equal resistors R and a gain resistor RG set the first-stage gain. If the final difference stage has matched ratio R3/R2, the total differential gain is
Ad=\left(1+\frac{2R}{RG}\right)\frac{R3}{R2}
This equation applies to the standard symmetric three-op-amp connection. Integrated instrumentation amplifiers may use a manufacturer-specific gain equation.
For R=49.5\text{ kΩ}, RG=1.00\text{ kΩ} and unity final-stage gain,
Ad=1+\frac{2(49.5)}{1.00}=100
Instrumentation amplifiers are appropriate for strain gauges, thermocouples, electrocardiography and other low-level differential measurements in the presence of substantial common-mode voltage.
4. Integrators and Differentiators
4.1 Ideal integrator
Replacing the feedback resistor of an inverting amplifier with capacitor C gives
\frac{Vo(s)}{Vi(s)}=-\frac{1}{sRinC}
For an initial output vo(t0), the time-domain response is explicitly
vo(t)=vo(t0)-\frac{1}{RinC}\intt0tvi(τ)\,dτ
The bounds and initial condition are essential. A constant input produces a ramp with slope -vi/(RinC).
An ideal integrator has infinite DC gain, so tiny offsets eventually cause saturation. A practical integrator places resistor Rf in parallel with C. Its transfer function is
\frac{Vo(s)}{Vi(s)}=-\frac{Rf/Rin}{1+sRfC}
For f\gg 1/(2πRfC), it approximates an integrator. Below this corner, its gain approaches the finite value -Rf/Rin.
Example. Let Rin=10\text{ kΩ}, C=100\text{ nF} and Rf=1\text{ MΩ}. The low-frequency corner is
fL=\frac{1}{2πRfC}=1.59\text{ Hz}
A 0.20 V constant input in the integration region produces an idealized ramp slope of
The circuit approximates differentiation only for frequencies well below both poles:
f\ll\min(f1,f2)
If f1<f2, the response is approximately constant between the poles and decreases above f2. It is therefore incorrect to describe the interval between the poles as the differentiating region for this transfer function.
For Rf=100\text{ kΩ}, C1=10\text{ nF}, R1=10\text{ kΩ} and Cf=100\text{ pF}, the poles are approximately 1.59 kHz and 15.9 kHz. Differentiation should be used sufficiently below 1.59 kHz.
5. Comparators and Hysteresis
A comparator intentionally operates open-loop. Ideally,
where VOH and VOL are the high and low output levels. A zero-crossing detector uses 0 V as the reference.
Noise near the switching threshold can cause repeated transitions. A Schmitt trigger uses positive feedback to create hysteresis. For a symmetric inverting Schmitt trigger with the non-inverting input receiving a fraction β of the output,
VUT=βVOH,\qquad VLT=βVOL
If the output saturates symmetrically at ±VS, the thresholds are ±βVS and the hysteresis width is 2βVS.
General-purpose op-amps may recover slowly from saturation and may have unsuitable input or output structures. High-speed switching applications should use dedicated comparators.
6. Active Filters
Active filters combine resistors, capacitors and amplifiers to obtain gain and frequency selectivity without inductors. Their accuracy depends on component tolerances, op-amp bandwidth and loading.
6.1 First-order filters
An inverting low-pass filter uses Rf in parallel with feedback capacitor Cf:
Its high-frequency gain approaches -Rf/Rin. Cascading a high-pass and low-pass section produces a band-pass response when the high-pass corner is below the low-pass corner.
6.2 Second-order response
A standard second-order low-pass section has
H(s)=\frac{Kω02}{s2+(ω0/Q)s+ω02}
where K is DC gain, ω0 is natural angular frequency in rad/s, and Q is the quality factor. For a Butterworth response, Q=1/\sqrt{2}\approx0.707, giving a maximally flat passband.
For the standard equal-component Sallen–Key low-pass topology, with R1=R2=R, C1=C2=C and non-inverting amplifier gain K,
These relations apply specifically to that equal-component topology. The amplifier gain is implemented as K=1+Rf/Rg.
Butterworth design example. Design a 1 kHz equal-component Sallen–Key section using 10 nF capacitors:
R=\frac{1}{2π(1000)(10\text{ nF})}=15.9\text{ kΩ}
For Butterworth response,
K=3-\frac{1}{Q}=3-\sqrt{2}=1.586
Choosing Rg=10.0\text{ kΩ} requires approximately Rf=5.86\text{ kΩ}. The section has a DC gain of 1.586; if unity overall gain is required, another stage can attenuate the signal, or a unity-gain topology with unequal components can be designed.
The op-amp gain-bandwidth product should substantially exceed the filter’s characteristic frequency multiplied by the relevant noise gain. Simulation should be followed by tolerance and stability analysis.
7. Precision Rectifiers
A silicon diode’s forward drop makes ordinary rectifiers inaccurate for millivolt signals. A precision rectifier places the diode within an op-amp feedback loop so that feedback compensates for the forward drop while the diode conducts.
7.1 Precision half-wave rectifier
In an inverting precision half-wave topology, a feedback diode selects the conducting polarity. When it conducts, the closed-loop output is
v1=-\frac{Rf}{Rin}vi
For the opposite polarity, the selected output is approximately zero. Diode orientation determines which half-cycle is passed. A second diode is often added to maintain feedback during the nominally blocked half-cycle and prevent deep op-amp saturation.
7.2 Full-wave absolute-value circuit
A two-op-amp circuit can combine a unity-gain precision half-wave stage with a weighted summer. Suppose the first stage produces
v1=\begin{cases}-vi,&vi>0\\0,&vi<0\end{cases}
and the second stage is designed for
vo=-vi-2v1
Then vo=vi for positive input and vo=-vi for negative input, so
vo=|vi|
The weighted summer can use feedback resistance R, input resistance R for vi, and input resistance R/2 for v1. Practical accuracy is limited by op-amp bandwidth, slew rate, diode switching, output saturation recovery, resistor matching and input common-mode range.
8. Practical Op-Amp Limitations
8.1 Finite gain and bandwidth
A dominant-pole op-amp is often approximated by
A(s)=\frac{A0}{1+s/ωp}
where A0 is DC open-loop gain and ωp is the dominant-pole frequency. The unity-gain frequency is approximately fT=A0fp. For a stable voltage-feedback op-amp,
fCL\approx\frac{fT}{\text{noise gain}}
The non-inverting noise gain is 1+Rf/Rg. For an inverting amplifier it is 1+Rf/Rin, even though the signal gain is -Rf/Rin.
8.2 Slew rate
Slew rate is the maximum output slope:
SR=\max\left|\frac{dvo}{dt}\right|
For a sinusoid of peak amplitude Vp and frequency f, avoiding slew-rate distortion requires
SR\ge 2πfVp
A 10 V peak sinusoid at 20 kHz requires SR\ge1.26\text{ V/μs}.
8.3 Input offset and bias current
Input offset voltage VOS is the differential voltage required to force zero output. Its output effect is multiplied by the circuit’s noise gain.
Bias-current errors are topology-dependent and should not be estimated with an undefined generic expression. Consider an inverting amplifier with Rin connected to an ideal zero-voltage source, Rf in feedback, and compensation resistor Rb from the non-inverting input to ground. If currents IB+ and IB- are defined as entering the op-amp inputs, one consistent offset model gives
The sign of the VOS term depends on the chosen offset-voltage polarity convention; error magnitudes are normally used in worst-case design. Choosing
Rb=Rin\parallel Rf
cancels the nominal effect of equal bias currents. Residual error remains because the two currents differ; this difference is the input offset current. Source resistance, leakage and temperature must also be included in precision designs.
8.4 Noise
Important noise sources include op-amp input voltage-noise density en, input current-noise density in, resistor thermal noise and external interference. A resistor produces an RMS open-circuit thermal-noise voltage over bandwidth B:
vn,R=\sqrt{4kTRB}
where k=1.381×10-23\text{ J/K}, T is absolute temperature in kelvin, R is resistance in ohms and B is noise bandwidth in hertz. Uncorrelated RMS noise contributions are combined by the root-sum-square method, after each has been transferred to the same circuit node.
8.5 Input and output restrictions
Designers must verify:
input common-mode voltage range;
output swing for the actual load;
supply voltage and polarity;
maximum output current;
input differential-voltage limits; and
power dissipation.
“Rail-to-rail” input and output specifications are load- and supply-dependent, not absolute guarantees that every signal can exactly reach both rails.
8.6 Stability
Negative feedback becomes effectively positive if loop phase shift approaches 180° while loop gain remains at least unity. Phase margin measures the separation from this condition. Low phase margin causes ringing or oscillation.
Capacitive loads, breadboard parasitics, long cables and poorly placed bypass capacitors can reduce stability. Good practices include local supply bypassing, short feedback paths, ground-plane control, an output isolation resistor for capacitive loads, and using only data-sheet-approved gains. A decompensated op-amp may require a specified minimum noise gain.
9. Illustrative Case: Bridge-Sensor Signal Conditioning
Background and problem
A fictional industrial monitoring system uses a resistive bridge that produces a differential signal from 2 mV to 20 mV. The bridge has a common-mode voltage near 1.65 V and is connected to a 3.3 V, 12-bit analog-to-digital converter (ADC). The desired chain must reject common-mode interference, add a 0.5 V level shift and suppress high-frequency noise.
Analysis and approach
A three-op-amp instrumentation amplifier is selected because of its high input resistance and common-mode rejection. A differential gain of 100 produces
Adding a 0.5 V reference through the amplifier’s reference terminal gives
vo=100vd+0.5\text{ V}
The correct output range is therefore 0.7 V to 2.5 V—not 0.5 V to 2.5 V. Both endpoints lie within the ADC range, but the selected amplifier must also support the 1.65 V input common-mode level and the required output swing on a 3.3 V supply.
A 50 Hz first-order buffered low-pass section can use C=100\text{ nF} and
R=\frac{1}{2π(50)(100\text{ nF})}=31.8\text{ kΩ}
If stronger interference rejection is needed, a second-order active filter is preferable, provided its gain is included in the range calculation.
The ADC least significant bit is
LSB=\frac{3.3\text{ V}}{212}=0.806\text{ mV}
At gain 100, this corresponds to approximately 8.06 μV referred to the bridge input, excluding noise and ADC errors.
Outcome
The design provides differential amplification, level shifting, filtering and ADC compatibility. Prototype testing must verify offset over temperature, bridge excitation stability, settling time, electromagnetic immunity and behavior under disconnected-sensor conditions.
Learning points
Every gain and offset must be included when determining output range.
Common-mode range and output swing can invalidate an otherwise correct gain calculation.
Filter gain and settling time affect ADC performance.
Calibration can correct predictable gain and offset errors but cannot recover clipped data.
10. Professional Practice and Contemporary Developments
Modern precision op-amps may use auto-zero or chopper stabilization to reduce offset and low-frequency noise. Fully differential amplifiers are increasingly used to drive high-resolution differential ADCs. Integrated analog front ends combine amplification, filtering, multiplexing and diagnostics, while digitally programmable gain supports adaptive measurement ranges.
Computer-aided design and AI-assisted component selection can rapidly compare parts and simulate tolerances, but generated recommendations must be checked against current data sheets, stability requirements and worst-case operating conditions.
In safety-critical, medical and metering applications, designers must maintain calibration traceability, document uncertainty and follow applicable standards. Protection networks should not compromise patient or equipment safety, and software calibration must not conceal saturation, sensor faults or out-of-range operation. Responsible design includes fault detection, testability and transparent recording of calibration coefficients.
Chapter Summary
An op-amp uses high differential gain and feedback to implement accurate analog operations. Ideal analysis yields the inverting, non-inverting, summing, difference and instrumentation-amplifier equations, while practical design requires verification of common-mode range, output swing, bandwidth, slew rate, offset, bias current, noise and stability.
Integrators and differentiators perform time-domain operations but require frequency limiting to avoid drift or noise amplification. Comparators use open-loop operation, often with hysteresis. Active filters provide controlled frequency response; their component equations depend on the selected topology. Precision rectifiers compensate diode forward voltage through feedback. Successful signal conditioning integrates gain, offset, filtering, range analysis, data-converter requirements and worst-case verification.
Key Terms
Operational amplifier: High-gain differential amplifier intended for feedback applications.
Open-loop gain: Gain of an op-amp without external feedback.
Negative feedback: Return of an output fraction that opposes the input error.
Virtual short: Approximate equality of op-amp input voltages during linear negative-feedback operation.
Noise gain: Closed-loop gain experienced by input-referred voltage errors and noise.
Common-mode voltage: Average voltage present at both differential inputs.
CMRR: Ratio of differential gain to common-mode gain.
Instrumentation amplifier: Precision differential amplifier with high input resistance and high CMRR.
Integrator: Circuit whose output is proportional to the time integral of its input.
Differentiator: Circuit whose output is proportional to the input’s rate of change.
Comparator: Circuit that switches output state according to the sign of an input difference.
Hysteresis: Separation between rising and falling switching thresholds.
Active filter: Frequency-selective circuit using active devices, resistors and capacitors.
Quality factor: Parameter describing damping or selectivity of a second-order response.
Precision rectifier: Feedback circuit that rectifies signals with greatly reduced diode-drop error.
Input offset voltage: Effective differential input voltage that produces output error.
Slew rate: Maximum rate at which op-amp output voltage can change.
Phase margin: Stability measure based on loop phase at unity loop gain.
Review Questions
Short Answer Questions
State the two ideal op-amp conditions used under stable negative feedback.
Distinguish signal gain from noise gain in an inverting amplifier.
Why is a resistor placed in parallel with the capacitor of a practical integrator?
What is the purpose of hysteresis in a comparator?
Why must resistor ratios be closely matched in a difference amplifier?
Long Answer Questions
Derive the gain equations of inverting and non-inverting amplifiers and state their applicability conditions.
Explain the structure, gain and practical advantages of a three-op-amp instrumentation amplifier.
Compare ideal and practical integrators and differentiators using their transfer functions.
Explain the operation and component design of first- and second-order active low-pass filters.
Discuss how offset, bias current, noise, finite bandwidth and slew rate affect precision amplifier design.
Analytical / Application Questions
Design an inverting amplifier with gain −12 and input resistance 20 kΩ. Determine its output for a 150 mV input and check whether it can operate from ±2.5 V supplies if the specified output swing is ±2.1 V.
Design an equal-component 2 kHz Butterworth Sallen–Key low-pass section using 4.7 nF capacitors. Calculate the required resistance and non-inverting gain.
A bridge produces −5 mV to +15 mV. Develop an instrumentation-amplifier gain and reference-offset strategy that maps this range into 0.2 V to 3.0 V, and identify the practical op-amp specifications that must be verified.
Multiple Choice Questions with Answers
Question 1
An ideal inverting amplifier has Rin=10\text{ kΩ}, Rf=50\text{ kΩ} and vi=0.30\text{ V}. What is the output?
A. −1.50 V
B. −0.06 V
C. +1.50 V
D. +0.30 V
Correct Answer: A. −1.50 V
Question 2
Which condition is required before applying v_+\approx v_- to an op-amp circuit?
A. The op-amp must operate open-loop
B. The circuit must have stable negative feedback and remain unsaturated
C. The output must equal zero
D. Both inputs must be physically connected
Correct Answer: B. The circuit must have stable negative feedback and remain unsaturated
Question 3
A non-inverting amplifier uses Rf=90\text{ kΩ} and Rg=10\text{ kΩ}. Its ideal voltage gain is:
A. 9
B. −9
C. 10
D. −10
Correct Answer: C. 10
Question 4
For the practical differentiator with transfer function H(s)=-sRfC1/((1+sR1C1)(1+sRfCf)), differentiation is approximated when the operating frequency is:
A. Well below both pole frequencies
B. Exactly between the two pole frequencies
C. Well above both pole frequencies
D. Equal to the unity-gain frequency of the op-amp
Correct Answer: A. Well below both pole frequencies
Question 5
A 2–20 mV bridge signal is amplified by 100 and then shifted upward by 0.5 V. What is the output range?
A. 0.5–2.0 V
B. 0.5–2.5 V
C. 0.7–2.5 V
D. 0.7–2.0 V
Correct Answer: C. 0.7–2.5 V
Question 6
For an equal-component Sallen–Key low-pass filter with K=1.586, the quality factor is approximately:
A. 0.500
B. 0.707
C. 1.000
D. 1.586
Correct Answer: B. 0.707
Question 7
A sinusoidal output has a 5 V peak and frequency 100 kHz. What minimum slew rate is required?
A. 0.314 V/μs
B. 1.57 V/μs
C. 3.14 V/μs
D. 31.4 V/μs
Correct Answer: C. 3.14 V/μs
Question 8
In an inverting amplifier, the resistor commonly used to compensate nominally equal input bias currents is selected as:
A. Rb=Rin+Rf
B. Rb=Rin\parallel Rf
C. Rb=Rf-Rin
D. Rb=Rf/Rin
Correct Answer: B. Rb=Rin\parallel Rf
Question 9
What is the principal purpose of placing a diode inside an op-amp feedback loop in a precision rectifier?
A. To increase the diode breakdown voltage
B. To compensate for the diode’s forward-voltage drop while feedback is active
C. To make the op-amp operate without a supply
D. To remove all bandwidth limitations
Correct Answer: B. To compensate for the diode’s forward-voltage drop while feedback is active
Question 10
A 12-bit ADC has a 3.3 V full-scale range. Its ideal least significant bit is approximately: