Single-Stage Transistor Amplifiers

Introduction and context

A transistor amplifier is a circuit that uses the controlled current or voltage capability of a transistor to increase the amplitude of a signal. In a single-stage amplifier, one transistor provides the principal signal gain between an input port and an output port. Although practical systems commonly use cascaded or integrated multistage amplifiers, the single-stage circuit remains the essential unit for understanding gain, biasing, loading, frequency response, noise, distortion, stability, and design trade-offs.

The three fundamental common-terminal configurations of a bipolar junction transistor (BJT) are common-emitter (CE), common-base (CB), and common-collector (CC). Their field-effect-transistor (FET) analogues are common-source, common-gate, and common-drain. The word “common” identifies the terminal that is treated as common to the input and output signal paths, usually through an ac ground.

A useful amplifier must satisfy more than a large voltage gain. Its design may be judged by input resistance, output resistance, current gain, power gain, bandwidth, noise, linearity, bias stability, power consumption, and permissible signal swing. A high-gain circuit can be unsuitable if it has excessive distortion, poor source loading, or inadequate output drive.

Learning objectives

After completing this chapter, the reader should be able to:

1. Explain the operation and terminal behavior of CE, CB, and CC BJT amplifiers.
2. Establish the dc operating point and identify the active-region conditions required for linear amplification.
3. Derive midband voltage gain, current gain, input resistance, and output resistance using the small-signal hybrid-π model.
4. Predict the effects of emitter degeneration, collector loading, source resistance, and load resistance.
5. Explain low- and high-frequency limitations, coupling and bypass capacitors, and the Miller effect.
6. Design and evaluate a single-stage amplifier against gain, swing, bandwidth, noise, and power constraints.
7. Interpret practical measurements and identify departures from ideal small-signal predictions.

1. Amplification, bias, and operating point

A transistor is nonlinear over its full operating range. Linear amplification is obtained by applying a small signal around a suitably selected quiescent, or Q, point. The total transistor voltage and current are represented as

v_CE(t) = V_CEQ + v_ce(t)

and

i_C(t) = I_CQ + i_c(t),

where capital letters denote dc quantities and lowercase letters denote small ac variations. The Q point must remain in the forward-active region during the intended signal excursion. For an NPN BJT, this normally requires a forward-biased base–emitter junction and a reverse-biased collector–base junction.

If the input signal is too large, the transistor may enter cutoff or saturation. Cutoff causes one-sided removal of the waveform; saturation causes the collector voltage to approach its lower limit. Both are forms of nonlinear distortion. A practical design therefore selects a Q point that provides an adequate symmetrical or otherwise application-appropriate output swing.

For a voltage-divider biased CE stage, a common approximate dc analysis is

Here R₁ and R₂ form the base divider, R_C and R_E are collector and emitter resistances, V_CC is the supply voltage, V_BE is approximately 0.7 V for a silicon BJT at ordinary current, and I_C ≈ I_E when base current is small. The approximation is reliable when divider current is sufficiently larger than base current; otherwise the Thevenin equivalent of the divider and the actual transistor β should be used.

Bias stability is improved by emitter resistance. If collector current rises because of temperature or transistor variation, the emitter voltage rises, reducing v_BE and opposing the original increase. This negative feedback improves operating-point stability but usually reduces ac voltage gain unless the emitter resistor is bypassed.

2. Small-signal BJT model

Around the Q point, the BJT can be linearized. The transconductance is

where I_CQ is the quiescent collector current and V_T is the thermal voltage, approximately 25.9 mV at 25 °C. The intrinsic emitter resistance is

The hybrid-π model uses the base-emitter resistance

where β is the small-signal common-emitter current gain. If the Early effect is included, the collector output resistance is approximated by

where V_A is the Early voltage. The model assumes sufficiently small signal excursions, a fixed operating point, and operation in the forward-active region. At high frequency, internal capacitances C_π and C_μ must also be included.

The small-signal model separates dc bias from ac behavior. For midband analysis, dc voltage sources are set to ac ground, coupling and bypass capacitors are treated as short circuits, and transistor parasitic capacitances are initially neglected.

3. Common-emitter amplifier

The CE stage provides substantial voltage and power gain and introduces a phase inversion of approximately 180°. A typical circuit contains a collector resistor, a biased base, an emitter resistor, and an output coupling capacitor. Its small-signal output voltage decreases when the input voltage increases because increasing base voltage increases collector current and therefore increases the drop across the collector resistor.

3.1 Emitter resistor bypassed

If the emitter resistor is effectively bypassed at the signal frequency, the emitter is at ac ground. Neglecting r_o, the intrinsic voltage gain from base to collector is

where R_L is the external load and ∥ denotes parallel combination:

The input resistance looking into the transistor base is approximately r_π. If a bias network is connected to the base, the amplifier input resistance becomes

The voltage gain from a source with resistance R_S is reduced by source division:

The approximate output resistance is R_C, or R_C ∥ r_o when the Early effect is retained. A more complete gain expression includes r_o through the effective collector load.

The base current is approximately i_b = v_b/r_π, while collector current is i_c = g_m v_b. Thus the transistor current gain is approximately β. The overall current gain depends on how input and output currents are defined and on source and load networks; current-gain claims must therefore specify the ports.

3.2 Emitter resistor unbypassed

With an unbypassed emitter resistor R_E, emitter degeneration introduces local negative feedback. Neglecting r_o, the base-to-collector gain is approximately

provided the resistance values and frequency range justify the simplified model. The input resistance looking into the base becomes

and the complete amplifier input resistance includes the bias network in parallel. Emitter degeneration reduces gain but improves linearity, reduces sensitivity to β and temperature, increases input resistance, and often improves bandwidth and signal-handling capability. This is a central engineering trade-off: gain sacrificed locally can produce a more predictable and robust amplifier.

3.3 Bias and gain design example

Consider an illustrative CE amplifier with V_CC = 12 V, R_C = 3.3 kΩ, R_E = 1.0 kΩ, and a designed quiescent current I_CQ = 1.0 mA. Let β = 100, V_T = 25.9 mV, and assume the emitter resistor is unbypassed. Then

and

The collector voltage is approximately

The emitter voltage is approximately V_E = 1.0 V, giving V_CE ≈ 7.7 V, which is safely above saturation for a moderate signal swing. With no external load, the approximate base-to-collector gain is

The result is dimensionless because resistance is divided by resistance. The modest gain is intentional: degeneration improves predictability and linearity. If R_E were bypassed over the operating band, the approximate gain would instead be −g_m R_C ≈ −127, subject to transistor output resistance, capacitor effectiveness, bandwidth, and signal-swing limits.

4. Common-collector amplifier: emitter follower

The common-collector stage takes its output from the emitter. It has voltage gain close to unity, no phase inversion, high input resistance, and low output resistance. It is therefore used as a buffer, impedance transformer, and driver.

For an emitter follower with an effective emitter load R_E'—the parallel combination of the emitter bias resistance, external load, and other ac-connected resistances—the approximate voltage gain from base to emitter is

Equivalently, using r_e, a useful approximation is

The input resistance looking into the base is

and the output resistance is low. An approximate output resistance, when the source is represented by resistance R_S and the bias network is included in the base source resistance R_B, is

The exact value depends on the transistor’s output resistance, load, and test conditions. The emitter follower does not provide large voltage gain, but it can provide useful current gain and isolate a high-resistance source from a low-resistance load.

5. Common-base amplifier

In the common-base stage, the base is at ac ground, the signal enters the emitter, and the output is taken at the collector. The circuit has low input resistance, high voltage gain, high-frequency usefulness, and no phase inversion between emitter current variation and collector voltage in the conventional voltage definition.

Ignoring r_o, the voltage gain from emitter to collector is approximately

The input resistance at the emitter is approximately

The current gain from emitter current to collector current is close to α, where

and α is slightly less than unity. The low input resistance makes the CB stage suitable for current-mode interfaces and wideband circuits, but it can impose heavy loading on a preceding voltage source.

6. Comparison of configurations

The “best” configuration is determined by the interface requirements, not by gain alone. For example, a CE stage may be followed by a CC stage when voltage gain is needed without sacrificing load-driving capability.

7. Frequency response

A real amplifier has finite bandwidth. At low frequencies, coupling and bypass capacitors have high reactance. The magnitude of capacitive reactance is

where f is frequency in hertz and C is capacitance in farads. Each high-pass network formed by a capacitor and its resistance has an approximate lower corner frequency

where R_eq is the resistance seen by the capacitor. The overall low-frequency response is determined by all coupling, bypass, and input-network poles; the corner frequencies should not simply be assumed identical.

At high frequencies, transistor junction capacitances and wiring capacitances reduce gain. In a CE stage, the collector–base capacitance is subject to the Miller effect. A first-order estimate of the input-equivalent capacitance is

where A_v is the voltage gain from base to collector. For an inverting stage, a large negative gain can make the effective input capacitance much larger than the physical C_μ. This increases the input pole and reduces bandwidth.

For a single dominant-pole response, the upper cutoff frequency may be estimated from

The bandwidth is approximately f_H − f_L when the response has well-separated low- and high-frequency limits. Exact multicapacitor behavior requires a complete small-signal frequency analysis or simulation.

8. Distortion, noise, and stability

Linearity and distortion

The exponential BJT relation means that linearity is local, not global. Emitter degeneration reduces the nonlinear contribution of the transistor by making a larger fraction of the input signal appear across a relatively linear resistor. Negative feedback also reduces gain variation and distortion, approximately at the cost of reduced loop gain.

Clipping, crossover-like effects in improperly biased stages, thermal drift, and device mismatch are practical sources of distortion. A design should specify the permissible total harmonic distortion and test it at the required frequency, load, and output amplitude.

Noise

Important noise sources include thermal noise in resistors, shot noise associated with junction currents, and transistor low-frequency flicker noise. Increasing bias current can reduce some voltage-noise contributions associated with transconductance, but it increases power consumption and may increase shot-noise current. Noise matching is not always the same as maximum power matching; the source impedance and the application determine the appropriate design objective.

Stability and parasitic feedback

Unintended feedback through supply impedance, substrate coupling, layout capacitance, and the collector–base capacitance can cause gain peaking or oscillation. Good practice includes local supply decoupling, short high-impedance connections, a carefully defined signal ground, separation of input and output paths, and measurement with probes whose capacitance does not significantly load the node.

9. Practical design procedure

A disciplined design sequence is:

1. Specify supply voltage, source resistance, load resistance, target gain, bandwidth, maximum signal, noise limit, and power budget.
2. Select the transistor and a quiescent current consistent with noise, gain, frequency, and dissipation requirements.
3. Choose the Q point to provide the required output swing without cutoff or saturation.
4. Design the dc bias network and verify sensitivity to β, temperature, and supply variation.
5. Calculate g_m, r_π, and, where necessary, r_o.
6. Calculate loaded gain, input resistance, output resistance, and source attenuation.
7. Select coupling and bypass capacitors from the desired low-frequency limit.
8. Include transistor capacitances and Miller multiplication for high-frequency analysis.
9. Check noise, distortion, power dissipation, stability, and component tolerances.
10. Validate the design using simulation and laboratory measurement, then compare measured behavior with the model.

A small-signal gain prediction is not a substitute for checking large-signal swing. For a CE stage, the collector waveform must remain between its cutoff-side maximum and saturation-side minimum. Likewise, a capacitor that is a short circuit at one frequency may be ineffective at another.

10. Illustrative application case: sensor interface buffer

Background

Consider an illustrative industrial sensor whose output has a source resistance of 100 kΩ. The signal must be delivered to an acquisition circuit with an input resistance of 10 kΩ. Direct connection would produce severe attenuation and could alter the sensor’s calibrated output.

Problem

A voltage-gain stage would unnecessarily load the sensor, while connecting the sensor directly to the acquisition input gives the divider gain

Only about 9.1% of the sensor voltage reaches the load.

Analysis and approach

An emitter follower is selected because its high input resistance reduces source loading and its low output resistance drives the 10 kΩ load. Suppose the transistor operates at I_C = 1 mA, giving r_e ≈ 25.9 Ω. If the effective emitter load is approximately 10 kΩ, the base-to-emitter gain is

The transistor’s intrinsic input resistance is approximately r_π = β/g_m. For β = 100, r_π ≈ 2.59 kΩ, and the emitter-reflected load contributes approximately (β + 1)10 kΩ ≈ 1.01 MΩ. Thus the transistor input is much less burdensome than the original 10 kΩ load, although the bias network must also be designed with sufficiently high resistance.

Outcome

The buffer transfers nearly the full sensor voltage while providing current drive to the acquisition input. In practice, the designer must also check sensor noise, bias-current error, input protection, output swing, startup behavior, electromagnetic compatibility, and whether the acquisition system supplies any dc path required by the transistor bias.

Learning points

The case demonstrates that an amplifier’s value may lie in impedance transformation rather than voltage gain. It also illustrates why source and load resistances must be included in gain calculations and why a nominally unity-gain stage can be the correct engineering solution.

11. Contemporary developments and professional considerations

Discrete single-stage amplifiers remain important in laboratory instrumentation, sensor front ends, RF circuits, education, and the internal design intuition needed for integrated circuits. Modern design increasingly uses compact transistor models, automated bias optimization, statistical Monte Carlo analysis, and electrothermal simulation. AI-assisted circuit synthesis can propose topologies or component values, but its outputs require physical verification, model validation, and compliance review. An optimization objective that maximizes gain alone may produce unacceptable noise, instability, power consumption, or distortion.

Professional design should document assumptions, transistor model versions, temperature range, tolerances, test fixtures, and acceptance criteria. Safety and regulatory issues are generally system-dependent rather than specific to a single low-voltage stage, but isolation, maximum terminal voltage, electromagnetic compatibility, and environmental restrictions must be addressed whenever the stage interfaces with industrial, medical, automotive, or communication equipment.

Challenges and limitations

The formulas in this chapter are first-order design relations. They may become inaccurate when signal excursions are large, β varies substantially, the transistor approaches cutoff or saturation, the load is frequency-dependent, the source is strongly reactive, or parasitic elements dominate. The hybrid-π model is also temperature-dependent, and its parameters must be recalculated when the Q point changes. Simulation models can improve prediction but are not automatically accurate outside their characterization range. Measurement remains necessary.

Chapter Summary

A single-stage transistor amplifier is a biased transistor circuit that provides controlled signal gain around a quiescent operating point. The CE stage is the principal voltage-gain configuration and inverts phase; the CC stage provides high input resistance, low output resistance, and approximately unity voltage gain; the CB stage offers low input resistance and useful wideband behavior. Small-signal parameters such as g_m, r_π, r_e, and r_o connect dc bias to ac performance. Collector and load resistances determine loaded gain, while emitter degeneration trades gain for linearity, stability, and predictable input resistance. Coupling and bypass capacitors control low-frequency response, and transistor capacitances—especially through the Miller effect—limit high-frequency response. Sound design includes bias stability, signal swing, loading, noise, distortion, thermal behavior, layout, and measurement rather than gain alone.

Key Terms

Transistor amplifier: A circuit that uses a transistor to increase signal voltage, current, or power.

Single-stage amplifier: An amplifier containing one principal transistor gain stage.

Quiescent point (Q point): The dc voltage and current operating point about which a signal varies.

Forward-active region: BJT operating region used for approximately controlled-current amplification.

Common emitter (CE): BJT configuration with the emitter common to input and output ac paths.

Common collector (CC): BJT configuration with the collector common; also called an emitter follower.

Common base (CB): BJT configuration with the base common to input and output ac paths.

Transconductance: The small-signal ratio of collector-current change to base-emitter voltage change.

Hybrid-π model: A linear small-signal model of a BJT using parameters such as g_m and r_π.

Emitter degeneration: Negative feedback produced by an unbypassed emitter resistance.

Voltage gain: Ratio of output voltage to input voltage under a stated port definition.

Input resistance: Resistance presented by an amplifier to its source.

Output resistance: Small-signal resistance seen looking back into an amplifier output.

Miller effect: Effective multiplication of a feedback capacitance by voltage gain.

Bandwidth: Frequency range over which amplifier response meets a specified criterion.

Cutoff: BJT condition in which collector current is ideally near zero.

Saturation: BJT condition in which both junctions are forward biased and normal gain control is lost.

Thermal voltage: Voltage V_T approximately equal to 25.9 mV at 25 °C.

Bias stability: Ability of the Q point to remain acceptably constant under variation and temperature.

Review Questions

5 Short Answer Questions

1. Why is a Q point required for linear transistor amplification?
2. State the principal voltage-gain and impedance characteristics of a common-collector stage.
3. Define transconductance and give its BJT expression.
4. What is the purpose of an emitter bypass capacitor?
5. Why does the Miller effect reduce the high-frequency bandwidth of a CE amplifier?

5 Long Answer Questions

1. Derive the approximate midband voltage gain and input resistance of an emitter-degenerated CE amplifier.
2. Explain dc biasing of a voltage-divider biased CE stage and discuss β and temperature sensitivity.
3. Compare CE, CB, and CC amplifiers with respect to gain, impedance, phase, and applications.
4. Explain the low- and high-frequency limitations of a single-stage amplifier.
5. Discuss how noise, distortion, signal swing, and power consumption influence transistor-stage design.

3 Analytical / Application Questions

1. A CE stage has I_CQ = 2 mA, R_C = 2.2 kΩ, and an unbypassed R_E = 470 Ω. Using V_T = 25.9 mV, estimate its unloaded midband voltage gain and explain the assumptions.
2. Design a buffer interface for a 50 kΩ sensor source driving a 5 kΩ load. Justify the choice of topology and identify at least four nonideal effects that must be verified experimentally.
3. A CE amplifier meets its midband gain target but has excessive high-frequency attenuation. Analyze how collector–base capacitance, source resistance, layout, and Miller multiplication may contribute, and propose practical remedies.

Multiple Choice Questions with Answers

Question 1

For a BJT biased at I_CQ = 1 mA and V_T = 25.9 mV, what is the approximate transconductance?

A. 0.00386 S

B. 0.0386 S

C. 0.386 S

D. 38.6 S

Correct Answer: B. 0.0386 S

Question 2

Which BJT configuration is primarily used as a high-input-resistance, low-output-resistance buffer?

A. Common emitter

B. Common base

C. Common collector

D. Differential pair

Correct Answer: C. Common collector

Question 3

An unbypassed emitter resistor generally has which effect in a CE amplifier?

A. Increases gain and decreases linearity

B. Reduces gain and improves linearity

C. Eliminates bias sensitivity completely

D. Creates phase inversion in every configuration

Correct Answer: B. Reduces gain and improves linearity

Question 4

For a CE amplifier with an ideal bypassed emitter, g_m = 0.02 S and R_C ∥ R_L = 2 kΩ, the approximate base-to-collector voltage gain is:

A. −10

B. +10

C. −40

D. +40

Correct Answer: A. −10

Question 5

The approximate intrinsic emitter resistance of a BJT carrying 1 mA at V_T = 25.9 mV is:

A. 2.59 Ω

B. 25.9 Ω

C. 259 Ω

D. 25.9 kΩ

Correct Answer: B. 25.9 Ω

Question 6

Why does a CE stage commonly exhibit phase inversion?

A. An increase in base voltage reduces collector current

B. An increase in base voltage increases the collector voltage directly

C. An increase in base voltage increases collector current and the collector resistor drop

D. The emitter is always connected to an ac signal source

Correct Answer: C. An increase in base voltage increases collector current and the collector resistor drop

Question 7

If a capacitor is part of a high-pass network, increasing its capacitance while resistance remains constant generally:

A. Raises the lower cutoff frequency

B. Lowers the lower cutoff frequency

C. Has no effect on cutoff frequency

D. Makes the transistor enter saturation

Correct Answer: B. Lowers the lower cutoff frequency

Question 8

For β = 100 and g_m = 0.04 S, the approximate hybrid-π resistance r_π is:

A. 25 Ω

B. 250 Ω

C. 2.5 kΩ

D. 40 kΩ

Correct Answer: C. 2.5 kΩ

Question 9

Which condition is most directly associated with waveform clipping in a CE amplifier?

A. The transistor remains well inside the active region

B. The signal drives the transistor into cutoff or saturation

C. The source resistance is zero

D. The bypass capacitor is ideal

Correct Answer: B. The signal drives the transistor into cutoff or saturation

Question 10

In a common-base amplifier, the input signal is normally applied to the:

A. Collector

B. Base

C. Emitter

D. Supply terminal only

Correct Answer: C. Emitter