Sensors, Data Converters, and Mixed-Signal InterfacesIntroduction and ContextAnalog electronics increasingly operates at the boundary between physical phenomena and digital computation. Temperature, pressure, light, acceleration, chemical concentration, acoustic energy, and biological signals are continuous physical quantities. Sensors translate these quantities into electrical signals; signal-conditioning circuits make the signals suitable for measurement; data converters represent them numerically; and mixed-signal interfaces connect analog and digital subsystems while preserving accuracy, timing, and safety. A modern measurement channel is therefore not merely a sensor followed by an analog-to-digital converter (ADC). It is a system involving transduction, excitation, protection, amplification, filtering, sampling, quantization, calibration, digital processing, communication, and power management. Errors may originate in any stage. A high-resolution ADC cannot compensate for a poorly selected sensor, inadequate reference voltage, aliasing, thermal drift, or grounding errors. At postgraduate level, the central design question is not simply “Which converter has the largest number of bits?” It is: “What complete measurement architecture provides the required information with acceptable uncertainty, bandwidth, power, cost, reliability, and safety?” Learning ObjectivesAfter completing this chapter, the reader should be able to: - Explain sensor transduction mechanisms and distinguish sensor performance specifications.
- Design basic sensor-excitation and signal-conditioning circuits.
- Analyse sampling, quantization, ADC and DAC architectures.
- Calculate resolution, quantization error, signal-to-noise ratio, and conversion timing.
- Explain mixed-signal interface problems involving impedance, reference stability, grounding, clocking, and aliasing.
- Select an appropriate converter and interface for a practical instrumentation system.
- Evaluate calibration, uncertainty, reliability, cybersecurity, and ethical issues in sensor systems.
1. Sensors as TransducersA sensor is a device that responds to a physical, chemical, or biological variable. A transducer converts energy or information from one domain to another. In electronics, the output is commonly voltage, current, resistance, capacitance, inductance, charge, frequency, or a digital code. A useful idealized sensor model is y = f(x, θ) + n where x is the measurand, y is the sensor output, θ represents environmental and device parameters, and n is noise. For a locally linear sensor, y ≈ y0 + Sx where S = dy/dx is sensitivity and y0 is the output at the reference input. The linear model is applicable only over the specified operating range; many sensors exhibit saturation, hysteresis, temperature dependence, and nonlinear response. 1.1 Important sensor classificationsSensors may be classified in several complementary ways: | Basis | Categories | Examples |
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| Excitation | Active, passive | Thermocouple; strain gauge | | Output | Analog, digital | Photodiode current; I²C temperature sensor | | Contact | Contact, non-contact | RTD; infrared thermometer | | Transduction | Resistive, capacitive, inductive, piezoelectric, optical, semiconductor | Pressure bridge; MEMS accelerometer | | Measurement | Absolute, gauge, differential | Absolute pressure sensor; differential pressure sensor | | Integration | Discrete, integrated, smart | Discrete thermistor; sensor with ADC and digital interface |
An active sensor generates an electrical signal from the measured energy, as in a thermocouple or photovoltaic cell. A passive sensor requires excitation, as in a resistance temperature detector (RTD), strain gauge, or capacitive sensor. 1.2 Static characteristicsThe most important static characteristics are: - Range: minimum to maximum measurable input.
- Span: upper range value minus lower range value.
- Sensitivity: output change per unit input.
- Resolution: smallest input change that can be distinguished.
- Accuracy: closeness to the accepted reference value.
- Precision: closeness among repeated measurements.
- Linearity: departure from a specified ideal response.
- Hysteresis: different output for increasing and decreasing input at the same input value.
- Repeatability: agreement under the same conditions.
- Drift: change in output or sensitivity with time or environment.
- Response time: time required to reach a specified fraction of the final value.
Accuracy and precision must not be confused. A system may be precise but inaccurate if it has a stable calibration offset. A sensor may be accurate on average but imprecise if its noise is high. For a first-order sensor with time constant τ, the step response is y(t) = yf + [y(0) − yf]e^(−t/τ) where yf is the final output. The output reaches approximately 63.2% of its total change after one time constant and approximately 95% after three time constants. This model is useful for thermal, fluidic, and some mechanical sensors, but not for resonant or strongly nonlinear devices. 1.3 Noise and uncertaintySensor noise may be thermal, shot, flicker, generation-recombination, mechanical, electromagnetic, or quantization noise. For independent random uncertainties, the combined standard uncertainty is often approximated by uc = √(u1² + u2² + ··· + un²) where ui are standard uncertainties. This root-sum-square relationship assumes uncorrelated uncertainty components. Correlated errors require covariance terms. For a resistor at absolute temperature T, the thermal-noise voltage density is vn = √(4kTR) V/√Hz where k is Boltzmann’s constant, R is resistance in ohms, and the expression gives noise density over 1 Hz bandwidth. Over bandwidth B, the rms voltage is vrms = √(4kTRB), assuming an ideal resistor and white noise over the relevant band. 2. Sensor Interfaces and Signal ConditioningThe raw sensor signal is rarely suitable for direct conversion. Signal conditioning may include excitation, amplification, buffering, linearization, filtering, isolation, protection, and multiplexing. 2.1 Resistive sensors and bridgesA resistance sensor can be measured by a voltage divider, constant-current excitation, or a Wheatstone bridge. For a divider containing Rs and known resistor R, with excitation VE, the sensor voltage is Vo = VE Rs/(R + Rs) The divider is simple but its sensitivity depends on both resistances and its output is nonlinear with respect to Rs. A bridge provides a differential output and can reject some common-mode interference. For a quarter-bridge strain-gauge circuit with one active gauge, small-strain approximation gives Vo/VE ≈ (∆R)/(4R) = GF·ε/4 where GF is gauge factor and ε is strain. The approximation assumes ∆R ≪ R and a balanced bridge. Temperature compensation commonly uses a dummy gauge or a full bridge. 2.2 Instrumentation amplifiersInstrumentation amplifiers are used for small differential signals in the presence of common-mode voltage. Their key properties are high input impedance, low input offset, low bias current, high common-mode rejection ratio (CMRR), and accurately programmable gain. For a common three-op-amp instrumentation amplifier, the ideal gain is often written as G = 1 + 2R/RG where R are matched resistors and RG sets the gain. The exact gain depends on the selected topology and resistor matching. CMRR is usually degraded by resistor mismatch, finite amplifier gain, source impedance imbalance, and frequency. The common-mode rejection ratio is CMRR = 20 log₁₀(Ad/Acm) dB where Ad is differential gain and Acm is common-mode gain. A high CMRR specification alone is insufficient; it must be considered across frequency and with realistic source impedances. 2.3 Filtering and anti-aliasingA low-pass anti-alias filter attenuates frequency components above the usable measurement band before sampling. For a first-order RC filter, fc = 1/(2πRC) where R is resistance, C is capacitance, and fc is the −3 dB cutoff frequency. The magnitude response is |H(f)| = 1/√[1 + (f/fc)²] A first-order filter has only 20 dB/decade attenuation, so demanding systems generally use higher-order active or passive filters. The cutoff must be selected jointly with the signal bandwidth, sampling rate, transition band, phase response, and settling requirements. 2.4 Protection and electromagnetic compatibilityInputs may require series resistance, current limiting, transient-voltage suppressors, clamps, common-mode filters, and galvanic isolation. Protection components introduce leakage, capacitance, distortion, and noise. Their effects must be included in the error budget. Shielding and grounding require system-level reasoning. A shield connected at multiple points can create ground-loop currents, whereas a floating shield may provide poor high-frequency protection. Differential signalling reduces sensitivity to common-mode interference, but it does not eliminate errors caused by input overload or inadequate common-mode range. 3. Sampling and QuantizationAn ADC samples a continuous-time signal and maps each sample to a finite code. Sampling is not merely a timing operation; it is a spectral transformation. 3.1 Sampling theoremIf a signal is strictly band-limited to a maximum frequency fmax, uniform sampling permits ideal reconstruction when fs > 2fmax where fs is sampling frequency. The frequency fs/2 is the Nyquist frequency. The strict inequality is important in theory because components exactly at the boundary are not practically recoverable with nonideal filters. Aliasing occurs when frequencies above the Nyquist frequency appear as lower-frequency components. An input sinusoid at frequency fin aliases to a frequency related to |fin − kfs|, where k is an integer chosen to place the result within the first Nyquist zone. Once aliasing has occurred, digital processing cannot uniquely recover the original frequency. 3.2 QuantizationFor an ideal N-bit ADC with input span from 0 to Vref, the code width or least significant bit (LSB) is approximately q = Vref/2N This expression assumes a unipolar converter and defines the nominal voltage interval per code. The ideal quantization error is bounded approximately by ±q/2 for rounding, with rms value σq = q/√12 assuming the quantization error is uniformly distributed and uncorrelated with the signal. The uniform-noise model is less accurate for very small or deterministic signals. The ideal full-scale sinusoidal signal-to-quantization-noise ratio is approximately SNRq ≈ 6.02N + 1.76 dB This result assumes an ideal ADC, a sinusoidal input that uses the available range, and quantization noise distributed across the Nyquist band. Worked Example 1: Resolution and quantization noiseA 12-bit unipolar ADC has a 3.3 V reference. Its nominal code width is q = 3.3/212 = 3.3/4096 ≈ 0.806 mV The rms quantization noise under the uniform-error assumption is σq = 0.806/√12 ≈ 0.233 mV rms The ideal full-scale sinusoidal SNR is SNRq ≈ 6.02(12) + 1.76 = 73.999 ≈ 74.0 dB The actual performance will be lower if thermal noise, reference noise, clock jitter, distortion, or nonlinearities dominate. 3.3 ADC error terminologyImportant ADC specifications include: - Offset error: code displacement at zero input.
- Gain error: slope error after offset correction.
- Differential nonlinearity (DNL): deviation of an individual code width from one LSB.
- Integral nonlinearity (INL): deviation of the transfer characteristic from a reference line.
- Missing codes: absent output codes, often caused by excessive DNL.
- Effective number of bits (ENOB): resolution inferred from measured SNR and distortion.
- Aperture jitter: uncertainty in the sampling instant.
- Throughput: number of conversions per second under stated conditions.
- Settling time: time required for the converter or front end to reach specified accuracy.
For a measured signal-to-noise-and-distortion ratio SNDR, ENOB is commonly estimated by ENOB = (SNDR − 1.76)/6.02 where SNDR is expressed in decibels and the ideal sinusoidal quantization model is used as the reference. 4. ADC Architectures4.1 Flash ADCA flash ADC uses a resistor ladder and many comparators operating in parallel. An N-bit flash converter requires approximately 2N − 1 comparators. It provides very high speed but has substantial area, power, input capacitance, and threshold-matching requirements. It is common in oscilloscopes, radar, broadband communication, and high-speed instrumentation. 4.2 Successive-approximation ADCA successive-approximation register (SAR) ADC contains a sample-and-hold circuit, comparator, digital-to-analog converter, and control logic. It performs a binary search: the most significant bit is tested first, followed by progressively smaller bits. For an N-bit conversion, the ideal binary search requires approximately N comparison decisions, although acquisition and internal timing add overhead. SAR ADCs provide an effective compromise among resolution, speed, power, and cost and are widely used in embedded instrumentation. The input driver must charge the ADC’s sampling capacitor. A driver with insufficient bandwidth or excessive output resistance causes gain error and distortion, especially at high sampling rates. A small RC network at the ADC input can isolate the amplifier from capacitive switching, but its settling time must satisfy the required accuracy. 4.3 Integrating ADCDual-slope integrating ADCs integrate the input for a fixed interval and then integrate an opposite-polarity reference until the integrator returns to zero. The measured time is proportional to the input voltage. Their excellent rejection of periodic interference and high accuracy make them common in digital multimeters, although their conversion speed is low. 4.4 Pipeline ADCA pipeline ADC divides conversion into stages. Each stage resolves some bits, subtracts the corresponding analog estimate, amplifies the residue, and passes it to the next stage. Pipelining provides high throughput and moderate-to-high resolution, but introduces latency and requires careful digital correction, reference design, and stage settling. 4.5 Sigma-delta ADCA sigma-delta ADC oversamples the input, shapes quantization noise toward higher frequencies, and digitally filters and decimates the result. Its strengths are high resolution, excellent in-band noise performance, and relaxed analog anti-alias filtering. Its limitations include latency, a restricted signal bandwidth relative to the sampling clock, and sensitivity to modulator stability and clock quality. Oversampling alone does not guarantee a full improvement of one bit for every fourfold increase in sampling rate in every practical design. That approximate relationship assumes quantization-noise dominance, suitable filtering, and uncorrelated noise. Noise shaping can provide additional improvement but depends on modulator order and stability. 5. Digital-to-Analog ConversionA DAC converts a digital code into an analog voltage or current. Common architectures include binary-weighted resistor, R–2R ladder, current-steering, segmented, and pulse-density or sigma-delta DACs. For an ideal N-bit unipolar DAC with reference Vref, a commonly used code model is Vo = D Vref/(2N − 1) where D is the integer code from 0 to 2N − 1. Some data sheets define the transfer using 2N instead, especially when specifying LSB size or endpoint conventions. Therefore, the manufacturer’s transfer definition must be followed. DAC performance includes resolution, monotonicity, INL, DNL, offset, gain error, glitch impulse, settling time, output compliance, and reference sensitivity. A current-steering DAC is fast but may generate code-transition glitches because current sources do not switch simultaneously. Segmentation reduces the number of simultaneously switching elements and improves monotonicity and glitch performance. A reconstruction filter is often placed after a DAC to remove images caused by the zero-order hold and sampling process. The filter must balance image attenuation, passband flatness, group delay, and settling time. 6. Mixed-Signal InterfacesA mixed-signal interface joins analog circuitry with digital logic. It may be internal to an integrated circuit or distributed across a printed-circuit board and cable assembly. 6.1 Voltage, current, and digital interfacesAnalog interfaces may be single-ended or differential, voltage-mode or current-mode. Digital interfaces may be parallel or serial. Common serial interfaces include SPI, I²C, UART, CAN, and industrial current-loop protocols. Selection depends on distance, speed, number of devices, noise environment, isolation requirements, addressing, error detection, and software support. SPI generally provides high speed and simple framing but uses separate chip-select lines and has no inherent acknowledgement. I²C uses two shared lines and addressing but requires pull-up resistors and has lower speed and more complex electrical rise-time constraints. CAN includes arbitration, error detection, and fault confinement, making it suitable for distributed noisy systems. 6.2 Reference designThe ADC or DAC reference is part of the measurement system. Reference noise, drift, output impedance, decoupling, and load transients directly influence conversion accuracy. A reference should be selected for initial accuracy, temperature coefficient, long-term drift, noise density, dynamic current capability, and compatibility with the converter’s input requirements. In a ratiometric measurement, both sensor excitation and ADC reference derive from the same source. If the sensor output is proportional to excitation, excitation variation may largely cancel. This is useful for resistive bridges and potentiometric sensors, but cancellation is imperfect if the paths have different filtering, loading, or temperature coefficients. 6.3 Grounding and isolationAnalog and digital currents should be controlled through deliberate return paths. Separating grounds without a defined high-frequency return path can increase, rather than decrease, interference. The correct layout depends on converter architecture, package recommendations, current loops, cable shields, and isolation barriers. Isolation may be magnetic, capacitive, optical, or transformer-based. Isolated power, signal isolation, creepage, clearance, common-mode transient immunity, and leakage current must be considered in medical, industrial, and high-voltage systems. 6.4 Clocking and jitterSampling-clock jitter creates voltage error proportional to input slope. For a sinusoid of frequency fin and rms timing jitter σt, a useful approximation for jitter-limited SNR is SNRj ≈ −20 log₁₀(2π fin σt) dB This applies when jitter is small and random and when other errors are neglected. High-frequency, high-amplitude signals are especially sensitive to clock jitter. 7. Calibration and Error BudgetsCalibration establishes the relationship between measured code and the accepted value. A two-point linear calibration can be written as xcal = aC + b where C is the raw code, a is the calibrated scale factor, and b is the calibrated offset. If two reference points (C1, x1) and (C2, x2) are known, then a = (x2 − x1)/(C2 − C1) and b = x1 − aC1. This method corrects offset and gain but not curvature, hysteresis, noise, or time-varying drift. A rigorous design uses an error budget. Typical components include sensor sensitivity tolerance, excitation error, amplifier offset and noise, resistor mismatch, reference error, ADC INL and quantization, temperature drift, interference, and calibration uncertainty. Errors should be classified as random or systematic, correlated or independent, and static or dynamic. 8. Worked System ExampleConsider a strain-gauge bridge with excitation of 5.000 V and a full-scale differential output of 10 mV. An instrumentation amplifier provides gain 100, and a 16-bit ADC has a ±2.5 V differential input range. The amplified full-scale signal is VADC,FS = 100 × 10 mV = 1.000 V Thus, only 1.000 V of the available 5 V peak-to-peak differential range is used. If the ADC input is bipolar with total span 5 V, the nominal code width is q = 5/216 ≈ 76.3 µV Referred to the bridge input, this corresponds ideally to qin = 76.3 µV/100 ≈ 0.763 µV However, this calculation does not prove that the system resolves 0.763 µV. Amplifier input noise, bridge thermal noise, reference error, offset drift, interference, and ADC noise may be larger. A better design may increase gain, use a narrower ADC range, or employ a low-noise sigma-delta ADC, provided overload and settling constraints remain satisfied. 9. Illustrative Case Study: Industrial Temperature and Pressure NodeBackgroundConsider an illustrative industrial process node measuring pipeline pressure and bearing temperature. The node must operate near a motor, communicate over 20 m of cable, and provide reliable alarm decisions. ProblemA preliminary design connected a pressure-bridge output directly to a microcontroller ADC and used a long single-ended cable for the temperature signal. Field measurements showed unstable low-order bits, false alarms during motor starts, and temperature readings that varied with cable routing. AnalysisThe pressure bridge produced a millivolt-level differential signal, making it vulnerable to amplifier offset, common-mode interference, and reference variation. The cable acted as an antenna and shared return impedance with motor currents. The ADC input also lacked an anti-alias filter. Motor-start transients therefore entered the analog chain and were sampled as false low-frequency signals. Approach and solutionThe revised architecture used a full-bridge pressure sensor with ratiometric excitation, a low-noise instrumentation amplifier, a differential second-order low-pass filter, and a sigma-delta ADC placed near the sensor. The temperature channel used a three-wire RTD with precision current excitation and lead-resistance compensation. Digital communication was isolated from the noisy motor controller. Shield termination, cable routing, transient protection, and a defined return-current path were specified at system level. Calibration used two pressure references and three temperature points to quantify residual nonlinearity. Firmware rejected physically impossible rate-of-change events, recorded diagnostic flags, and distinguished sensor disconnection from a valid extreme measurement. OutcomeThe revised design reduced susceptibility to common-mode interference and prevented motor-start transients from being interpreted as process changes. More importantly, it made uncertainty visible: each reported measurement included a diagnostic status, calibration date, and operating-range check rather than presenting every numerical code as equally trustworthy. Learning points- Converter resolution cannot repair poor analog architecture.
- Ratiometric design is effective when excitation and reference errors are correlated.
- Cable, grounding, isolation, and protection are part of the measurement circuit.
- Alarm logic should use validated measurements and diagnostic states.
- Calibration must be supported by a traceable reference and documented uncertainty.
10. Design Trade-offs and Contemporary DevelopmentsHigher resolution generally requires greater conversion time, lower noise, more power, or more demanding layout. Higher sampling speed may reduce available resolution and increase digital switching interference. Integrated smart sensors simplify design by including amplification, conversion, calibration, and diagnostics, but they can reduce transparency and introduce dependence on proprietary protocols. MEMS sensors increasingly combine mechanical structures, capacitive or piezoresistive readout, compensation, and digital interfaces. Time-to-digital and frequency-output sensors can be attractive where voltage drops and electromagnetic interference are problematic. Edge processing permits local filtering, feature extraction, and anomaly detection, reducing communication bandwidth. Artificial intelligence can assist with sensor fusion, fault detection, and nonlinear calibration. However, data-driven calibration must not conceal physical failure modes. Training data may omit rare but safety-critical conditions, and an AI estimator should not replace independent limits, plausibility checks, and fail-safe control paths. For safety-related applications, model validation, traceability, explainability, and controlled updates are essential. 11. Governance, Safety, and Ethical ConsiderationsSensor systems can influence medical treatment, industrial shutdowns, energy management, and public infrastructure. Designers must therefore address: - electrical and functional safety;
- calibration traceability and measurement uncertainty;
- electromagnetic compatibility and regulatory testing;
- privacy when sensors collect personal or location data;
- cybersecurity of digital interfaces and firmware updates;
- secure handling of calibration constants and device identities;
- fail-safe behaviour during sensor disconnection, saturation, or communication loss;
- accessibility and avoidance of biased automated decisions.
A sensor reading is evidence, not necessarily truth. Responsible systems communicate validity, uncertainty, timestamp, calibration state, and fault status. Data integrity includes both the analog measurement chain and the digital record. Best-Practice Design Workflow- Define the measurand, range, bandwidth, environment, allowable uncertainty, and safety consequences.
- Select the transducer and excitation method.
- Build an error budget before choosing converter resolution.
- Design protection, amplification, filtering, and impedance interfaces together.
- Select ADC or DAC architecture according to bandwidth, latency, noise, power, and cost.
- Verify reference, clock, grounding, return paths, and isolation.
- Analyse aliasing and settling under worst-case conditions.
- Plan calibration, diagnostics, production testing, and field maintenance.
- Validate with representative interference, temperature, vibration, supply variation, and fault conditions.
- Document assumptions, limits, uncertainty, and regulatory requirements.
Chapter SummarySensors convert physical quantities into electrical information, but a complete measurement system also requires excitation, conditioning, filtering, conversion, calibration, communication, and diagnostics. Sensor quality is described through range, sensitivity, resolution, accuracy, precision, linearity, hysteresis, drift, and dynamic response. Resistive bridges and instrumentation amplifiers are central to low-level measurement, while filtering and protection determine practical robustness. Sampling requires adequate bandwidth control and a sampling rate greater than twice the highest relevant signal frequency. Quantization introduces an LSB-sized interval and, under stated assumptions, an rms error of q/√12. ADC architectures offer different compromises among speed, resolution, power, latency, and complexity. DACs require attention to monotonicity, glitches, settling, and reconstruction filtering. Mixed-signal performance depends strongly on references, clock jitter, grounding, impedance, isolation, electromagnetic compatibility, and layout. Calibration corrects selected systematic errors but does not remove noise or all nonlinearities. At postgraduate design level, the appropriate objective is a traceable, diagnosable, safe, and application-appropriate measurement channel rather than maximum nominal resolution. Key TermsSensor: A device that responds to a physical, chemical, or biological measurand. Transducer: A device that converts energy or information between domains. Sensitivity: Change in output per unit change in input. Resolution: Smallest distinguishable change in the measured input. Accuracy: Closeness of a measurement to an accepted reference value. Precision: Agreement among repeated measurements. Hysteresis: Dependence of output on the direction of input variation. Drift: Change in sensor or circuit characteristics with time or environment. Instrumentation amplifier: A precision differential amplifier with high input impedance and high common-mode rejection. CMRR: Ratio of differential gain to common-mode gain, usually expressed in decibels. Aliasing: Misrepresentation of higher-frequency input components as lower-frequency components after sampling. Nyquist frequency: One-half of the sampling frequency. Quantization: Mapping of continuous-valued samples to discrete numerical levels. LSB: The nominal code width of a digital converter. INL: Deviation of a converter transfer characteristic from a specified ideal line. DNL: Deviation of an individual code width from the ideal code width. ENOB: Effective number of bits inferred from measured converter performance. Ratiometric measurement: Measurement in which sensor output and converter reference share a related excitation. Calibration: Establishment and adjustment of the relationship between indication and reference value. Mixed-signal interface: Circuitry that transfers information between analog and digital domains. Review QuestionsShort Answer Questions- Distinguish accuracy from precision and provide one example of each.
- Why is an anti-alias filter placed before an ADC?
- Define ADC offset error, gain error, INL, and DNL.
- State two advantages of an instrumentation amplifier.
- Why can a high-resolution ADC still produce inaccurate measurements?
Long Answer Questions- Explain the complete signal path from a physical measurand to a digital measurement, including excitation, conditioning, sampling, conversion, calibration, and communication.
- Compare flash, SAR, integrating, pipeline, and sigma-delta ADCs in terms of speed, resolution, power, latency, and applications.
- Derive the nominal LSB size and ideal quantization-noise relationship for an N-bit unipolar ADC, stating the assumptions.
- Discuss grounding, shielding, isolation, reference design, and clocking in a mixed-signal printed-circuit board.
- Explain how an error budget and calibration plan should be developed for an industrial sensor node.
Analytical / Application Questions- A 14-bit ADC operates from a 2.048 V reference. Calculate its nominal code width and ideal full-scale sinusoidal quantization SNR. State the assumptions behind the SNR estimate.
- A sensor output contains useful information up to 8 kHz and an unwanted interferer at 31 kHz. Propose a sampling and anti-aliasing strategy for a 20 kHz sampling system, and explain whether the proposed system is adequate.
- Design a conceptual interface for a millivolt-level bridge sensor located 15 m from a controller in a motor environment. Justify the choices of signalling, amplification, filtering, protection, isolation, reference arrangement, calibration, and diagnostics.
Multiple Choice Questions with AnswersQuestion 1A 12-bit unipolar ADC with a 3.3 V reference has an approximate LSB size of: A. 0.806 mV B. 3.3 mV C. 12.1 mV D. 76.3 µV Correct Answer: A. 0.806 mV Question 2Which ADC architecture normally performs a binary search using a DAC and comparator? A. Flash ADC B. Successive-approximation ADC C. Dual-slope integrating ADC D. Pipeline ADC Correct Answer: B. Successive-approximation ADC Question 3Aliasing is most directly prevented by: A. Increasing amplifier offset B. Removing the ADC reference C. Filtering input components above the usable Nyquist band D. Using a lower-resolution ADC Correct Answer: C. Filtering input components above the usable Nyquist band Question 4For a first-order RC low-pass filter, the cutoff frequency is: A. 2πRC B. R/C C. 1/(RC)² D. 1/(2πRC) Correct Answer: D. 1/(2πRC) Question 5The ideal full-scale sinusoidal quantization SNR of an N-bit ADC is approximately: A. 3.01N dB B. 6.02N + 1.76 dB C. 20N dB D. N/6.02 dB Correct Answer: B. 6.02N + 1.76 dB Question 6A principal advantage of a sigma-delta ADC is: A. No need for a clock B. Very high in-band resolution through oversampling and noise shaping C. Zero conversion latency D. Use of only one comparator without digital filtering Correct Answer: B. Very high in-band resolution through oversampling and noise shaping Question 7CMRR describes an amplifier’s ability to reject: A. Differential signal B. Quantization noise only C. Common-mode signal D. Reference voltage Correct Answer: C. Common-mode signal Question 8For independent uncertainty components, the usual combined standard uncertainty is calculated by: A. Adding all components algebraically without signs B. Taking the root sum of squares C. Multiplying all components D. Using only the largest component Correct Answer: B. Taking the root sum of squares Question 9In a ratiometric measurement, sensor excitation and ADC reference are related primarily so that: A. All sensor noise becomes zero B. Correlated excitation variation can partially cancel C. The ADC no longer requires sampling D. The sensor becomes digital without conversion Correct Answer: B. Correlated excitation variation can partially cancel Question 10For a sinusoidal input, sampling-clock jitter becomes more damaging when: A. Input frequency increases B. Reference voltage decreases to zero only C. The signal is disconnected D. The ADC has fewer communication pins Correct Answer: A. Input frequency increases
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