Analog & Digital Electronics

Chapter 2
Semiconductor Physics and Device Models

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Semiconductor Physics and Device Models

Introduction

Semiconductor devices form the physical foundation of modern analog and digital electronics. Their operation depends on the controlled movement of charge carriers—electrons and holes—through materials whose electrical conductivity lies between that of conductors and insulators. By introducing impurities, forming interfaces, and applying electric fields, engineers create diodes, transistors, integrated circuits, sensors, and power converters.

This chapter develops the physical concepts required to analyze semiconductor devices. It begins with energy bands and carrier populations, then examines doping, carrier transport, PN junctions, temperature effects, fabrication, device data sheets, and commonly used diode models.

Learning Objectives

After studying this chapter, the reader should be able to:

  1. Explain energy bands, band gaps, intrinsic behavior, and doping.
  2. Distinguish electrons, holes, drift current, and diffusion current.
  3. Describe PN-junction formation, depletion, biasing, and breakdown.
  4. Apply diode equations and calculate current, voltage, and small-signal resistance.
  5. Explain temperature effects and important data-sheet parameters.
  6. Select ideal, piecewise-linear, small-signal, or large-signal models for a circuit.
  7. Relate semiconductor physics to fabrication and practical device reliability.

1. Energy-Band Foundations

An isolated atom has discrete electron energy levels. In a crystal, interaction among a very large number of atoms causes these levels to broaden into nearly continuous energy bands. The two most important bands are:

  • Valence band: normally occupied by bonding electrons.
  • Conduction band: contains electrons able to move through the crystal and contribute substantially to conduction.

The energy interval between the top of the valence band and the bottom of the conduction band is the band gap, denoted by Eg. At thermal equilibrium, the probability that an energy state E is occupied is described by the Fermi–Dirac function:

f(E) = 1 / [1 + exp((E − EF)/(kT))]

Here, EF is the Fermi level, k = 1.381 × 10-23 J/K is Boltzmann’s constant, and T is absolute temperature in kelvin. The function gives occupation probability, not carrier concentration directly.

In conductors, a band is partially filled or bands overlap, so carriers move readily. In insulators, the band gap is large. In semiconductors, the band gap is sufficiently small that thermal energy can generate a useful population of carriers. Silicon has Eg ≈ 1.12 eV at room temperature; the gap varies with temperature.

2. Intrinsic and Extrinsic Semiconductors

2.1 Intrinsic material

A pure semiconductor is called intrinsic. Thermal energy can promote electrons from the valence band into the conduction band, leaving vacancies called holes. Electron–hole pairs are generated together, so the intrinsic electron and hole concentrations are equal:

n = p = ni

The mass-action relationship at thermal equilibrium is

np = ni2

where n is electron concentration, p is hole concentration, and ni is intrinsic carrier concentration, all measured in cm-3 or m-3 consistently.

For a nondegenerate semiconductor, a useful expression is

ni = √(NC NV) exp(−Eg/(2kT))

where NC and NV are effective densities of states. This relation shows why intrinsic concentration rises strongly with temperature.

2.2 Doping

Doping introduces controlled impurity atoms. Pentavalent donor atoms, such as phosphorus in silicon, contribute weakly bound electrons and produce n-type material. Trivalent acceptor atoms, such as boron, create holes and produce p-type material.

Under complete ionization and nondegenerate conditions:

  • n-type material: n ≈ ND and p ≈ ni2/ND.
  • p-type material: p ≈ NA and n ≈ ni2/NA.

Here, ND and NA are donor and acceptor concentrations. Charge neutrality is more generally written as

p + ND^+ = n + NA^−

where the superscripts indicate ionized dopants. The approximations above fail at very low temperatures, very high doping, or when compensation is significant.

Doping shifts the Fermi level. In n-type material it moves toward the conduction band; in p-type material it moves toward the valence band. Very heavily doped material may become degenerate, requiring Fermi–Dirac rather than simple Boltzmann approximations.

3. Carrier Transport

Current in semiconductors arises mainly from drift and diffusion.

3.1 Drift

Drift is motion caused by an electric field. Electron and hole current densities are approximately

Jn = q n μn E
Jp = q p μp E

where q = 1.602 × 10-19 C, μn and μp are mobilities, and E is electric-field magnitude. The conventional current direction is opposite to electron motion but in the direction of hole motion.

Mobility generally decreases as lattice scattering increases and also decreases at high impurity concentration. Carrier velocity does not increase indefinitely with field; at high fields, velocity approaches a saturation value. Consequently, the low-field relations are not universal for high-field devices.

3.2 Diffusion

Diffusion results from a concentration gradient. In one dimension:

Jn = q Dn (dn/dx)
Jp = −q Dp (dp/dx)

The signs reflect the opposite charge and motion conventions for electrons and holes. The diffusion coefficients and mobilities are related by the Einstein relation:

Dn/μn = Dp/μp = kT/q = VT

This relation applies under nondegenerate, near-equilibrium conditions. At 300 K, VT = kT/q ≈ 25.85 mV. Total current is the sum of drift and diffusion components.

4. The PN Junction

When p-type and n-type regions are joined, electrons diffuse from the n side into the p side, while holes diffuse from p to n. Recombination near the interface leaves fixed ionized donors and acceptors. This region, depleted of mobile carriers, is the depletion region. Its electric field opposes further diffusion and establishes equilibrium.

4.1 Built-in potential

For an abrupt junction at thermal equilibrium, the built-in potential is

Vbi = VT ln(NA ND/ni2)

This expression assumes nondegenerate material, complete ionization, equilibrium, and uniform doping on each side. It is a potential barrier within the semiconductor; it is not directly equal to the voltage measured across an isolated junction with arbitrary contacts.

For an abrupt junction, the depletion width under applied junction voltage V is

W = √[(2εs/q)(1/NA + 1/ND)(Vbi − V)]

for reverse bias represented by negative V, with the convention that forward bias reduces the barrier. Here εs is semiconductor permittivity. The formula assumes an abrupt, one-dimensional junction and depletion approximation. Reverse bias increases W; forward bias decreases it.

4.2 Bias and the diode equation

With forward bias, the barrier is reduced and minority-carrier injection produces a large current. The ideal large-signal diode equation is

ID = IS [exp(VD/(ηVT)) − 1]

where ID is diode current, IS is reverse saturation current, VD is diode voltage, η is the ideality factor, and VT = kT/q. The ideality factor is a single dimensionless parameter, typically near 1 for diffusion-dominated current and near 2 when recombination in the depletion region dominates. It must not be multiplied by a second symbol representing the same quantity.

The equation is a large-signal model: it relates terminal current and voltage over a specified operating range. It neglects series resistance, high-level injection, breakdown, and parasitic capacitances unless those effects are added separately.

Under reverse bias well below breakdown, the exponential term is negligible and ID ≈ −IS. At sufficiently high reverse voltage, avalanche or Zener breakdown produces a much larger current.

4.3 Junction capacitance

A reverse-biased junction stores charge through its depletion region and behaves approximately as a voltage-dependent capacitor. For an abrupt junction:

Cj = Cj0/√(1 + VR/V0)

where Cj0 is zero-bias junction capacitance, VR is reverse voltage, and V0 is the junction potential parameter. Forward-biased junctions also exhibit diffusion capacitance due to stored minority charge. Capacitances limit switching speed and influence high-frequency analog behavior.

5. Temperature Effects

Temperature affects carrier concentration, mobility, leakage, and junction voltage.

  1. Intrinsic concentration rises rapidly with temperature, increasing reverse leakage.
  2. Mobility generally decreases because lattice vibrations increase scattering.
  3. At a fixed current, a silicon diode’s forward voltage typically decreases by approximately 2 mV/°C near room temperature, although the exact coefficient depends on current and device construction.
  4. VT increases linearly with absolute temperature: at 300 K it is approximately 25.85 mV.
  5. Power dissipation raises junction temperature, potentially causing thermal runaway in some circuits.

A simplified thermal model is

TJ = TA + PD θJA

where TJ is junction temperature, TA ambient temperature, PD device power, and θJA thermal resistance from junction to ambient in °C/W. This is a steady-state approximation and depends strongly on PCB layout, airflow, package, and mounting conditions.

6. Semiconductor Fabrication Fundamentals

Integrated-circuit fabrication begins with a high-purity silicon wafer. Major steps include:

  1. Oxidation: formation of silicon dioxide for insulation or masking.
  2. Photolithography: transfer of geometric patterns from a mask using photoresist and ultraviolet exposure.
  3. Etching: removal of selected material, either chemically or by plasma.
  4. Doping: introduction of impurities by diffusion or ion implantation.
  5. Deposition: addition of dielectric, semiconductor, or metal layers.
  6. Annealing: repair of lattice damage and activation of dopants.
  7. Metallization: formation of electrical interconnects and contacts.
  8. Passivation, testing, dicing, and packaging.

Modern processes use many repeated patterning and planarization steps. Fabrication must control contamination, line width, dopant dose, defects, stress, and thermal budgets. Smaller dimensions improve density and speed but increase sensitivity to leakage, variability, short-channel effects, and process-induced damage.

Environmental and professional responsibilities include chemical handling, waste treatment, worker safety, energy consumption, and responsible disposal of electronic products. Semiconductor engineers must follow process-safety rules and relevant quality standards rather than treating fabrication as purely electrical design.

7. Device Data-Sheet Parameters

A data sheet provides tested limits, typical values, and recommended operating conditions. Important diode parameters include:

ParameterMeaning and design relevance
VRRMMaximum repetitive reverse voltage
IFForward current under specified conditions
IFSMNonrepetitive surge current
VFForward voltage at stated current and temperature
Reverse leakageCurrent at a stated reverse voltage and temperature
trrReverse-recovery time for switching operation
CjJunction capacitance, often voltage dependent
PDPower dissipation under specified thermal conditions
TJPermitted junction-temperature range
θJAJunction-to-ambient thermal resistance
VBRBreakdown voltage under stated test conditions

Absolute maximum ratings are not normal design targets. Exceeding them may cause immediate or cumulative damage. Typical curves are informative, not guaranteed limits. Designers should check test conditions, tolerances, temperature, package constraints, pulse duration, and whether parameters are minimum, maximum, or typical values.

8. Diode Models

A model is an approximation selected for a purpose. No single model is best for every analysis.

8.1 Ideal model

An ideal diode is a short circuit when forward biased and an open circuit when reverse biased. It is useful for determining conduction paths and logic behavior, but it predicts zero forward voltage and zero loss, which are not physically exact.

8.2 Constant-voltage or piecewise-linear model

A practical first approximation uses a threshold voltage V_γ:

  • off: ID = 0 when the applied voltage is below the threshold;
  • on: VD ≈ V_γ with current determined by the external circuit.

A silicon diode is often approximated as 0.7 V at moderate current, but this is not a universal constant. A piecewise-linear model may add a dynamic resistance:

VD ≈ V_γ + ID rf

where rf is an approximate forward slope resistance.

8.3 Large-signal exponential model

The exponential equation is appropriate when current varies over a substantial range and temperature and ideality factor matter. For a circuit containing a series resistor R and supply VS, the operating point satisfies

VS = ID R + VD

combined with the diode equation. This generally requires numerical or graphical solution.

8.4 Small-signal model

For a small AC perturbation around a DC operating point, linearization gives the diode incremental resistance:

rd = dVD/dID = ηVT/(ID + IS) ≈ ηVT/ID

The approximation applies when forward current is much greater than IS. The small-signal model is valid only for sufficiently small changes around the selected operating point. It should not be used to predict large switching excursions.

9. Worked Examples

Example 1: Intrinsic carrier concentration and doping

A silicon sample at 300 K has ni = 1.0 × 1010 cm-3 and is doped with ND = 1.0 × 1016 cm-3. Assuming complete ionization and negligible compensation:

n ≈ ND = 1.0 × 1016 cm-3

Using mass action,

p = ni2/n = (1.0 × 1010)2/(1.0 × 1016) = 1.0 × 104 cm-3

The material is strongly n-type, and electrons are the majority carriers.

Example 2: Small-signal resistance

At 300 K, a diode carries ID = 1.00 mA and has η = 1. With VT = 25.85 mV,

rd ≈ ηVT/ID = (1)(25.85 mV)/(1.00 mA) = 25.85 Ω

A 1 mV small-signal voltage change therefore produces approximately 1 mV/25.85 Ω = 38.7 μA incremental current, provided the perturbation is sufficiently small.

Example 3: Thermal limit

A package has TA = 40 °C, θJA = 50 °C/W, and dissipates PD = 1.2 W. Then

TJ = 40 + (1.2)(50) = 100 °C

If the specified maximum junction temperature is 150 °C, the steady-state thermal limit is not exceeded in this simplified calculation. Transients, airflow, and board construction must still be considered.

10. Applied Case: Selecting a Rectifier Diode

Background. An engineer must select a diode for a 24 V DC supply feeding a capacitive load. The load current is 0.8 A, and the circuit may experience a 60 V reverse transient.

Problem. A device must tolerate normal current, startup surge, reverse voltage, heat, and switching conditions.

Analysis. The engineer should not select a part solely from its nominal forward voltage. The data sheet must be checked for repetitive reverse-voltage rating with suitable margin, average forward-current rating at the actual thermal condition, surge-current rating, forward voltage at 0.8 A, reverse leakage, recovery time, and package thermal resistance. If the diode is used at high switching frequency, reverse recovery and junction capacitance may dominate losses.

Approach. Select a diode whose guaranteed reverse rating exceeds the worst-case transient with an engineering margin; verify that its thermal model keeps junction temperature below the maximum; add transient suppression or snubbing if needed; and test startup and fault conditions. A Schottky diode may reduce forward loss but usually has higher leakage and lower reverse-voltage capability than many PN diodes.

Outcome. The correct selection is a system-level decision involving electrical, thermal, transient, reliability, and cost constraints. The data sheet’s test conditions must match the intended application.

Learning points. Ratings are conditional, typical values are not guarantees, and a physically appropriate device model depends on whether the design question concerns DC conduction, small-signal behavior, switching, or thermal stress.

11. Limitations and Contemporary Developments

Simple models omit effects such as series resistance, distributed resistance, recombination, high-level injection, breakdown, parasitic inductance, self-heating, and parameter variation. Power-device analysis may require electrothermal simulation; high-frequency design requires capacitance and charge models; precision circuits require statistical process and mismatch analysis.

Contemporary semiconductor engineering uses silicon carbide and gallium nitride for high-voltage and high-frequency power conversion, compound semiconductors for optoelectronics and radio frequency systems, and three-dimensional structures for improved electrostatic control. These technologies introduce new interface, reliability, packaging, and thermal challenges. Artificial intelligence can assist process monitoring and circuit optimization, but its results require physical validation, traceable data, and engineering review.

Chapter Summary

Semiconductor behavior is governed by energy bands, carrier populations, doping, and transport. Intrinsic material has equal electron and hole concentrations, while doping creates majority and minority carriers subject to charge neutrality and the mass-action law. Electric fields produce drift, concentration gradients produce diffusion, and the Einstein relation connects mobility with diffusion under near-equilibrium nondegenerate conditions.

A PN junction forms a depletion region and built-in potential. Forward bias injects carriers and produces exponential current described by the diode equation with one ideality factor, while reverse bias widens depletion and may eventually cause breakdown. Temperature changes intrinsic concentration, mobility, leakage, forward voltage, and thermal limits. Fabrication uses repeated oxidation, lithography, etching, doping, deposition, annealing, and metallization steps.

Ideal, piecewise-linear, large-signal, and small-signal models serve different analysis purposes. Data-sheet ratings must be interpreted with their test conditions, tolerances, thermal constraints, and absolute-limit status. Sound design combines physical understanding, appropriate modeling, numerical verification, and safe operating margins.

Key Terms

Energy band: Range of allowed electron energies in a crystal.

Band gap: Energy separation between conduction and valence bands.

Fermi level: Energy associated with the occupation probability of electronic states.

Intrinsic semiconductor: Pure semiconductor with equal electron and hole concentrations.

Doping: Intentional addition of impurity atoms.

Donor: Impurity that contributes an electron to the conduction process.

Acceptor: Impurity that creates a hole.

Majority carrier: Carrier present in higher concentration.

Minority carrier: Carrier present in lower concentration.

Drift: Carrier motion caused by an electric field.

Diffusion: Carrier motion caused by a concentration gradient.

Depletion region: Junction region depleted of mobile carriers.

Built-in potential: Equilibrium potential barrier of a PN junction.

Reverse saturation current: Parameter describing the low reverse-current scale of a diode.

Ideality factor: Dimensionless factor describing deviation from ideal exponential behavior.

Junction capacitance: Capacitance associated with depletion charge.

Breakdown: High-field reverse conduction mechanism.

Small-signal model: Linearized model about a bias operating point.

Thermal resistance: Temperature rise per unit dissipated power.

Absolute maximum rating: Specified limit that must not be exceeded.

Review Questions

Short Answer Questions

  1. What distinguishes an intrinsic semiconductor from an extrinsic semiconductor?
  2. Define drift current and diffusion current.
  3. Why does a depletion region form at a PN junction?
  4. What is the physical meaning of the ideality factor?
  5. Why are absolute maximum ratings different from recommended operating conditions?

Long Answer Questions

  1. Explain energy bands, the Fermi level, and the effect of doping in silicon.
  2. Derive the relationship between electron concentration and hole concentration under mass-action equilibrium.
  3. Describe PN-junction formation and explain the effects of forward and reverse bias.
  4. Compare ideal, piecewise-linear, large-signal, and small-signal diode models.
  5. Explain the principal semiconductor fabrication steps and the purpose of process control.

Analytical / Application Questions

  1. A diode operates at 2 mA at 300 K with ideality factor 1.8. Calculate its approximate small-signal resistance.
  2. A device dissipates 0.75 W in an environment at 35 °C with thermal resistance 80 °C/W. Determine its estimated junction temperature and assess it against a 125 °C limit.
  3. Develop a data-sheet-based selection procedure for a diode used in a 48 V, 2 A switching converter, including voltage, current, thermal, recovery, leakage, and transient considerations.

Multiple Choice Questions with Answers

Question 1

Which statement correctly describes an intrinsic semiconductor at thermal equilibrium?

A. Electron concentration equals hole concentration

B. Donor concentration is always greater than acceptor concentration

C. Only holes contribute to current

D. Its band gap is zero

Correct Answer: A. Electron concentration equals hole concentration

Question 2

For an n-type semiconductor under complete ionization and negligible compensation, which approximation is appropriate?

A. p ≈ N_D

B. n ≈ N_D

C. n ≈ n_i^2/N_A

D. n = p = 0

Correct Answer: B. n ≈ N_D

Question 3

At 300 K, the thermal voltage V_T is approximately:

A. 2.585 μV

B. 0.2585 V

C. 25.85 mV

D. 25.85 V

Correct Answer: C. 25.85 mV

Question 4

What primarily causes the depletion region of an unbiased PN junction?

A. Metallic conduction at the interface

B. Diffusion followed by recombination and exposed fixed ions

C. Avalanche multiplication at zero voltage

D. A permanent external voltage source

Correct Answer: B. Diffusion followed by recombination and exposed fixed ions

Question 5

Which change generally occurs when a PN junction is reverse biased?

A. The depletion width decreases

B. The built-in barrier is eliminated

C. The depletion width increases

D. The junction becomes an ideal short circuit

Correct Answer: C. The depletion width increases

Question 6

A diode carries 1 mA at 300 K, with η = 2 and V_T = 25.85 mV. Its approximate small-signal resistance is:

A. 12.9 Ω

B. 25.9 Ω

C. 51.7 Ω

D. 1.94 kΩ

Correct Answer: C. 51.7 Ω

Question 7

Which diode model is most suitable for linearizing small voltage variations around a specified DC operating point?

A. Ideal switching model

B. Small-signal model

C. Open-circuit model for all biases

D. Constant-power model

Correct Answer: B. Small-signal model

Question 8

A device dissipates 2 W with θ_JA = 40 °C/W in an ambient temperature of 25 °C. The estimated steady-state junction temperature is:

A. 45 °C

B. 65 °C

C. 80 °C

D. 105 °C

Correct Answer: D. 105 °C

Question 9

Which parameter is especially important when evaluating diode switching speed?

A. Reverse-recovery time

B. Lead color

C. Nominal package mass only

D. Zero-bias resistor value

Correct Answer: A. Reverse-recovery time

Question 10

If a silicon device has T_A = 40 °C, P_D = 1 W, and θ_JA = 60 °C/W, its estimated junction temperature is:

A. 60 °C

B. 100 °C

C. 140 °C

D. 240 °C

Correct Answer: B. 100 °C

Analog & Digital Electronics
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