Bipolar Junction Transistors and Biasing

Introduction

The bipolar junction transistor (BJT) remains fundamental to analog amplification, current generation, waveform switching, sensing, and integrated-circuit design. Although field-effect transistors dominate many high-density digital systems, BJTs offer high transconductance per unit bias current and remain important in precision analog, radio-frequency, power-control, and mixed-signal circuits.

A transistor circuit must establish a suitable direct-current operating point before it can process a signal correctly. Biasing determines whether the device operates in cutoff, forward-active, saturation, or breakdown. Because BJT parameters vary with device, current, and temperature, practical bias networks must stabilize operation rather than depend strongly on nominal current gain.

Learning Objectives

After studying this chapter, students should be able to:

• explain NPN and PNP transistor operation;
• distinguish BJT operating regions from junction-bias conditions;
• interpret input and output characteristics;
• construct and apply a DC load line;
• analyze fixed, emitter-feedback, and voltage-divider bias networks;
• assess sensitivity to current gain and temperature;
• analyze simple and Wilson current mirrors;
• design a BJT as a saturated switch;
• use hybrid-π parameters to determine gain and impedance;
• account for Early effect, power dissipation, and thermal stability; and
• design and verify a practical bias network.

1. BJT Structure and Current Relationships

A BJT contains three semiconductor regions: emitter, base, and collector. An NPN transistor contains a thin p-type base between n-type emitter and collector regions; a PNP transistor has the opposite polarities. The emitter is heavily doped to inject carriers, the base is thin and lightly doped, and the collector is designed to collect carriers and withstand reverse voltage.

The terminal currents satisfy Kirchhoff’s current law:

where I_E, I_C, and I_B are emitter, collector, and base currents, respectively, in amperes.

The common-base and common-emitter current gains are defined as

For DC operation, these quantities are often written α_DC and β_DC. Their relationship follows from I_E=I_C+I_B:

Thus, a transistor with β=100 has α=100/101≈0.9901. Current gain β is not a tightly controlled constant; it varies among devices and with collector current, collector-emitter voltage, and temperature.

1.1 Forward-active collector current

When the base-emitter junction is forward biased and the base-collector junction is reverse biased, an NPN transistor operates in the forward-active region. Neglecting Early effect and the small reverse saturation term,

Here:

• I_S is the transistor scale current in amperes;
• V_BE is base-emitter voltage in volts;
• V_T=kT/q is thermal voltage;
• k is Boltzmann’s constant;
• T is absolute temperature in kelvin; and
• q is elementary charge.

At 300 K, V_T≈25.9 mV. The familiar statement that a silicon transistor has V_BE≈0.7 V is only an engineering approximation. The actual value depends logarithmically on current and strongly on temperature.

2. Operating Regions

The operating region is determined by the bias of the base-emitter and base-collector junctions.

For an NPN transistor, forward-active operation ordinarily requires V_C>V_B>V_E. In saturation, the collector voltage falls below the base voltage. Practical switching calculations commonly use V_CE(sat)≈0.1–0.3 V, but the actual value depends on collector current and forced current gain.

Cutoff does not mean mathematically zero current: leakage currents remain. Breakdown is not a normal operating region unless the device is specifically rated for avalanche operation.

3. Output Characteristics and the Early Effect

A family of common-emitter output curves plots collector current against collector-emitter voltage for different base currents. In forward-active operation, each curve is nearly horizontal, indicating approximate current-source behavior. Its slight upward slope is caused by base-width modulation, known as the Early effect.

A useful forward-active model is

where V_A is the Early voltage in volts. This expression assumes forward-active operation and is most useful when V_CE is well above saturation.

The corresponding small-signal output resistance is

where r_o is in ohms when V_A is in volts and I_C is in amperes. More precisely, some models use r_o=(V_A+V_CE)/I_C, but V_A/I_C is common when V_A≫V_CE.

Example: For V_A=100 V and I_C=1 mA,

Figure: BJT output characteristics, Early-effect slope, and a DC load line.

4. DC Load-Line Analysis

A load line represents every collector-current and collector-emitter-voltage pair permitted by the external DC circuit. For an emitter-grounded transistor with collector resistor R_C and supply V_CC,

The cutoff intercept is (V_CE,I_C)=(V_CC,0), while the approximate saturation-axis intercept is I_C=V_CC/R_C.

If an emitter resistor is present,

Using I_E≈I_C when β is large gives the approximate load line

This approximation should not replace the exact expression when β is low or precision is required.

Worked Example: Load line

Let V_CC=12 V, R_C=2 kΩ, and R_E=1 kΩ. With I_E≈I_C, the current-axis intercept is

At I_C=2 mA,

The point (V_CE,I_C)=(6 V,2 mA) is near the middle of the load line and allows approximately symmetrical voltage movement, although maximum undistorted swing must also account for saturation and cutoff boundaries.

5. Biasing Methods and Stabilization

5.1 Fixed-base bias

In a simple fixed-bias circuit, a resistor R_B connects the base to V_CC, the emitter is grounded, and

This circuit is easy to analyze but unsuitable for precision analog bias because collector current is directly proportional to uncertain β and is sensitive to temperature.

5.2 Collector-to-base feedback

Connecting the base resistor to the collector introduces negative feedback. If collector current rises, collector voltage falls, reducing base current. This improves stability but couples the input and output and may reduce gain.

5.3 Emitter feedback

An emitter resistor produces local negative feedback. An increase in current raises emitter voltage, reducing V_BE and opposing the increase. This improves bias stability and linearity, but an unbypassed emitter resistor reduces AC voltage gain.

5.4 Voltage-divider bias

Voltage-divider bias is widely used in discrete common-emitter amplifiers. Replace divider resistors R₁ and R₂ by their Thévenin equivalent:

For an NPN transistor with emitter resistor R_E, assuming forward-active operation and an approximately constant V_BE,

Then

The equations must be checked after calculation: the resulting collector voltage must leave the transistor in forward-active operation.

The collector current can be written

If (β+1)R_E≫R_TH, the result approaches

This is a limiting approximation, not a general formula. It shows why a relatively stiff divider and emitter degeneration reduce dependence on β. A stiffer divider improves bias stability but consumes more power and lowers amplifier input resistance.

6. Current Mirrors

Current mirrors reproduce a reference current and are central to analog integrated circuits. They provide bias currents, active loads, and differential-amplifier tail currents.

6.1 Basic two-transistor mirror

In a matched NPN mirror, the transistors have connected bases and emitters. One transistor is diode-connected, so its collector is joined to its base. If both devices have equal junction temperature and area, they have approximately equal collector currents because their V_BE values are equal.

With equal finite β, Kirchhoff’s current law at the reference node gives

Therefore,

This result assumes matched transistors, equal β, negligible Early effect, and forward-active operation of the output transistor.

For β=98,

Other errors arise from transistor mismatch, unequal temperature, Early effect, resistor tolerance, and insufficient output compliance voltage.

For a resistor-programmed mirror connected to a supply,

This approximation identifies the resistor current, not necessarily the output current; finite base currents make I_O<I_REF.

6.2 Wilson current mirror

A Wilson mirror adds a third transistor and uses negative feedback to reduce systematic base-current error and raise output resistance. Several NPN and PNP Wilson arrangements exist, so exact node labels and closed-form coefficients depend on the selected topology. Their shared operating principle is more important than memorizing a topology-specific formula.

In a conventional three-transistor Wilson mirror:

1. two matched devices establish the basic current-mirror relationship;
2. the third transistor senses a change associated with the output branch;
3. feedback adjusts the shared base drive to oppose that change;
4. base currents are supplied or compensated more effectively than in a simple mirror; and
5. output-current variation caused by output voltage is reduced.

For matched devices with large β, the basic mirror has a relative base-current error of first order in 1/β. Wilson feedback reduces the systematic error to the order of 1/β² under idealized assumptions. Real mismatch and Early effect may then dominate, so the improvement is not unlimited.

The feedback also increases small-signal output resistance. Whereas a simple mirror has output resistance approximately equal to the output transistor’s r_o, a Wilson mirror can achieve an output resistance on the order of g_m r_o². The exact multiplier depends on topology, bias current, transistor matching, and whether finite β is included.

Wilson mirrors have important limitations:

• Higher compliance voltage: common three-transistor implementations need roughly a base-emitter drop plus a saturation margin, often near 0.8–1.0 V, rather than the approximately 0.2 V minimum possible for a simple saturated mirror transistor.
• Additional device area and capacitance: these reduce high-frequency performance.
• Startup and low-voltage behavior: operation must be checked in low-supply circuits.
• Mismatch: feedback does not eliminate errors from unequal emitter area, temperature gradients, or layout.
• Stability: parasitic capacitances can affect transient behavior in high-speed implementations.

A practical Wilson-mirror analysis should therefore: identify the exact topology, establish DC operating regions, write node-current equations including base currents, verify output compliance, and then use a small-signal model to determine output resistance. This workflow avoids applying a formula derived for a different Wilson configuration.

6.3 Other mirror developments

Emitter resistors improve matching and thermal sharing at the cost of voltage headroom. Widlar mirrors generate small currents using emitter degeneration. Cascode mirrors provide very high output resistance but require greater compliance voltage. Integrated circuits also use gain-boosted and regulated-cascode mirrors where precision justifies added complexity.

7. BJT Switching

A transistor switch is intentionally driven between cutoff and saturation. In cutoff, the collector-emitter path behaves approximately as an open circuit. In saturation, both junctions are forward biased and the collector-emitter voltage is small.

Designers should not use nominal β to guarantee saturation. Instead, they specify a forced current gain:

A value such as 10 is commonly used for robust low-frequency switching, although appropriate values depend on the transistor, current, speed, and datasheet conditions.

Worked Example: Base resistor for a switch

An NPN transistor must switch I_C=20 mA from a 5 V logic output. Choose β_forced=10 and assume V_BE(sat)=0.8 V. Then

A nearby standard value not exceeding 2.1 kΩ may be selected, provided the logic source can safely deliver the resulting current. For an inductive load, a flyback path is required to limit turn-off voltage. Deep saturation can also increase storage time; Schottky clamping or alternative drivers may be used for faster switching.

8. Small-Signal Models

A small signal is a sufficiently small variation about the quiescent point that the nonlinear transistor relationship can be linearized. At room temperature, the hybrid-π parameters are

where g_m is transconductance in siemens, r_π is small-signal base-emitter resistance in ohms, and r_o models the Early effect. The intrinsic emitter resistance is approximately

This r_e is a small-signal parameter and must not be confused with an external emitter resistor.

At I_C=1 mA, β=100, V_T=25 mV, and V_A=100 V,

8.1 Common-emitter amplifier

For a bypassed emitter and negligible source resistance, the midband voltage gain from base-emitter signal to collector is approximately

The negative sign indicates phase inversion. The input resistance at the transistor base is approximately r_π, while the total input resistance also includes the bias network:

With the input set to zero, output resistance is approximately

If an emitter resistor is unbypassed and r_o is neglected, the gain from base voltage to collector voltage is

The resistance looking into the base becomes approximately

Emitter degeneration reduces gain but improves linearity, input resistance, bias stability, and gain predictability.

8.2 Emitter follower

For an emitter follower loaded by effective emitter resistance R_E′,

The voltage gain is positive and less than unity. The circuit provides high input resistance and relatively low output resistance, making it useful as a buffer.

8.3 Frequency limitations

Internal junction capacitances cause gain reduction at high frequency. The collector-base capacitance can be magnified by the Miller effect in an inverting common-emitter amplifier. Datasheet transition frequency f_T indicates the frequency at which short-circuit common-emitter current gain falls to unity under specified bias conditions.

9. Thermal Effects and Safe Operation

At constant collector current, silicon V_BE typically decreases by about 2 mV/°C, although the coefficient varies with operating point. Scale current increases strongly with temperature. If bias is poorly stabilized, rising temperature can increase collector current, increasing power dissipation and causing further heating—a process called thermal runaway.

The transistor power dissipation is approximately

The base term is often small, giving P_D≈V_CEI_C. Junction temperature may be estimated using

where T_J and T_A are junction and ambient temperatures in °C and θ_JA is junction-to-ambient thermal resistance in °C/W. This steady-state formula assumes the specified mounting and airflow conditions. Transient thermal impedance must be used for short pulses.

Power transistor design must respect maximum collector current, voltage, power, junction temperature, and safe operating area. Secondary breakdown can restrict simultaneous high-current and high-voltage operation even when the simple power product appears acceptable.

Thermal stability is improved by emitter resistance, negative feedback, heat sinking, current limiting, matched thermal placement, and derating. Parallel BJTs normally require emitter-sharing resistors because a hotter device can otherwise draw increasing current.

10. Illustrative Design Case: Sensor Amplifier Bias Network

Background

This fictional case concerns a battery-powered industrial sensor interface requiring a discrete common-emitter amplifier. The supply is 12 V, and the desired nominal collector current is approximately 1 mA. The design should tolerate transistor β between 100 and 250 while retaining a useful output-voltage swing.

Problem

A fixed-bias design would make collector current strongly dependent on β. The amplifier therefore requires voltage-divider bias and emitter feedback. The target quiescent collector-emitter voltage is approximately 6 V.

Approach

Choose an emitter voltage near 1.2 V for stabilization. At approximately 1 mA,

The collector resistor required for V_CE≈6 V is

Choose the standard value R_C=4.7 kΩ. Select R₁=91 kΩ and R₂=18 kΩ. Their Thévenin equivalent is

Assume initially V_BE=0.70 V. At β=100,

Thus I_C=0.941 mA, I_E=0.950 mA, and

At β=250,

Therefore I_C=1.014 mA, I_E=1.018 mA, and

Outcome

A 2.5-to-1 variation in β produces only about an 8% collector-current range, from 0.941 to 1.014 mA. Both extreme cases remain in forward-active operation and close to the desired quiescent voltage.

If V_BE falls from 0.70 V to 0.65 V while β remains 100, the calculated collector current becomes approximately 0.978 mA—an increase of only about 3.9%. Emitter feedback has therefore reduced thermal sensitivity substantially.

Learning Points

• Design against minimum and maximum parameter values, not only typical values.
• Apply the exact loaded-divider equation before using a stiff-divider approximation.
• Verify the resulting operating region and power dissipation.
• Evaluate AC loading because the bias divider reduces input resistance.
• Simulate the circuit, but confirm critical cases analytically and by measurement.

11. Practical Design, Governance, and Contemporary Practice

Professional designs should use datasheet minimum, maximum, and safe-operating-area specifications. Component tolerances, startup conditions, supply variation, load faults, ambient temperature, and manufacturing spread should be included in worst-case or Monte Carlo analysis.

Simulation models are valuable but do not replace laboratory verification. Automated optimization and AI-assisted tools may select component values or detect outliers, yet their results depend on model quality and constraints. Engineers remain responsible for checking operating regions, thermal limits, stability, and safety.

For products connected to hazardous voltages, transistor circuits must comply with applicable electrical-safety, insulation, electromagnetic-compatibility, and environmental regulations. Responsible design includes derating, fault containment, repairability considerations, and accurate documentation rather than operating components at optimistic typical ratings.

Contemporary BJT technologies include silicon-germanium heterojunction bipolar transistors for high-frequency and low-noise applications, matched transistor arrays for precision analog systems, and complementary bipolar processes integrated with CMOS. The governing bias, feedback, thermal, and small-signal principles remain applicable.

Chapter Summary

A BJT controls collector current through carrier injection at the base-emitter junction. Forward-active operation supports amplification, while cutoff and saturation support switching. DC load lines combine transistor characteristics with external circuit constraints to locate the quiescent point.

Fixed bias is highly sensitive to β and temperature. Emitter feedback and voltage-divider bias provide substantially improved stability. Current mirrors generate bias currents; finite base current and Early effect limit simple mirrors, while Wilson feedback reduces base-current error and increases output resistance at the cost of voltage headroom and complexity.

Linearized hybrid-π parameters—g_m, r_π, and r_o—support calculation of gain and impedance. Reliable practical design additionally requires thermal analysis, safe-operating-area verification, component-tolerance evaluation, simulation, and measurement.

Key Terms

Bipolar junction transistor: A three-terminal semiconductor device using both electron and hole transport.

Current gain β: The forward-active ratio of collector current to base current.

Common-base gain α: The ratio of collector current to emitter current.

Forward-active region: Region used for linear amplification, with forward-biased base-emitter and reverse-biased base-collector junctions.

Cutoff: Operating region with negligible base drive and only leakage collector current.

Saturation: Region in which both transistor junctions are forward biased.

Quiescent point: The DC operating point before an AC signal is applied.

DC load line: The set of current-voltage pairs permitted by the external DC circuit.

Early effect: Collector-current variation caused by base-width modulation as collector voltage changes.

Transconductance: Small-signal ratio g_m=∂I_C/∂V_BE.

Hybrid-π model: Linear small-signal representation using parameters including g_m, r_π, and r_o.

Emitter degeneration: Negative feedback produced by an unbypassed emitter resistance.

Current mirror: Circuit that reproduces a reference current in another branch.

Wilson current mirror: Feedback-enhanced mirror offering lower base-current error and higher output resistance.

Compliance voltage: Minimum output voltage required for a current source or mirror to operate correctly.

Forced current gain: Specified ratio I_C/I_B used in saturated-switch design.

Thermal runaway: Self-reinforcing increase in transistor current and temperature.

Safe operating area: Permissible combinations of transistor voltage, current, time, and temperature.

Review Questions

Short Answer Questions

1. What junction-bias conditions define forward-active operation in an NPN transistor?
2. Why is a fixed-base bias network sensitive to transistor β?
3. What physical phenomenon produces finite BJT output resistance?
4. Define current-mirror compliance voltage.
5. Why is forced β used when designing a saturated transistor switch?

Long Answer Questions

1. Derive the relationship between α and β from the BJT terminal-current equation.
2. Explain how a DC load line and transistor characteristics jointly determine the quiescent point.
3. Derive the voltage-divider bias equation using a Thévenin equivalent and discuss its limiting approximation.
4. Compare simple and Wilson current mirrors in terms of base-current error, output resistance, compliance voltage, mismatch, and high-frequency behavior.
5. Develop the midband small-signal gain and input resistance expressions for a common-emitter amplifier with an unbypassed emitter resistor.

Analytical / Application Questions

1. Design a voltage-divider bias network for a 9 V supply, a target collector current of 2 mA, and a target collector-emitter voltage of 4.5 V. Evaluate the design at the specified minimum and maximum β values of a selected transistor.
2. A BJT has I_C=2 mA, β=120, and V_A=80 V. Determine g_m, r_π, and r_o at V_T=25 mV, then estimate the gain of a bypassed common-emitter stage with R_C=2.2 kΩ and R_L=10 kΩ.
3. Analyze a transistor driving an inductive relay from a logic output. Select the base resistor, verify logic-source current, specify a flyback path, estimate transistor dissipation, and discuss switching-speed limitations.

Multiple Choice Questions with Answers

Question 1

For a BJT with β=99, what is the corresponding common-base current gain α?

A. 0.500

B. 0.900

C. 0.990

D. 1.010

Correct Answer: C. 0.990

Question 2

Which junction-bias condition identifies forward-active operation of an NPN transistor?

A. Both junctions are reverse biased

B. Base-emitter is forward biased and base-collector is reverse biased

C. Both junctions are forward biased

D. Base-emitter is reverse biased and base-collector is forward biased

Correct Answer: B. Base-emitter is forward biased and base-collector is reverse biased

Question 3

An emitter-grounded BJT has V_CC=12 V and R_C=3 kΩ. What is the ideal load-line collector-current intercept?

A. 2 mA

B. 3 mA

C. 4 mA

D. 36 mA

Correct Answer: C. 4 mA

Question 4

A voltage-divider bias network has V_TH=2.0 V, R_TH=10 kΩ, R_E=1 kΩ, β=100, and V_BE=0.7 V. What is the base current?

A. 5.0 μA

B. 11.7 μA

C. 13.0 μA

D. 130 μA

Correct Answer: B. 11.7 μA

Question 5

At I_C=1 mA and V_T=25 mV, what is the BJT transconductance?

A. 4 mS

B. 25 mS

C. 40 mS

D. 100 mS

Correct Answer: C. 40 mS

Question 6

A bypassed common-emitter stage has g_m=40 mS and an effective collector load of 2 kΩ. Neglecting Early effect, what is its approximate voltage gain?

A. +80

B. −80

C. +20

D. −20

Correct Answer: B. −80

Question 7

A transistor has V_A=100 V and I_C=1 mA. Using r_o≈V_A/I_C, what is its output resistance?

A. 1 kΩ

B. 10 kΩ

C. 50 kΩ

D. 100 kΩ

Correct Answer: D. 100 kΩ

Question 8

A 5 V logic source drives a saturated NPN transistor requiring I_B=2 mA. If V_BE(sat)=0.8 V, what base resistance is required?

A. 1.0 kΩ

B. 2.1 kΩ

C. 2.5 kΩ

D. 4.2 kΩ

Correct Answer: B. 2.1 kΩ

Question 9

For a matched two-transistor current mirror with β=98, negligible Early effect, and equal collector currents, what is I_O/I_REF?

A. 0.980

B. 0.990

C. 1.000

D. 1.020

Correct Answer: A. 0.980

Question 10

What is the principal purpose of an emitter resistor in a BJT bias network?

A. To increase dependence on β

B. To force collector-base breakdown

C. To provide negative feedback and improve bias stability

D. To eliminate all power dissipation

Correct Answer: C. To provide negative feedback and improve bias stability