Analog and Digital Electronics

Chapter 4
Analog Amplifiers and Frequency Response

Bachelor Program in Mechatronics Engineering
Analog and Digital Electronics   •   Bachelor

Analog Amplifiers and Frequency Response

Introduction

Analog amplifiers increase the amplitude of continuously varying electrical signals. They are fundamental to sensor interfaces, motor drives, instrumentation, audio systems, communication equipment, and control systems. In a mechatronic system, an amplifier may condition a millivolt-level strain-gauge signal, drive a motor actuator, or isolate a sensor from a data-acquisition circuit.

An amplifier does not simply “make a signal larger.” A practical amplifier also introduces loading, frequency-dependent gain, noise, distortion, phase shift, power consumption, and stability constraints. Consequently, amplifier design requires simultaneous consideration of signal gain, input and output impedance, bandwidth, feedback, thermal limits, and the interaction between cascaded stages.

This chapter develops the small-signal viewpoint used to analyze transistor and operational-amplifier circuits. It then applies that viewpoint to multistage, differential, and power amplifiers, with emphasis on frequency response and practical design decisions.

Learning Objectives

By the end of this chapter, the reader should be able to:

  1. Explain the meaning and limitations of a small-signal amplifier model.
  2. Determine voltage gain, current gain, input impedance, and output impedance.
  3. Analyze loading and the gain of cascaded amplifier stages.
  4. Explain low-frequency and high-frequency response using coupling, bypass, and internal capacitances.
  5. Analyze differential amplifiers and common-mode rejection.
  6. Distinguish voltage, current, transconductance, and power amplifiers.
  7. Evaluate distortion, noise, stability, and power efficiency.
  8. Select suitable amplifier architectures for mechatronic applications.

1. Amplifier Models and Important Terminology

An amplifier is commonly represented as a two-port network. For a voltage amplifier, the ideal relationship is

vo = Av vi

where vi is the input voltage, vo is the output voltage, and Av is the voltage gain. In a real circuit, gain depends on frequency, signal amplitude, bias conditions, source resistance, and load resistance.

A useful general voltage-amplifier model consists of an input resistance Rin, a dependent voltage source of value Avovi, and an output resistance Ro. Here Avo is the unloaded or open-circuit voltage gain. If a load RL is connected, the output voltage is reduced by the voltage-divider factor:

Av = Avo \frac{RL}{Ro + RL}

This equation assumes a linear amplifier, a resistive load, and an output model valid over the frequency range of interest. It demonstrates why a low output resistance is desirable in a voltage amplifier.

The principal amplifier quantities are:

QuantityDefinitionTypical objective
Voltage gainAv = vo/viLarge and predictable
Current gainAi = io/iiSufficient load current
Power gainAp = Po/PiEfficient power transfer
Input resistanceRin=vi/iiHigh for voltage sensing
Output resistanceRo=vtest/itest with independent sources suppressedLow for voltage driving
BandwidthFrequency range meeting a gain criterionWide enough for the signal
DistortionDeparture from proportionality or waveform shapeLow

For a sinusoidal signal, gain is generally complex:

Av(j\omega)=\frac{Vo(j\omega)}{Vi(j\omega)}

where \omega=2\pi f is angular frequency in radians per second and f is frequency in hertz. The magnitude gives amplitude gain and the phase gives phase shift.

Decibel notation

Voltage gain is often expressed in decibels. For equal input and output impedances, power and voltage forms are related, but they must not be confused:

Gv,dB=20\log10|Av|
Gp,dB=10\log10\left(\frac{Po}{Pi}\right)

The factor 20 applies to voltage or current ratios because power is proportional to the square of voltage or current under fixed resistance. For example, a voltage gain of 10 corresponds to 20 dB.

2. Small-Signal Modeling

Transistors are nonlinear devices. Their collector, drain, or output current is not exactly proportional to input voltage over their complete operating range. Small-signal analysis linearizes the device about a selected quiescent operating point, or Q-point.

If a nonlinear relationship is represented by i=f(v), a small variation about VQ can be approximated by a first-order Taylor expansion:

i \approx IQ + \left.\frac{di}{dv}\right|Q (v-VQ)

The incremental slope di/dv is a small-signal parameter. This model is valid when the signal variation is sufficiently small that higher-order terms can be neglected and the transistor remains in the intended operating region.

For a bipolar junction transistor (BJT), the transconductance is

gm=\frac{IC}{VT}

where IC is the quiescent collector current and VT is the thermal voltage, approximately 25.9 mV at 25 °C. The intrinsic emitter resistance is approximately

re \approx \frac{1}{gm}

and the hybrid-π input resistance is

r_\pi=\frac{\beta}{gm}

where \beta is the small-signal common-emitter current gain. These relations assume forward-active operation and neglect transistor parameter variation beyond the stated model.

For a MOSFET, the low-frequency small-signal drain current is commonly modeled as

id=gm vgs+\frac{vds}{ro}

where gm is transconductance, ro is output resistance, and vgs and vds are incremental gate-source and drain-source voltages. The model assumes operation in saturation and sufficiently small signal excursions.

Common-emitter and common-source gain

A common-emitter BJT stage with an unbypassed emitter resistance has approximate gain

Av \approx -\frac{gm(RC\parallel RL)}{1+gmRE}

where RC is collector resistance, RL is the external load, and RE is emitter resistance. The negative sign indicates phase inversion. This expression neglects transistor output resistance and assumes the emitter resistor is not bypassed at the frequency considered.

If the emitter resistor is fully bypassed by a capacitor at the operating frequency, the gain may approach

Av \approx -gm(RC\parallel RL)

subject to the transistor’s internal resistance and other loading. Bypassing increases gain but generally reduces linearity and can alter low-frequency response.

For a common-source MOSFET stage, an analogous approximation is

Av \approx -gm(RD\parallel RL\parallel ro)

where RD is the drain resistor. The gate current is ideally zero, but practical input resistance is limited by bias resistors, leakage, protection devices, and capacitances.

3. Loading and Cascaded Amplifiers

Loading occurs when a connected circuit draws current and changes the voltage or current produced by the preceding circuit. If a source with Thévenin voltage VS and resistance RS drives an amplifier input resistance Rin, the amplifier input voltage is

vi=VS\frac{Rin}{RS+Rin}

Thus the overall source-to-load voltage gain is

\frac{vo}{VS}=\frac{Rin}{RS+Rin}Avo\frac{RL}{Ro+RL}

This formula assumes a resistive, frequency-independent source and load and a single amplifier stage. It is especially useful when comparing the intrinsic gain with the gain actually delivered by a system.

For cascaded stages, the overall gain is the product of individual loaded gains:

Av,total=Av1Av2\cdots Avn

In decibels, multiplication becomes addition:

Gtotal,dB=G1,dB+G2,dB+\cdots+Gn,dB

This simplification is valid only when each stage gain includes the loading imposed by the next stage. Multiplying unloaded gains can produce a substantial error.

Worked Example 1: Two-stage loading

A sensor has a Thévenin voltage of 20 mV and source resistance 2 kΩ. It drives an amplifier with input resistance 18 kΩ and unloaded gain 40. The amplifier output resistance is 1 kΩ and the load is 9 kΩ. The input voltage is

vi=20\text{ mV}\times\frac{18}{2+18}=18\text{ mV}

The loaded output gain factor is 9/(1+9)=0.9. Therefore,

vo=18\text{ mV}\times40\times0.9=648\text{ mV}

The gain from the sensor’s open-circuit voltage is 648/20=32.4, or approximately 30.2 dB. The result is lower than the intrinsic gain of 40 because both source and load loading are present.

4. Frequency Response

An amplifier’s frequency response describes how its gain and phase vary with frequency. A practical response usually has three regions:

  • a low-frequency region where coupling and bypass capacitors reduce gain;
  • a midband region where gain is approximately constant;
  • a high-frequency region where device and stray capacitances reduce gain.

The lower and upper cutoff frequencies are often defined at the frequencies where the magnitude falls to 0.707 of its midband value. This corresponds to a −3 dB change because

20\log10(0.707)\approx -3.01\text{ dB}

For a single-pole low-pass response,

Av(f)=\frac{Av0}{\sqrt{1+(f/fH)2}}

where Av0 is midband gain and fH is the upper cutoff frequency. For a single-pole high-pass response,

Av(f)=Av0\frac{f/fL}{\sqrt{1+(f/fL)2}}

where fL is the lower cutoff frequency. These are idealized first-order relationships and do not describe multiple interacting poles exactly.

The bandwidth is commonly approximated by

BW=fH-fL

If fL is much smaller than fH, then BW\approx fH. Bandwidth must always be stated with its gain criterion, such as “−3 dB bandwidth.”

Low-frequency effects

A coupling capacitor in series with a resistance forms a high-pass network. Its corner frequency is

fc=\frac{1}{2\pi ReqC}

where Req is the resistance seen by the capacitor with independent sources set to zero, and C is capacitance in farads. In an amplifier, Req must include both sides of the coupling capacitor as seen by the capacitor terminals.

Emitter or source bypass capacitors also create low-frequency poles. A design normally places each low-frequency pole well below the lowest signal frequency, but the combined response must be checked because several poles can interact.

High-frequency effects and the Miller effect

At high frequency, transistor junction capacitances, wiring capacitance, package capacitance, and amplifier input/output capacitance become significant. A capacitance connected between an input and output node is especially important. For an inverting gain stage with gain Av, the input capacitance is approximately

Cin,eff\approx Cgd(1-Av)+Cgs

for a MOSFET, where Cgd is gate-drain capacitance and Cgs is gate-source capacitance. Since Av is negative, 1-Av can be much greater than one. This is the Miller effect.

The associated upper corner can be estimated by

fH\approx\frac{1}{2\pi Rsource,effCin,eff}

provided one dominant input pole controls the response. This estimate is not sufficient when several poles or feedback paths are important.

5. Differential Amplifiers and Common-Mode Rejection

A differential amplifier responds primarily to the difference between two input voltages. Define differential and common-mode signals as

vd=v1-v2
vcm=\frac{v1+v2}{2}

A practical differential output can be represented as

vo=Advd+Acmvcm

where Ad is differential gain and Acm is common-mode gain. The common-mode rejection ratio is

CMRR=\left|\frac{Ad}{Acm}\right|

and in decibels,

CMRRdB=20\log10\left|\frac{Ad}{Acm}\right|

High CMRR is essential when a small sensor signal is superimposed on interference that appears on both input wires. CMRR is limited by resistor mismatch, transistor mismatch, finite tail-source resistance, temperature gradients, power-supply coupling, and frequency-dependent parasitics.

An operational amplifier is commonly built from a differential input stage, a high-gain voltage stage, frequency compensation, and an output stage. Negative feedback makes its closed-loop behavior predictable, but only if the loop remains stable.

6. Feedback, Stability, and Noise

For a negative-feedback amplifier with forward gain A and feedback factor \betaf, the closed-loop gain is

Af=\frac{A}{1+A\betaf}

The quantity T=A\betaf is the loop gain. When |T| is large, closed-loop gain is mainly determined by the feedback network. Feedback can reduce distortion, increase bandwidth, and reduce sensitivity to component variation, but it can also cause oscillation if phase shift makes the feedback effectively positive.

Important stability measures include gain margin and phase margin. A unity-gain crossover frequency is the frequency at which the loop-gain magnitude becomes one. Phase margin is the distance between the loop phase at that frequency and −180°. A small phase margin generally indicates excessive overshoot or ringing; a negative phase margin indicates instability under the modeled conditions.

Noise

Amplifier noise is random and must be evaluated relative to the signal. Common sources include:

  • thermal noise from resistors;
  • shot noise associated with discrete charge flow;
  • flicker or 1/f noise, especially at low frequency;
  • electromagnetic interference and power-supply noise.

The thermal-noise voltage spectral density of a resistor is

en=\sqrt{4kTR}\quad\text{V}/\sqrt{\text{Hz}}

where k is Boltzmann’s constant, T is absolute temperature in kelvin, and R is resistance in ohms. For bandwidth B over which the noise density is approximately constant, the rms noise is

vn,rms=en\sqrt{B}

These expressions assume white thermal noise and a rectangular effective bandwidth. Real filters require integration of the noise spectral density over frequency.

Noise design practices include selecting an amplifier with suitable input-referred noise, minimizing unnecessary resistance, using shielding and grounding correctly, separating power and signal paths, and restricting bandwidth to the required range.

7. Distortion and Dynamic Range

An ideal linear amplifier preserves waveform shape. A nonlinear amplifier may be represented by

vo=a1vi+a2vi2+a3vi3+\cdots

The coefficients beyond a1 produce harmonic and intermodulation distortion. Total harmonic distortion is commonly defined as

THD=\frac{\sqrt{V22+V32+V42+\cdots}}{V1}

where V1 is the rms fundamental voltage and V2,V3,\ldots are rms harmonic voltages. THD is often reported as a percentage or in decibels. The formula assumes harmonics are measured at the amplifier output and that the fundamental is clearly separated from noise.

Clipping occurs when an output attempts to exceed the available voltage swing. Crossover distortion is particularly associated with improperly biased class-B output stages. Dynamic range is the ratio between the largest undistorted signal and the noise floor; both limits must be specified under stated bandwidth and load conditions.

8. Power Amplifiers and Efficiency

Small-signal voltage amplifiers are optimized for gain and signal fidelity. Power amplifiers are optimized to deliver substantial power to a load while maintaining acceptable distortion and thermal performance.

For a sinusoidal load voltage and current, average power is

PL=VL,rmsIL,rms=\frac{VL,rms2}{RL}

for a resistive load RL. Amplifier efficiency is

\eta=\frac{PL}{PDC}\times100\%

where PDC is the dc power drawn from the supply.

Class-A amplifiers conduct for the entire cycle and can provide excellent linearity, but their maximum theoretical efficiency is low. Class-B stages use complementary devices conducting on alternate half-cycles; their maximum theoretical sine-wave efficiency is approximately 78.5%, although practical efficiency is lower. Class-AB introduces a small bias to reduce crossover distortion. Class-D amplifiers use switching devices and output filtering, allowing high efficiency, but electromagnetic interference, dead-time distortion, and filter design must be managed.

Thermal design is part of electrical design. Junction temperature can be estimated using a thermal-resistance model:

TJ=TA+PD\thetaJA

where TJ is junction temperature, TA ambient temperature, PD device dissipation, and \thetaJA junction-to-ambient thermal resistance. The estimate assumes steady-state conditions and a known thermal path.

9. Design Procedure for a Multistage Sensor Amplifier

A robust design process is more reliable than selecting component values from gain alone.

  1. Specify the sensor range, source resistance, frequency range, allowable noise, supply voltage, load, and required accuracy.
  2. Determine whether the first stage should be a differential amplifier or instrumentation amplifier. High input resistance and high CMRR are usually important for bridge and biomedical sensors.
  3. Allocate gain across stages. Excessive first-stage gain can cause saturation from offsets or interference; insufficient first-stage gain allows later-stage noise to dominate.
  4. Calculate loading at every interface.
  5. Select coupling and bypass capacitors from the required low-frequency corner, then verify their interaction.
  6. Estimate high-frequency poles, including input capacitance and the Miller effect.
  7. Check output swing, slew rate, load current, power dissipation, and thermal limits.
  8. Evaluate noise, offset, bias-current error, distortion, and common-mode range.
  9. Analyze feedback-loop stability with the actual source, load, and capacitive elements.
  10. Verify the design by simulation and measurement. Measure gain, phase, bandwidth, noise, distortion, and transient response rather than relying only on nominal calculations.

Applied Case: Vibration-Sensor Interface for a Mechatronic Drive

Background

An accelerometer produces a differential signal of 2 mV peak at vibration frequencies from 10 Hz to 2 kHz. The signal is accompanied by a 1 V common-mode voltage and conducted interference that appears nearly equally on both sensor leads. The acquisition converter accepts a 0–3.3 V input and requires a signal centered at 1.65 V.

Problem

A single-ended amplifier would amplify both the desired differential signal and common-mode interference. It could also load the accelerometer and saturate because of the 1 V common-mode level. The interface must provide gain, common-mode rejection, level shifting, and a bandwidth suitable for vibration measurement.

Analysis and approach

An instrumentation-amplifier front end is selected because it offers high input resistance and a specified CMRR. Suppose the required peak output signal is approximately 1.2 V. The required signal gain is

Av=\frac{1.2\text{ V}}{2\text{ mV}}=600

A gain of 600 in one stage would leave little tolerance for sensor offset and interference. A practical design allocates moderate gain to the differential input stage, for example 50, followed by a second low-noise gain stage of 12. The total nominal gain is 600.

The second stage includes a low-pass filter with a passband extending beyond 2 kHz. If a first-order pole is placed at 5 kHz, the attenuation at 2 kHz is

\frac{1}{\sqrt{1+(2/5)2}}\approx0.928

or approximately −0.65 dB. This preserves the required vibration band while reducing higher-frequency noise. The final stage adds a 1.65 V reference so that zero differential input corresponds approximately to mid-supply.

The designer must verify that the instrumentation amplifier’s input common-mode range includes the sensor’s 1 V common-mode voltage, that its output can swing around the 1.65 V reference, and that its CMRR remains adequate at 2 kHz. Resistor matching in any external differential network must also be controlled because mismatch converts common-mode voltage into output error.

Outcome

The proposed architecture provides high input resistance, differential amplification, level shifting, and controlled bandwidth. Laboratory validation should include a differential calibration signal, a common-mode interference test, frequency sweep, input-referred noise measurement, and overload recovery test.

Learning points

The case illustrates that gain alone is not a sufficient design specification. Interface performance depends on common-mode range, CMRR, loading, bandwidth, noise, output swing, and reference accuracy. It also demonstrates why gain is often distributed across stages rather than concentrated in a single high-gain stage.

10. Limitations, Best Practices, and Contemporary Developments

Small-signal models are local approximations. They fail when a transistor leaves its intended region, when the signal approaches clipping, or when temperature and device parameters change substantially. First-order frequency models can also be misleading when multiple poles, zeros, feedback paths, or package parasitics are present.

Best practice includes using worst-case component tolerances, checking temperature and supply extremes, distinguishing typical from guaranteed data-sheet specifications, and measuring the assembled system. Grounding and shielding should be designed according to current paths rather than treated as cosmetic layout details. Safety-related actuators require fail-safe behavior, current limiting, and appropriate isolation.

Modern amplifier design increasingly uses integrated instrumentation amplifiers, low-noise CMOS and bipolar input stages, digitally programmable gain, switched-capacitor filters, and class-D power stages. Computer-aided design and machine-learning tools can assist with optimization and fault detection, but they do not replace physical verification. An AI-generated circuit must still be checked for stability, safe operating area, electromagnetic compatibility, thermal behavior, and compliance with applicable standards.

Chapter Summary

Analog amplifiers are modeled using gain, input resistance, and output resistance, but practical performance also depends on loading and frequency. Small-signal models linearize transistor behavior around a Q-point and are valid only for sufficiently small variations within the intended operating region. Cascaded gain must include interstage loading.

Low-frequency response is controlled mainly by coupling and bypass capacitors, while high-frequency response is limited by device, wiring, and feedback capacitances. The Miller effect can greatly increase effective input capacitance in inverting stages. Differential amplifiers reject common-mode signals, and CMRR quantifies that ability. Feedback can stabilize gain and reduce distortion, but loop phase shift must be considered to avoid oscillation.

Power amplifiers require analysis of load power, efficiency, output swing, distortion, and thermal limits. Noise, distortion, bandwidth, impedance matching, and common-mode range are equally important in practical mechatronic interfaces. A sound design process begins with system specifications and ends with simulation, measurement, and worst-case verification.

Key Terms

Small-signal model: Linearized representation of a device about its operating point.

Q-point: Quiescent dc operating point about which small signals vary.

Voltage gain: Ratio of output voltage to input voltage.

Transconductance: Incremental output-current change per unit input-voltage change.

Input resistance: Ratio of incremental input voltage to input current.

Output resistance: Resistance presented by an amplifier at its output port.

Loading: Change in circuit behavior caused by a connected source or load.

Midband: Frequency region where gain is approximately constant.

Cutoff frequency: Frequency at which gain reaches the specified attenuation, commonly −3 dB.

Bandwidth: Difference between upper and lower specified cutoff frequencies.

Miller effect: Increase in effective input capacitance caused by gain across a feedback capacitance.

Differential gain: Gain applied to the difference between two input signals.

Common-mode gain: Gain applied to the average of two input signals.

CMRR: Ratio of differential gain to common-mode gain.

Loop gain: Product of forward gain and feedback factor.

Phase margin: Stability measure related to distance from −180° phase at unity loop gain.

Thermal noise: Random noise caused by thermal agitation of charge carriers.

Total harmonic distortion: Ratio of rms harmonic content to rms fundamental content.

Power amplifier: Amplifier designed to deliver substantial power to a load.

Dynamic range: Ratio between the largest undistorted signal and the noise floor.

Review Questions

Short Answer Questions

  1. Why is a small-signal model useful for transistor amplifier analysis, and when does it become invalid?
  2. Define input resistance, output resistance, and voltage gain.
  3. Explain why the gain of cascaded stages must include loading.
  4. What is the physical origin of the Miller effect?
  5. Why is high CMRR important in a sensor interface?

Long Answer Questions

  1. Derive the loaded voltage gain of a voltage amplifier driven by a Thévenin source and connected to a resistive load.
  2. Explain the three frequency-response regions of a practical transistor amplifier and identify the components that dominate each region.
  3. Compare class-A, class-B, class-AB, and class-D power amplifiers in terms of conduction angle, efficiency, and distortion.
  4. Explain how negative feedback affects gain, bandwidth, distortion, and stability.
  5. Develop a design procedure for a two-stage amplifier intended for a low-level differential sensor.

Analytical / Application Questions

  1. An amplifier has unloaded gain 50, input resistance 10 kΩ, and output resistance 500 Ω. It is driven by a source with resistance 1 kΩ and connected to a 4.5 kΩ load. Determine the overall voltage gain from the source Thévenin voltage to the load voltage.
  2. A differential amplifier has differential gain 80 V/V and CMRR of 60 dB. Determine its approximate common-mode gain magnitude and explain the effect of a 0.5 V common-mode signal.
  3. A power stage delivers 8 W to an 8 Ω resistive load from a 24 W dc input. Determine its efficiency and discuss two possible causes of the remaining power dissipation.

Multiple Choice Questions with Answers

Question 1

A voltage amplifier has an unloaded gain of 20, output resistance of 1 kΩ, and load resistance of 9 kΩ. What is its loaded voltage gain?

A. 2

B. 18

C. 20

D. 180

Correct Answer: B. 18

Question 2

The small-signal transconductance of a BJT operating in forward-active mode is approximately given by which expression?

A. gm=IC/VT

B. gm=VT/IC

C. gm=\beta VT

D. gm=RC/IC

Correct Answer: A. gm=IC/VT

Question 3

A voltage gain of 10 corresponds approximately to:

A. 3 dB

B. 10 dB

C. 20 dB

D. 100 dB

Correct Answer: C. 20 dB

Question 4

For a first-order high-pass network, increasing the coupling capacitance while keeping resistance constant will:

A. Increase the lower cutoff frequency

B. Decrease the lower cutoff frequency

C. Eliminate the upper cutoff frequency

D. Reverse the amplifier phase in the midband

Correct Answer: B. Decrease the lower cutoff frequency

Question 5

The common-mode rejection ratio is defined as:

A. The ratio of common-mode gain to differential gain

B. The sum of differential and common-mode gains

C. The ratio of differential gain to common-mode gain

D. The product of input resistance and output resistance

Correct Answer: C. The ratio of differential gain to common-mode gain

Question 6

A resistor has thermal-noise voltage density proportional to which quantity?

A. \sqrt{4kTR}

B. 4kT/R

C. R/(4kT)

D. k/(TR)

Correct Answer: A. \sqrt{4kTR}

Question 7

The Miller effect primarily causes a feedback capacitance between an amplifier’s input and output to appear as:

A. A reduced output resistance only

B. An increased effective input capacitance

C. A dc current source

D. A perfect short circuit at all frequencies

Correct Answer: B. An increased effective input capacitance

Question 8

If a power amplifier delivers 12 W to a load while drawing 20 W from its dc supply, its efficiency is:

A. 40%

B. 60%

C. 80%

D. 167%

Correct Answer: B. 60%

Question 9

In a negative-feedback amplifier, the closed-loop gain is represented by:

A. Af=A(1+A\betaf)

B. Af=A/(1+A\betaf)

C. Af=\betaf/A

D. Af=A-\betaf

Correct Answer: B. Af=A/(1+A\betaf)

Question 10

A differential amplifier is especially appropriate for a sensor when the desired signal is:

A. A large signal referenced to an ideal ground

B. A difference between two signals containing shared interference

C. A high-current motor-drive waveform only

D. A dc supply voltage that must be regulated

Correct Answer: B. A difference between two signals containing shared interference

Analog and Digital Electronics
Chapter 4 of 15