Parallel, Distributed and Accelerator-Aware AlgorithmsIntroductionModern artificial-intelligence and machine-learning systems process datasets, models, and simulations whose computational and storage requirements exceed the capacity of a single processor or machine. Parallel, distributed, and accelerator-aware algorithms address this problem by decomposing computation, assigning work to multiple processing elements, coordinating partial results, and managing communication and failure. These approaches are related but not identical. Parallel computing commonly uses multiple cores or processors within a tightly coupled system. Distributed computing uses independent machines connected by a network and must explicitly address latency, partial failure, and inconsistent state. Accelerator-aware computing exploits specialized hardware such as GPUs, tensor-processing units, field-programmable gate arrays, and high-bandwidth memory systems. The central design challenge is not simply to increase the number of processors. A scalable algorithm must expose sufficient parallelism, balance work, minimize communication, synchronize safely, use memory efficiently, and remain correct when components are delayed or fail. Learning ObjectivesAfter completing this chapter, a student should be able to: - Distinguish shared-memory, distributed-memory, MapReduce, graph-processing, and accelerator execution models.
- Analyze speedup, efficiency, scalability, work, span, communication, and synchronization costs.
- Design parallel algorithms using decomposition, reduction, prefix computation, and bulk-synchronous techniques.
- Explain distributed graph algorithms and the role of consistency, partitioning, and fault tolerance.
- Map algorithms effectively to GPUs and other accelerators.
- Evaluate a scalable design using performance, correctness, reliability, governance, and energy criteria.
1. Computational Models and Design Vocabulary1.1 Parallelism, concurrency, and distributionConcurrency means that multiple activities are in progress, whereas parallelism means that multiple activities execute simultaneously. A concurrent program can run on one processor through interleaving; a parallel program requires simultaneous execution to obtain speedup. A shared-memory parallel machine provides several processing cores that access a common address space. Communication occurs through reads and writes, while synchronization is implemented with locks, barriers, atomics, or transactional mechanisms. A distributed-memory system gives each worker private memory. Workers exchange messages through a network, making communication explicit and comparatively expensive. An accelerator is a device optimized for particular operations. GPUs contain many relatively simple arithmetic units and are effective when thousands of threads perform similar operations on regular data. CPUs generally provide stronger control flow, larger caches, and lower-latency execution for irregular tasks. 1.2 Work and spanFor a computation represented as a directed acyclic graph, work W is the total number of primitive operations, and span S is the length of the longest dependency path. With p ideal processors, the running time Tₚ is bounded by: Tₚ ≥ max(W/p, S) Here, W/p is the work lower bound and S is the dependency lower bound. The expression assumes negligible communication, scheduling, memory, and synchronization overhead; real systems take longer. A useful idealized upper bound for greedy scheduling is often expressed as Tₚ = O(W/p + S), though constants and overhead can be significant. Parallelism is the ratio W/S. A computation with low W/S cannot efficiently use a very large number of processors, even if its total work is substantial. 1.3 Speedup and efficiencyIf T₁ is the best sequential execution time and Tₚ is the parallel execution time on p processors, speedup is: Speedup(p) = T₁/Tₚ Parallel efficiency is: Efficiency(p) = Speedup(p)/p = T₁/(pTₚ) Speedup is dimensionless. Ideal speedup equals p and ideal efficiency equals 1, but communication, synchronization, load imbalance, serial work, and resource contention reduce both measures. Amdahl’s law models a fixed-size workload. If f is the fraction of execution time that is inherently serial and 1 − f is parallelizable, then: Sₚ = 1/(f + (1 − f)/p) The assumptions are that f and the workload remain fixed and parallel overhead is ignored. As p approaches infinity, the maximum speedup approaches 1/f. For example, if f = 0.05, the limiting speedup is 20, regardless of the number of processors. Gustafson’s law is more appropriate when the problem size grows with the number of processors. Under a normalized parallel execution time of one and serial fraction α measured in that parallel execution, scaled speedup is: Sₚ = p − α(p − 1) The two laws answer different questions: Amdahl’s law concerns fixed workloads, while Gustafson’s law concerns scaled workloads. 2. Decomposition and Synchronization2.1 Forms of decompositionData decomposition assigns different data portions to workers executing the same operation. Matrix-vector multiplication and image filtering are common examples. Task decomposition assigns different operations to workers, such as separate stages of a machine-learning pipeline. Recursive decomposition divides a problem repeatedly, as in parallel merge sort or divide-and-conquer graph algorithms. A decomposition should satisfy four requirements: - It exposes enough independent work.
- It balances computational and memory load.
- It minimizes data movement.
- It preserves dependencies and correctness.
Static scheduling assigns work before execution and has low overhead when task costs are predictable. Dynamic scheduling assigns work as workers become available and handles irregular workloads better, but requires scheduling coordination. 2.2 Races, atomicity, and barriersA data race occurs when concurrent accesses to the same memory location are not properly ordered and at least one access is a write. A race can produce nondeterministic results even when each individual operation appears correct. An atomic operation is indivisible with respect to competing operations. For example, an atomic increment guarantees that two updates are not lost. Locks provide mutual exclusion but can reduce parallelism and introduce deadlock risk. A barrier requires all participating workers to reach a point before any proceed. Barriers are useful for iterative algorithms but may cause fast workers to wait for slow workers. A scalable synchronization strategy uses the weakest mechanism that establishes the required correctness. Reductions, privatization, message passing, and ownership partitioning often avoid a global lock. 2.3 Reduction and prefix computationA reduction combines values using an associative operation, such as sum, minimum, maximum, or logical AND. Associativity is essential because parallel execution changes the grouping of operations. Floating-point addition is not perfectly associative due to rounding, so parallel sums may differ slightly from sequential sums. A sequential sum has span O(n). A balanced tree reduction has work O(n) and span O(log n), assuming enough processors and constant-time pairwise addition. A prefix sum computes, for input [a₀, a₁, …, aₙ₋₁], outputs [a₀, a₀+a₁, …]. Prefix operations support stream compaction, radix sorting, graph traversal, and allocation. 3. Communication and Performance ModelingIn distributed algorithms, communication can dominate arithmetic. A simple point-to-point communication model represents the time to send a message of m words as: Tmessage = α + βm α is the latency, or startup cost, in time units; β is the time per transferred word; and m is the message size. The model assumes a linear relationship and ignores contention, routing variability, and protocol effects. For k messages of sizes m₁,…,mₖ, a basic estimate is: Tcomm ≈ kα + β∑ᵢ mᵢ This model explains why one large message is often preferable to many small messages, although buffering, memory limits, and fault recovery may alter the decision. The compute-to-communication ratio compares useful arithmetic work with transferred data. High ratios generally favor accelerators and distributed execution. Low ratios suggest that optimization should focus on locality, compression, partitioning, batching, or reducing synchronization. A distributed reduction illustrates the trade-off. A naïve root-based reduction may require O(p) messages at the root for p workers. A tree reduction completes in O(log p) communication rounds, assuming a suitable network and balanced participation. The total time still depends on message latency and the size of partial results. 4. MapReduce and Data-Parallel SystemsMapReduce separates a large computation into a map phase and a reduce phase. The map function transforms each input record into zero or more key-value pairs. A shuffle groups all values associated with the same key. The reduce function aggregates each key’s values. The abstract pattern is: map(record) → (key, value)
shuffle: group values by key
reduce(key, [value₁, value₂, …]) → result For word counting, map emits (word, 1), and reduce sums all counts for each word. In practice, systems use partitioners, combiners, replication, task scheduling, and spill files. A combiner performs local aggregation before the shuffle and is valid only when the aggregation is semantically safe, usually because it is associative and commutative. MapReduce is powerful for batch processing because workers can be restarted and intermediate data can be materialized. Its limitations include high latency, expensive shuffles, and poor suitability for algorithms requiring frequent iteration. Iterative machine-learning algorithms often benefit from in-memory dataflow engines, parameter servers, or collective communication libraries instead. Partitioning is a critical design decision. Hash partitioning distributes keys evenly under a suitable key distribution. Range partitioning supports ordered operations but can become imbalanced when values are skewed. A hot key can overload one reducer; remedies include key salting, hierarchical aggregation, or a specialized partitioner. 5. Distributed Graph AlgorithmsLarge graphs arise in social networks, recommendation, fraud detection, transportation, knowledge representation, and scientific simulation. A graph G = (V, E) contains vertices V and edges E. An edge list is compact and communication-friendly, while adjacency lists support traversal. Partitioning assigns vertices or edges to workers. The main difficulty is that graph neighborhoods cross partition boundaries. A worker may need remote values for adjacent vertices, producing communication and synchronization. Vertex-cut partitioning divides high-degree vertices across machines and can reduce edge imbalance; edge-cut partitioning assigns each vertex to one owner and may replicate boundary data. 5.1 Bulk-synchronous parallel modelThe bulk-synchronous parallel (BSP) model organizes execution into supersteps. During a superstep, workers perform local computation, exchange messages, and then synchronize at a barrier. A simplified cost model is: Ttotal ≈ ∑ₛ (wₛ + g hₛ + L) wₛ is the maximum local computation time in superstep s, hₛ is the maximum number of communicated words, g is the time per word, and L is the barrier synchronization cost. The model assumes communication and synchronization costs can be summarized by these parameters. BSP provides a clear reasoning framework, but global barriers can be expensive. Asynchronous graph systems reduce waiting and may converge faster, yet they complicate consistency, reproducibility, and termination detection. 5.2 Breadth-first search and PageRankParallel breadth-first search maintains a frontier of vertices at the current distance. Each worker expands its local frontier, discovers unvisited neighbors, and communicates newly discovered vertices. Duplicate discovery requires an atomic test-and-set or an ownership rule. Frontier-based processing is efficient for shallow, wide graphs but can suffer from load imbalance and communication volume. PageRank is an iterative graph algorithm. For a graph with n vertices, damping factor d, and transition matrix P, one common formulation is: rt+1 = dPrt + (1 − d)u rₜ is the rank vector at iteration t, P describes the probability of following graph edges, and u is a personalization vector whose entries commonly sum to one. Usually 0 < d < 1. Dangling vertices require special treatment, such as redistributing their probability mass. Iteration stops when a chosen convergence criterion, such as ||rₜ₊₁ − rₜ||₁ ≤ ε, is met, where ε is a tolerance. The number of iterations depends on graph structure and d. 6. GPU and Accelerator-Aware AlgorithmsAccelerator-aware design begins with the hardware execution model rather than merely porting sequential code. A GPU typically groups threads into execution units that follow a common instruction stream. Threads are organized into blocks, and blocks are scheduled independently. Fast shared memory is available within a block, while global memory is larger but slower. Correctness cannot depend on the execution order of independent blocks unless a kernel boundary or explicit global synchronization is used. A GPU algorithm should seek: - high occupancy without exhausting registers or shared memory;
- coalesced global-memory accesses, where neighboring threads access neighboring locations;
- limited branch divergence within execution groups;
- reuse through caches or shared memory;
- sufficient arithmetic intensity to amortize data-transfer cost;
- few host-device transfers and kernel launches.
Arithmetic intensity is often expressed as: I = F/B F is the number of floating-point or other arithmetic operations and B is the number of bytes transferred to or from the relevant memory level. The units are operations per byte. A low-I kernel is likely memory-bandwidth bound; a high-I kernel may be compute bound. This classification is approximate and depends on the machine’s roofline parameters. The roofline performance bound is commonly written: P ≤ min(Ppeak, I × BW) P is attainable performance, P_peak is peak compute performance, and BW is sustainable memory bandwidth. Units must be consistent: if P_peak is operations per second and BW is bytes per second, I must be operations per byte. Matrix multiplication is a canonical accelerator workload because each output element reuses input values. Tiling loads submatrices into fast shared memory, allowing many threads to reuse them before loading new data. By contrast, pointer-heavy graph traversal may be limited by irregular memory access and synchronization; specialized frontier, compression, and reordering techniques are often needed. Tensor accelerators favor dense, structured operations such as matrix multiplication and convolution. Mixed-precision computation can increase throughput, but accumulation and numerical stability must be evaluated. A safe design identifies where reduced precision is acceptable and uses higher precision for sensitive reductions or final updates. 7. Fault Tolerance and Distributed CorrectnessA distributed system must assume that machines, processes, networks, disks, and software components can fail independently. A failure model specifies what failures are considered: crash-stop, crash-recovery, omission, timing, or Byzantine behavior. Algorithmic guarantees are meaningful only relative to the stated model. Common techniques include replication, checkpointing, replay, idempotent tasks, lineage-based recomputation, quorum protocols, and durable logs. Replication improves availability but increases storage and communication cost. Checkpointing periodically saves state so recovery restarts from a recent consistent point. If checkpoints are too frequent, overhead is high; if too infrequent, failure causes excessive recomputation. A task is idempotent if repeating it produces the same externally visible result as executing it once. Idempotence is particularly valuable in systems that may retry tasks after uncertain failures. Exactly-once processing is difficult across distributed boundaries; many practical systems implement at-least-once execution combined with idempotent writes or transactional sinks. Consistency concerns the visibility and ordering of updates. Strong consistency simplifies reasoning but may reduce availability or increase latency. Eventual consistency can scale well for replicated state, but applications must tolerate temporary disagreement. For iterative numerical algorithms, stale parameters may be acceptable if convergence remains stable; for financial authorization or safety control, they may not be acceptable. 8. Worked Example: Choosing a Parallel StrategySuppose a data-processing job takes 100 seconds sequentially. Profiling shows that 90% is parallelizable and 10% is serial. Ignoring overhead, the predicted time on 16 processors is: T₁ = 100 T₁₆ = 100(0.10 + 0.90/16) = 100(0.10 + 0.05625) = 15.625 seconds The speedup is: S₁₆ = 100/15.625 = 6.4 Efficiency is 6.4/16 = 0.40, or 40%. The result demonstrates that adding processors does not produce proportional speedup when a serial fraction remains. Now suppose the parallel section also requires 2 seconds of communication and synchronization on 16 processors. The estimated time becomes 17.625 seconds, speedup becomes approximately 5.67, and efficiency becomes approximately 35.4%. This is a simplified estimate: real overhead may depend on message size, contention, load imbalance, and overlap between communication and computation. 9. Applied Case: Distributed Fraud-Graph AnalysisBackgroundThe following is an illustrative case. A payment platform maintains a graph in which vertices represent accounts, devices, and merchants, while edges represent transactions or shared identifiers. The graph contains billions of edges and changes continuously. ProblemThe organization wants to identify suspicious communities and short transaction paths within minutes. A single-machine algorithm cannot hold the graph in memory, and naïve distributed traversal generates excessive cross-machine traffic. AnalysisProfiling shows a highly skewed degree distribution: a small number of accounts have millions of neighbors. Simple edge partitioning creates overloaded workers, while simple vertex partitioning causes repeated remote access for high-degree vertices. The workload also has a freshness requirement, so a full nightly batch is insufficient. Approach and solutionThe design uses a hybrid architecture. Stable historical edges are partitioned across a distributed graph store. High-degree vertices use a vertex-cut strategy with replicated summaries. A streaming layer updates recent edges, and periodic compaction merges them with the historical representation. For suspicious-path search, a frontier-based breadth-first procedure limits exploration by time window, transaction value, and risk score. Local frontiers are expanded in parallel; boundary vertices are exchanged in batches to reduce the latency term in the communication model. Duplicate discovery is controlled through ownership and atomic marking. Community scores are computed with an iterative graph algorithm using BSP-style supersteps, with checkpointing after selected iterations. GPU kernels accelerate dense feature transformations and batched scoring, but irregular graph traversal remains distributed and CPU-oriented. Mixed precision is used only for a neural scoring stage after validation against a higher-precision reference. OutcomeThe hybrid approach improves throughput by reducing remote accesses and avoiding a single partition bottleneck. Checkpointing permits recovery without restarting an entire analysis. The system reports confidence intervals and provenance for alerts rather than treating an algorithmic score as proof of fraud. Learning points- Partitioning must reflect degree distribution and access patterns, not merely storage capacity.
- Communication-aware batching can matter more than optimizing local arithmetic.
- Different stages may require different hardware and consistency models.
- Fault tolerance and provenance are essential when outputs influence investigations or customer treatment.
10. Professional, Ethical, and Governance ConsiderationsScalable algorithms amplify both benefits and harms. A distributed risk model can process more cases, but a biased feature or flawed label can affect millions of decisions. Engineers should document data lineage, partitioning assumptions, numerical tolerances, retry semantics, and known failure modes. Reproducibility is challenging because task scheduling, floating-point reduction order, hardware instructions, and asynchronous updates can change results. Important experiments should record software versions, hardware, random seeds, precision modes, dataset snapshots, and convergence criteria. Privacy requires attention to data minimization, access control, encryption, retention, and cross-border data movement. Replication and checkpointing create additional copies that may expand the privacy exposure. Governance should specify who can inspect intermediate data, how long it is retained, and how deletion requests propagate through caches and backups. For safety-critical or regulated applications, performance cannot be the only objective. Validation should include worst-case latency, failure recovery, numerical stability, fairness, auditability, and human oversight. A faster wrong answer is not a successful optimization. 11. Best Practices and Contemporary DirectionsA reliable workflow begins with a sequential reference implementation and a correctness test suite. The designer then profiles the workload, identifies dependencies and data movement, selects a decomposition, and measures scaling on representative data. Strong scaling keeps the problem size fixed while increasing processors; weak scaling increases problem size with processor count. Both should be reported, together with cost, energy, and tail latency where relevant. Useful practices include: - separate algorithmic work from communication and synchronization;
- use local aggregation before global shuffles;
- partition according to workload, not only data volume;
- prefer deterministic ownership or idempotent updates;
- overlap communication with computation when correctness permits;
- benchmark realistic skew, failures, and input sizes;
- use accelerators only when transfer and launch costs are justified;
- validate reduced precision and parallel numerical reductions;
- checkpoint at semantically consistent boundaries;
- monitor stragglers, retries, queueing, memory pressure, and network saturation.
Contemporary systems increasingly combine CPUs, GPUs, specialized tensor hardware, high-bandwidth memory, and disaggregated storage. Training large models uses data, model, pipeline, and tensor parallelism, often together. Federated and confidential computing introduce additional communication, privacy, and trust constraints. Research continues on asynchronous algorithms, programmable data planes, near-memory computation, energy-aware scheduling, resilient machine learning, and compiler-generated parallelism. Chapter SummaryParallel, distributed, and accelerator-aware algorithms divide computation across processing elements while managing dependencies, data movement, synchronization, and failure. Work and span describe algorithmic parallelism; speedup and efficiency quantify performance; Amdahl’s and Gustafson’s laws clarify fixed-size and scaled workloads. Communication models explain why latency, message count, and partitioning are central to distributed performance. MapReduce provides a robust batch abstraction based on mapping, shuffling, and reducing, whereas graph systems must address irregular neighborhoods, skew, and synchronization. BSP offers a useful superstep model for distributed graph computation. GPUs and other accelerators require attention to memory coalescing, occupancy, divergence, arithmetic intensity, tiling, precision, and transfer overhead. Fault tolerance depends on explicit failure models and mechanisms such as replication, checkpointing, idempotence, and lineage. The most effective designs are hybrid and evidence-based. They begin with correctness, use profiling to locate bottlenecks, select decomposition and hardware according to access patterns, and evaluate not only throughput but also reliability, reproducibility, privacy, fairness, and energy. Key TermsParallelism: Simultaneous execution of multiple computational activities. Concurrency: Multiple activities making progress, possibly through interleaving. Work: Total number of primitive operations in a computation. Span: Length of the longest dependency path in a computation graph. Speedup: Sequential execution time divided by parallel execution time. Efficiency: Speedup divided by the number of processors. Amdahl’s law: Fixed-workload model limiting speedup through the serial fraction. Gustafson’s law: Scaled-workload model relating speedup to parallel problem growth. Data decomposition: Dividing input data among workers performing similar operations. Reduction: Combining many values using an associative operation. Barrier: Synchronization point at which participants wait for one another. MapReduce: Batch model consisting of map, shuffle, and reduce stages. Shuffle: Redistribution of intermediate records by key across workers. BSP: Bulk-synchronous parallel model based on supersteps and barriers. Partitioning: Assigning data or graph elements to processing units. Arithmetic intensity: Operations performed per byte of data transferred. Coalesced access: Memory access pattern in which neighboring threads access neighboring locations. Checkpoint: Saved consistent state used for recovery. Idempotence: Property that repeating an operation has the same visible effect as executing it once. Strong consistency: Guarantee that reads observe updates according to a specified global ordering. Review QuestionsShort Answer Questions- Distinguish concurrency from parallelism.
- Define work and span, and explain why span limits speedup.
- What is the purpose of a combiner in MapReduce?
- Why can floating-point reductions produce different results in different execution orders?
- State two reasons why GPU memory access patterns affect performance.
Long Answer Questions- Explain Amdahl’s law and Gustafson’s law, including the different workload assumptions behind them.
- Describe the design of a fault-tolerant distributed computation using checkpointing, replication, and idempotent tasks.
- Compare shared-memory, distributed-memory, and GPU execution models.
- Explain BSP graph processing and analyze the roles of local work, communication, and barriers.
- Discuss how partitioning, skew, and shuffle cost influence MapReduce performance.
Analytical / Application Questions- A program has a serial fraction of 0.08. Estimate its ideal speedup on 32 processors using Amdahl’s law, and interpret the result.
- Design a parallel breadth-first search for a graph with highly skewed vertex degrees. Justify your partitioning, duplicate-detection, and synchronization choices.
- A matrix kernel performs 2.4 × 10⁹ operations and transfers 1.2 × 10⁹ bytes. Compute its arithmetic intensity and explain whether improving bandwidth or computation is the more appropriate first optimization, given a machine whose peak compute rate is 10¹² operations/s and sustainable bandwidth is 300 × 10⁹ bytes/s.
Multiple Choice Questions with AnswersQuestion 1Which quantity represents the longest dependency path in a parallel computation? A. Work B. Span C. Throughput D. Bandwidth Correct Answer: B. Span Question 2Under Amdahl’s law, what happens to maximum speedup as the processor count approaches infinity? A. It approaches the reciprocal of the serial fraction B. It always approaches the processor count C. It approaches zero D. It becomes equal to communication latency Correct Answer: A. It approaches the reciprocal of the serial fraction Question 3In MapReduce, which phase groups intermediate values associated with the same key? A. Mapping B. Checkpointing C. Shuffling D. Replication Correct Answer: C. Shuffling Question 4A message model uses T = α + βm. What does α represent? A. The number of processors B. Message startup latency C. The number of words transferred D. Arithmetic intensity Correct Answer: B. Message startup latency Question 5Which property is especially useful when distributed tasks may be retried? A. Idempotence B. Branch divergence C. Deadlock D. Serial dependence Correct Answer: A. Idempotence Question 6A kernel performs 2.4 × 10⁹ operations and transfers 1.2 × 10⁹ bytes. What is its arithmetic intensity? A. 0.2 operations/byte B. 1 operation/byte C. 2 operations/byte D. 2.88 operations/byte Correct Answer: C. 2 operations/byte Question 7Which GPU memory behavior generally improves global-memory efficiency? A. Random access by every thread B. Coalesced neighboring accesses C. Maximum branch divergence D. Repeated host-device transfers Correct Answer: B. Coalesced neighboring accesses Question 8In a BSP algorithm, a superstep typically includes local computation followed by what activities? A. Message exchange and synchronization B. Permanent processor shutdown C. Database normalization only D. Removal of all graph edges Correct Answer: A. Message exchange and synchronization Question 9Which graph-partitioning strategy can reduce the burden caused by very high-degree vertices by distributing their incident edges? A. Vertex-cut partitioning B. Single-root partitioning C. Serial partitioning D. Random deletion Correct Answer: A. Vertex-cut partitioning Question 10If a program has a serial fraction of 0.10, what is its ideal limiting speedup under Amdahl’s law? A. 2 B. 5 C. 10 D. 100 Correct Answer: C. 10
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